F100314 NSC | Alldatasheet
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= So National ADVANCE INFORMATION | & Semiconductor * Low Power Quint Differential Line Receiver General Description The F100314 is a monolithic quint differential line receiver —_ output state exists if both inverting and non-inverting inputs with emitter-follower outputs. An internal reference supply are at the same potential between Vee and Vcc. The de- (Vgp) is available for single-ended reception. When used in _ fined state is logic HIGH on the O,-Og outputs. single-ended operation the apparent input threshold of the true inputs is 25 mV to 30 mV higher (positive) than the Features threshold of the complementary inputs. Unlike other F100K — w 35% power reduction of the F100114 BCL devices, the inputs do not have input pull-down resis- @ a999V ESD protection A i, ‘ 4 od Sion of Pit/tunction compatible with F100114 ctive current sources provide common-mode rejection of» \\ott ted ti = 1.0V in either the positive or negative direction. A defined NaN tee pauing range Logic Symbol Bb cA Dg-De Data Inputs Da-De Inverting Data Inputs eg Le hg Oa-Oy Data Outputs Oa-Oe Complementary Data Outputs De. 0% Be oe Dg 06 Be Be De 0% Lx o. D— ve TWF /10260~1 Connection Diagrams 2 | 24-Pin DIP 28-Pin PCC 24-Pin Quad Cerpak - 0 Dy 0, OnVersOy O OF, 5, D Yaa Ver Oy Oy 541 ur-o, elcTolojalale} 342 2-5, reas ze 212018 | O45 22b—dg o, Go, 0441 18d, as abd, 5, wo, b-42 oe ods bo, Ver Deca a 18-0, Ves Dec aa 15d, Veo 6 19 Vgg Veo Vee Be a,-45 bo, Voca]7 WeVee 0. Bo, * ps ats i 5.8 Bo, ot 78 9 1011 2” * 0,43 16h-o, By10 151-5, Banaaas Bg 4 Yee Voea % 0 Oe 14-0, Dy Dg Peers, Oy Oy vee “Tursi0280-3 au i TUF 0260-4 TUF 0260-2 2-27