F100180 NSC | Alldatasheet

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The F100180 is a high-speed 6-bit adder capable of per- _tive-LOW Carry Propagate. When used with the F100179 forming a full 6-bit addition of two operands. Inputs for the Full Carry Lookahead as a second order lookahead biock, adder are active-LOW Carry, Operand A, and Operand B; the F100180 provides high-speed addition of very long outputs are Function, active-LOW Carry Generate, and ac- _ words. All inputs have 50 kQ. pull-down resistors. Ordering Code: see sections Logic Symbol [Prvanes | ___beeeripton | ‘Ag Bo As By Az Bz Ay By Ad By As Bs Ao-As Operand A Inputs Oo Cn Bo-Bs Operand B Inputs Ch Carry Input (Active LOW) GP Fo Fy Fo Fa Fa Fs G Carry Generate Output (Active LOW) 9 9 Pp Carry Propagate Output (Active LOW) swenere-a Fo-F5 Function Outputs Connection Diagrams 24-Pin DIP 24-Pin Quad Cerpak a, Ay By Cy Veg Az Bs ho! 24-8 oz 2A 24-25 22 21 20 19 re 22h—8, he 18 Ay roa4 2p Ay ithe bd 17 By rs 20-8, Bo~3 16) As Vec46 Tr) ro—-4 15-85 Voca47 18b=Veg Fomgs “ec 48 17 Has Fe 13r-P reqs 6/6, 78 9 101112 P10 15 Ay Fo Fs VocVocaFa Fs Gait 14-8, TLIF/9872-2 By 12 13 As TUF/9872~1 3-194

r=} Logic Diagram = o Tn Bo AoB: Ay Bz Az 8 As Ba Ay Bs As IH Fa iy IH LH [LH UVUO0OU0 UO UU UO UU 0] Go] Pil 2] Pal Gg “ pst ad SD AD AS OO Le SY SN NN SO SSeS AS SAA SN SRG SS ON AN | NN | || | SS AS OY ED 6 A |) | OD | OS | | | eT ONES GN SR OD RR (A | OD || | | | SS SS OG GO | | Fil 1 eS UO OO UU0 UOOU U U0O00;0 U UUDD U U U Vv) UV V) UU Y ) V, U Fo FA Fe Fa Fa Fs ® 4 TLF/0872-5 Logic Equations P= A 9 Bj Gj = AB) 1=0,1,2,3,4,5 Fy = Po ® Cn Fy = Py ® (Go + Po Cn) Fp = Po @ (Gy + PyGo + PyPoCn) Fg = Pg © (G2 + PaGy + PoPyGo + P2PsPoCn) F4 = Pq @ (Gg + PgGo + P3P2G1 + PaP2P1Go + PaP2P1PoCn) Fs = Ps © (Gq + PyGg + Pa4PgGo + P4PgP2G1 + P4PgP2P1Go + P4PaP2P1PoCn) P = PoPsPoPaPaP5 G = Ge F PEGs + PePaGg + P5PaGaGe + PePaPaPoGi + PoPaPaPaPiGo 3-195

o o S| Absolute Maximum Ratings Ss Above which the useful life may be impaired. (Note 1) It Military/Aerospace specified devices are required, Case Temperature under Bias (To) O'C to +85°C please contact the National Semiconductor Sales Vee Pin Potential to Ground Pin —70V to +0.5V Office/Distributors for availabilty and specifications. Input Voltage (DC) Vee to +0.5V Storage Temperature “85°C to + 150°C Output Current (DC Output HIGH) =50 mA Maximum Junction Temperature (Ty) +150°C Operating Range (Note 2) 5 7Vt0 -4.2V Vee = —4.5V, Voc = Veca = GND, To = 0°C to +85°C (Note 3) Symbol | Parameter [Min | Typ | Max | Units | Conditions (Note 4) Vou OuiputHIGH Voltage | -1025 | 955 | -e80 [| 1, | Vin=ViniMax) | Loading with Vou Output LOW Voltage [| -1810 | ~1705 or Vit (min) 50M to 2.0V Vi Input HIGH Voltage 4165 880 mv Guaranteed HIGH Signal | for All Inputs Vit Input LOW Voltage 410 4475 my | Guaranteed LOW Signal for All Inputs Vee = —4.2V, Voc = Voca = GND, Tc = 0°C to + 85°C (Note 3) Vou OutputHIGHVottage | -1020 | | 870 | .y, | Vin=ViniMen | Loading with Vou Output LOW Voltage —1810 1605 oF Vit (Min) 502 to ~2.0V Vouc Output HIGH Voltage —1030 Cow Vin = Vin (min) Loading with Vin Input HIGH Voltage _ Guaranteed HIGH Signal 1150 870 mv for All Inputs Vit Input LOW Voltage 4810 “4475 my | Guaranteed LOW Signal for All Inputs, im Input LOW Current 050 | Vin = Vit (Min) Veg = ~4.8V, Voc = Voca = GND, To = 0°C to +85°C (Note 3) Symbol | Parameter | Min | typ | Max | Units | Conditions (Note 4) Vou OutputHiGH Voltage [| -1095 | | -880 | 1, | Vin=Vinavan | Loading with Vou Output LOw'vortage | —res0 | | ~1620_| or Vii S08 fo = 20N Vouc OutputHIGH Voltage | 104 | | i Vin = Vin (min) Loading with Voc | OutputLowvoitage | | S| 1610 or Vit (Max) 502 to —2.0V Vin Input HIGH Voltage _ | _ Guaranteed HIGH Signal 1165 880 mv for All Inputs Vit Input LOW Voltage _ Guaranteed LOW Signal 1830 1490 mv for All Inputs 1 ue inputtow current | oso [| TA | Yin = Vici | Note 1: Absolute maximum ratings are those values beyond which the device may be darnaged or have its useful life impaired. Functional operation under these conditions is not implied Note 2: Parametric values specified at — 4.2V to ~ 4.8V. Note 3: The specified limits represent the “worst case” value for the parameter. Since these “worst case" values normally occur at the temperature extremes, ‘additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Note 4: Conditions for testing shown in the tables are chosen to guarantee operation under “worst case’ conditions. 3-196

Ver = —4.2V to —4.8V unless otherwise specified, Vcc = Voca = GND, Tc = 0°C to +85°C s Input HIGH Current _ ‘4 All Inputs ft om | mw | Yin = Vin ax) lee PowerSupplyGurrent_ [200 | -195 | -1a5_ | ma__| inputs Open Ceramic Dual-In-Line Package AC Electrical Characteristics Veg = —4.2V to —4.8V, Voc = Voca = GND teLH Propagation Delay tPLH Propagation Delay B 3.00 x 00 te An, Br to P 1.00 1.00 3. tPLH Propagation Delay tPLH Propagation Delay 410 400 | 110 390 | 110 4.00 tPHL Ty toFn tTLH Transition Time tTHL 20% to 80%, 80% to 20% 0.45 2.40 0.48 2.40 Cerpak AC Electrical Characteristics Vee = —4.2V to —4.8V, Voc = Voca = GND tPLH Propagation Delay teHL An, Bn to Fn 1.10 1.10 0 5 teu Propagation Delay teLy Propagation Delay . {PHL An, Bn toG st tPLH Propagation Delay 110 380 | 110 370 | 110 380 ns tPHL Cyto Fa tTLH Transition Time tTHL 20% to 80%, 80% to 20% 0.45 2.30 0.48 2.30 3-197