F0452B RENESAS | Alldatasheet
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Technical content
Datasheet sections
Features
Gain at 2.6GHz 34dB typical in High Gain Mode 28dB typical in Low Gain Mode 1.5dB NF at 2.6GHz +23dBm OIP3 at 2.6GHz OP1dB at 2.6GHz +15dBm in High Gain Mode +14dBm in Low Gain Mode 50Ω single-ended input / output amplifier impedances IDD = 130mA Independent Standby Mode for power savings Supply voltage: +3.15V to +3.45V 5 5 mm, 32-LGA package -40°C to +105°C exposed pad operating temperature range Block Diagram SW1_CTRL ATT1_CTRL STBY1 STBY2 SW2_CTRL ATT2_CTRL RX2_OUT VDD VDD SW1_IN SW2_IN RX1_OUT VDD VDD SW1_OUTSW2_OUT
Figure 1. Pin Assignments for 5 5 0.8 mm 32-LGA – Top View
Table 1. Pin Descriptions resistor is connected between this input and GND.
3 SW1_CTRL
6 SW2_CTRL
resistor connects between this input and GND. 10 RX2_OUT RF output path 2 matched to 50Ω. Use external DC block as close to the pin as possible. 18 SW2_IN RF2 switch input matched to 50Ω. Use an external DC block as close to the pin as possible. 23 SW1_IN RF1 switch input matched to 50Ω. Use an external DC block as close to the pin as possible. required for the application. 31 RX1_OUT RF output path 1 matched to 50Ω. Use an external DC block as close to the pin as possible. 20, 21 NC Not internally connected. required to achieve the specified RF performance.
for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings
1 Hour Single Event, 50% Duty Cycle
[a] TEPAD = Temperature of the exposed paddle. recommended input junction temperature is exceeded.
Table 3. Recommended Operating Conditions maximum junction temperature of 125°C. levels beyond what is specified in this table. Figure 2. Typical TX Input Power and Reduced Exposed Pad Temperature Profile
© 2019 Integrated Device Technology, Inc. 9 May 7, 2019
Electrical Characteristics
Table 4. Electrical Characteristics STBYx = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless otherwise noted.
© 2019 Integrated Device Technology, Inc. 10 May 7, 2019 Parameter Symbol Condition Minimum Typical Maximum Units Power ON from Standby Mode [b] SWON_STANDBY To RX Mode from Standby Mode 50% STBYx to RF output settled within ±0.1dB of final value 1 µs Power OFF to Standby Mode [b] SWOFF_STANDBY To Standby Mode from RX Mode 50% STBYx to gain below -25dB from maximum gain 1 µs [a] Items in the “Minimum”/“Maximum” columns in bold italics are guaranteed by test. Items in the “Minimum”/“Maximum” columns not in bold italics are guaranteed by design characterization. [b] fRF = 2.6GHz. Assumes the control signal is clean and no external RC circuitry is required on the pin. Adding RC circuitry increases swit ching time. Timing tests performed with a control logic signal of +3.3V and a rise/fall time ≤ 30ns.
Table 5. Electrical Characteristics: RX Path in RX Mode Cascaded Performance are guaranteed by design characterization.
Table 6. Electrical Characteristics: RX Path in RX Mode Cascaded Performance and TX Performance are guaranteed by design characterization. [b] In the OP1dB calculation formula, “G” denotes the gain of each part instance at the frequency of interest and appropriate HIGH / LOW gain state.
Table 7. Thermal Characteristics
Table 8. Gain Step Truth Table Table 9. Standby and RF Switch Truth Table In TX Mode, the amplifiers are OFF but the bias will remain ON for fast turn-on recovery time.
Figure 30. Electrical Schematic
Table 10. Bill of Material (BOM)
1 Printed Circuit Board F0453 EVKIT Stripline R2
pins and switch control pins as described in Table 9. The standby and switch control logic are shown in Figure 31. Figure 31. Standby and Switch Control Logic
© 2019 Integrated Device Technology, Inc. 24 May 7, 2019
Application Information
A common VDD power supply should be used for all pins requiring DC power. All supply pins should be bypassed with external capacitors to minimize noise and fast transients. Supply noise can degrade the noise figure, and fast transients can trigger ESD clamps and cause them to fail. Supply voltage change or transients should have a slew rate smaller than 1V / 20µs. In addition, all control pins should remain at 0V (±0.3V) while the supply voltage ramps up or while it returns to zero. Control Pin Interface If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit at the input of each control pin is recommended. This applies to control pins 1, 2, 3, 6, 7, and 8 shown in Figure 32. Figure 32. Control Pin Interface Schematic
© 2019 Integrated Device Technology, Inc. 25 May 7, 2019 Package Outline Drawings The package outline drawings are appended at the end of this document and are accessible from the link below. The package inf ormation is the most current data available. www.idt.com/document/psc/leg32-package-outline-50-x-50-mm-body-08-mm-thick-05mm-pitch-lga
Ordering Information
Orderable Part Number Package MSL Rating Shipping Packaging Temperature F0452BLEGK 5.0 5.0 0.8 mm 32-LGA MSL3 Tray -40° to +105°C F0452BLEGK8 5.0 5.0 0.8 mm 32-LGA MSL3 Reel -40° to +105°C F0452BEVB Evaluation Board Marking Diagram IDTF04 52BLEGK #YYWW$ LOT Lines 1 and 2 indicate the part number Line 3 indicates the following: “#” denotes stepping “YY” is the last two digits of the year; “WW” is the work week number when the part was assembled. “$” denotes the mark code. Line 4 is the lot number
© 2019 Integrated Device Technology, Inc. 26 May 7, 2019
Revision History
Revision Date Description of Change May 7, 2019 Initial release. Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138 www.IDT.com Sales 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com/go/sales Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herein referred to as “IDT”) reserve the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are d etermined in an independent sta te and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of a ny kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or non -infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property r ights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or regis tered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary . All contents of this document are copyright of Integrated Device Technology, Inc. All rights reserved.
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