ICP0444 MICROCHIP | Alldatasheet
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Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 1 Product Overview MICROCHIP’s ICP0444 is a three stage MMIC power amplifier in bare die form, fabricated using GaN on SiC technology. The PA operates from 2-8GHz with 44dBm output power, greater than 25% PAE and 30dB small signal gain. The die has integrated DC blocking capacitors and is matched to 50ohms on the RF input and output ports. ICP0444 is well suited to a variety of commercial and defense applications. Key Features Functional Block Diagram
- Frequency Range: 2-8GHz
- Pout: 44dBm @Pin=23dBm
- PAE: 25%
- Small Signal Gain: 27dB
- Bias: VD=28V, IDQ=200mA
- Technology: GaN on SiC
- CW operation
- Lead-free and RoHS compliant
- Die Size = 4.55mm x 3.8mm VG VG VGVD VD VD RF IN RF OUT
Applications
- Test and Measurement
- Communications
- Aerospace & Defense Electrical Specifications Parameter Min. Typ. Max. Units Conditions(1) Frequency 2 8 GHz Output Power 45 dBm Pin=23dBm, Freq = 2-6GHz Output Power 44 dBm Pin=23dBm, Freq = 6-8GHz Power Added Efficiency, PAE 25 % Pin=23dBm Small Signal Gain, S21 27 dB Input Return Loss 8 dB Output Return Loss 6 dB (1) Test Conditions unless otherwise stated: VD=28V, IDQ=200mA, TA=25°C, CW 2-8GHz 30W GaN POWER AMPLIFIER ICP0444
Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 2 Table of Contents
Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 3 1. Electrical Specific ation 1.1. Absolute Maximum Ratings Parameter Absolute Maximum Drain Voltage (VD) 30V CW Input Power 50Ohm, TA=25°C TBC dBm Channel Temperature 275°C Storage Temperature -65°C to +150°C Note: Exceeding any one or combination of these limits may cause permanent damage to this device. Microchip Technology Inc. does not recommend sustained operation near these survivability limits.
Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 17 2. Mechanical Drawing GND GND GNDGND VD2 VD3 VD3 VG1 VG2 GND VG3 GNDGNDVD2VD1VG3GNDVG2 GND GND GND RF IN RF OUT 1 2 3 4 5 6 7 8 9 1314151617181920 Units: mm | Thickness: | Backside of Die is RF and DC ground Pad No. Function Description
1 VG1(1) First stage gate bias, decoupling and bypass caps required
2, 20 VG2(1) Second stage gate bias, decoupling and bypass caps required 3, 5, 7, 8, 14, 15, 19 NC Pins can be connected to ground or left open circuit 4, 18 VG3(1) Third stage gate bias, decoupling and bypass caps required 6, 16 VD2(2) Second stage drain voltage, decoupling and bypass caps required 9, 13 VD3(2) Third stage drain voltage, decoupling and bypass caps required 10, 12, 21, 23 GND Ground Connection
11 RFout RF output, 50ohm, DC blocked
17 VD1(2) First stage drain voltage, decoupling and bypass caps required
22 RFin RF input, 50ohm, DC blocked
- V G1, VG2 and VG3 can be connected together in application 2. V D1, VD2 and VD3 can be connected together in application
Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 18 3. Applic ation Circuit RF OUT V G V D V D VG1 VG2 VG3 VD2 VD3 ICP0444VD1 VD2 VD3 RF IN U2 U3 U6 U5 U7U4 Bill of materials Component ID Value Details Qty U2 - U5 100pF 100pF Johanson SLC 4 U6, U7 10nF 10nF SLC 2 C1 - C3 10nF 10nF Capacitor, 10%, 50V, 0402 3 C4 - C6 1μF 1μF Capacitor, 10%, 35V, 0603 3 R1 5.1Ω 5.1Ω Resistor, 0402 1 R2 0Ω 0Ω Resistor, 0402 1
Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 19 4. E v aluation Board C1 C2 C5 R2 VG VD VD GND GND GNDGNDVD2 VD3 VD3 VG1VG2GNDVG3 GNDGNDVD2VD1VG3GNDVG2 GND GND GND RFIN RFOUT U2 U6 U3 U4 U5 VD VG VD GND GND GNDGND VD2 VD3 VD3 VG1 VG2 GND VG3 GNDGNDVD2VD1VG3GNDVG2 GND GND GND RF IN RF OUT U4 U5 VD VG VD PCB Construction Material Dimensions METAL_1_TOP Cu + ENIG 1oz Copper plated Electroless Nickel 3-5µm Inmersion Gold 0.5µm DIELECTRIC RO6002 10mils (254µm) METAL2_BOTTOM Cu + ENIG 1oz Copper plated Electroless Nickel 3-5µm Inmersion Gold 0.5µm Key
Features
VIA Drill 0.3mm VIA Plating Thickness 50-70µm 50Ohm LINE WIDTH 525µm
Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 20 5. Other c onsider ations Assembly Guidance Interconnect Assembly Notes Die Attach using Eutectic
- Ball bonding is preferred technique.
- Force, time, and ultrasonic parameters are critical.
- Aluminum wire bonding is not recommended.
- Bond wire diameter of 1mil is recommended.
- Flux-less gold-tin (AuSn) (80% Au, 20% Sn with a melting point of 280 ºC) preform is preferred between the die and attached surface.
- Recommended preform should be approximately 0.0012” thick.
- Die bonder using heated collet with a temperature of 310 ºC and die scrubbing should be used to ensure wetting and prevent formation of voids.
- Exposure to extreme temperature should be kept to a minimum.
- The optimum die attach environment is nitrogen atmosphere. Die Attach of Component using Adhesive Re-flow Process
- Vacuum collets are preferred method of pickup.
- Pickup method must consider the avoidance of die air bridges.
- Die suitable for eutectic and epoxy die attach.
- Where epoxy is used, high thermal conductivity Silver Sintered Epoxy is recommended.
- Kyocera CT2700R7S
- Namics H9889-1
- Maximum temperature 320 ºC for 30 seconds.
- Material matching for coefficient of thermal expansion is crucial for long-term reliability Optimum RF power performance achieved by minimizing output RF bond wire length. For optimum RF and thermal performance, Microchip recommends that the die assembly base plate be adequately bolted to a forced-air heat sink using a thermal graphite interface pad (Graphite Interface Material GCSP-017-G 170 µm thick) for optimal heat transfer. There are many variables of the second-level assembly between the die base plate and heat sink that Microchip is unable to control and the following guidance is provided as information only. Fixing bolts should be provided as close to the die as possible to ensure an optimum pressure between the base plate and the heat sink. The bolting screws used to attach the PCB assembly to the heat sink must include washers and be tightened with a suitable tightening pattern to ensure a uniform pressure. It is advised that all surfaces be cleaned and be free of grease and dust prior to fully aligning the assembly with all screws located and tightened to finger tight. Further torquing of the screws must be achieved in multiple phases using a star shaped pattern to a recommended torque of 2.5 N/m. Biasing Bias-up procedure Bias-down procedure 1. Set V G to -5V 2. Set V D to 28V 3. Adjust V G positive until ID quiescent is 200mA 4. Limit I D to 6A 5. Apply RF signal 1. Turn off RF 2. Turn off VD, allow drain capacitors to discharge 3. Turn off VG
Ordering, Shipping, and Handling Draft Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries B - 21 6. Ordering, Shipping, and Handling Handling R ec ommendations Integrated circuits are sensitive to electrostatic discharge (ESD) and can be damaged by static electricity. It is recommended to follow all procedures and guidelines outlined in the Microsemi application note AN01: GaAs MMIC Handling and Die Attach Recommendations. Ordering In f ormation For additional ordering information, contact your Microchip sales representative. Part Number Description ICP0444-1-110I 2-8GHz 30W GaN Power Amplifier, Bare Die in Gelpak Format EV57Z88A Dev Tool for ICP0444-1-110I, Fully Assembled Evaluation Board with RF Test Data
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