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5.6 GHz to 8.6 GHz, GaAs, MMIC, I/Q Downconverter Data Sheet HMC951A Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

Conversion gain: 13 dB typical Image rejection: 32 dBc typical Input P1dB compression: −6 dBm typical Input IP3: 3 dBm typical, 6.0 GHz to 8.6 GHz Noise figure: 2 dB typical LO to RF isolation: 48 dBm typical LO to IF isolation: 13 dBm typical RF to IF isolation: 10 dBm typical Amplitude balance: 0.2 dB typical Phase balance: −2° typical RF return loss: 10 dB typical LO return loss: 15 dB typical IF return loss: 15 dB typical Exposed paddle, 4 mm × 4 mm, 24-lead, LFCSP

APPLICATIONS

Point to point and point to multipoint radios Military radars, electronic warfare, and electronic intelligence Satellite communications Sensors FUNCTIONAL BLOCK DIAGRAM 16348-001 NIC VDRF NIC GND RFIN GND NIC

14 NIC

15 NIC

16 VDLO

17 NIC

18 NIC

20 IF2

21 GND

22 GND

23 IF1

24 GND

Figure 1. GENERAL DESCRIPTION The HMC951A is a compact gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), in-phase quadrature (I/Q) downconverter in a RoHS compliant package that operates from 5.6 GHz to 8.6 GHz. This device provides a small signal conversion gain of 13 dB with a noise figure of 2 dB and an image rejection of 32 dBc. The HMC951A uses a low noise amplifier (LNA) followed by an image mixer that is driven by a local oscillator (LO) buffer amplifier. The image reject mixer eliminates the need for a filter following the LNA and removes thermal noise at the image frequency. The IF1 and IF2 mixer outputs are provided and an external 90° hybrid is needed to select the required sideband. The I/Q mixer topology reduces the need for filtering of unwanted sideband. The HMC951A is a smaller alternative to hybrid style, single sideband (SSB) downconverter assemblies, and it eliminates the need for wire bonding by allowing the use of surface-mount manufacturing techniques. The HMC951A is available in 4 mm × 4 mm, 24-lead lead frame chip scale package (LFCSP) and operates over the −40°C to +85°C temperature range. An evaluation board for the HMC951A is also available upon request.

Rev. A | Page 2 of 31 TABLE OF CONTENTS

REVISION HISTORY

4/2018—Rev. 0 to Rev. A 3/2018—Revision 0: Initial Version

Rev. A | Page 3 of 31 SPECIFICATIONS 5.6 GHz TO 6.0 GHz TA = 25°C, intermediate frequency (IF) = 1000 MHz, VDRF = VDLO = 5 V, local oscillator (LO) power = 0 dBm, unless otherwise noted. Measurements performed with lower sideband selected and an external 90° hybrid at the IF ports, unless otherwise noted. Table 1. Parameter Min Typ Max Unit OPERATING CONDITIONS Frequency Range Radio Frequency (RF) 5.6 6.0 GHz LO 4.5 12.1 GHz IF DC 3.5 GHz LO Drive Range −4 0 +4 dBm PERFORMANCE Conversion Gain 10 13 dB Image Rejection 20 32 dBc Input Power for 1 dB Compression (P1dB) −6 dBm Input Third-Order Intercept (IP3) 0 2 dBm Amplitude Balance 0.2 dB Phase Balance −2 Degree Isolation LO to RF 40 48 dB LO to IF 9 13 dB RF to IF 10 dB Noise Figure 2 2.5 dB Return Loss RF 10 dB LO 15 dB IF 15 dB POWER SUPPLY Drain Current Low Noise Amplifier (IDD1) 75 85 mA LO Amplifier (IDD2) 80 95 mA Total Drain Current (IDD) 155 mA

Rev. A | Page 4 of 31 6.0 GHz TO 8.6 GHz TA = 25°C, intermediate frequency (IF) = 1000 MHz, VDRF = VDLO = 5 V , local oscillator (LO) power = 0 dBm, unless otherwise noted. Measurements performed with lower sideband selected and an external 90° hybrid at the IF ports, unless otherwise noted. Table 2. Parameter Min Typ Max Unit OPERATING CONDITIONS Frequency Range Radio Frequency (RF) 6.0 8.6 GHz LO 4.5 12.1 GHz IF DC 3.5 GHz LO Drive Range −4 0 +4 dBm PERFORMANCE Conversion Gain 10 13 dB Image Rejection 20 32 dBc Input Power for 1 dB Compression (P1dB) −6 dBm Input Third-Order Intercept (IP3) 1 3 dBm Amplitude Balance 0.2 dB Phase Balance −2 Degree Isolation LO to RF 40 48 dB LO to IF 9 13 dB RF to IF 10 dB Noise Figure 2 2.5 dB Return Loss RF 10 dB LO 15 dB IF 15 dB POWER SUPPLY Drain Current Low Noise Amplifier (IDD1) 75 85 mA LO Amplifier (IDD2) 80 95 mA Total Drain Current (IDD) 155 mA

PCB thermal design is required. JC is the junction to case (or die to package) thermal resistance. Table 4. Thermal Resistance

1 Thermal impedance simulated values are based on a JEDEC 2S2P test board

  1. NIC = NOT INTERNALLY CONNECTED. HOWEVER, THESE
  2. EXPOSED PAD. CONNECT TO A LOW IMPEDANCE THERMAL

AND ELECTRICAL GROUND PLANE. Figure 2. Pin Configuration Table 5. Pin Function Descriptions typical application circuit (see Figure 96) for the required external components. be connected to RF/dc ground. typical application circuit (see Figure 96) for the required external components. EPAD Exposed Pad. Connect to a low impedance thermal and electrical ground plane. Figure 3. VDRF, VDLO Interface Figure 4. GND Interface Figure 5. RFIN Interface Figure 6. LOIN Interface Figure 7. IF2, IF1 Interface

Rev. A | Page 25 of 31 SPURIOUS PERFORMANCE Mixer spurious products are measured in dBc from the RF output power level. Spur values are (M × RF) − (N × LO). N/A means not applicable. M × N Spurious Outputs, IF = 150 MHz RF = 5600 MHz, LO frequency = 5750 MHz at LO input power = 0 dBm, RF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 15 33 18 34

RF = 6100 MHz, LO frequency = 6250 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 18 26 27 29

RF = 8500 MHz, LO frequency = 8650 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 16 13 23 28

M × N Spurious Output, IF = 1000 MHz RF = 5600 MHz, LO frequency = 6600 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 16 24 26 42

RF = 6100 MHz, LO frequency = 7100 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 17 14 21 32

RF = 8500 MHz, LO frequency = 9500 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 13 19 13 39

Rev. A | Page 26 of 31 M × N Spurious Outputs, IF = 3100 MHz RF = 5600 MHz, LO frequency = 8700 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 21 14 23 37

RF = 6100 MHz, LO frequency = 9200 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 16 19 14 29

RF = 8500 MHz, LO frequency = 11600 MHz at LO input power = 0 dBm, IF input power = −20 dBm. N × LO 0 1 2 3 4 M × RF

0 N/A 4 24 27 0

Rev. A | Page 27 of 31 THEORY OF OPERATION The HMC951A is a compact GaAs, MMIC, I/Q downconverter in a RoHS compliant package optimized for point to point and point to multipoint microwave radio applications operating in the 5.6 GHz to 8.6 GHz input RF frequency range. The HMC951A supports LO input frequencies of 4.5 GHz to 12.1 GHz and IF output frequencies of dc to 3.5 GHz. The HMC951A uses an RF LNA amplifier followed by an I/Q double balanced mixer, where a driver amplifier drives the LO (see Figure 1). The combination of design, process, and packaging technology allows the functions of these subsystems to be integrated into a single die, using mature packaging and interconnection technologies to provide a high performance, low cost design with excellent electrical, mechanical, and thermal properties. In addition, the need for external components is minimized, optimizing cost and size. LO DRIVER AMPLIFIER The LO driver amplifier takes a single LO input and amplifies it to the desired LO signal level for the mixer to operate optimally. The LO driver amplifier is self biased, and it only requires a single dc bias voltage (VDLO) to operate. The bias current for the LO amplifier is 80 mA at 5 V typically. The LO drive range of −4 dBm to +4 dBm makes it compatible with Analog Devices, Inc., wideband synthesizer portfolio without the need for an external LO driver amplifier. MIXER The mixer is an I/Q double balanced mixer, and this mixer topology reduces the need for filtering the unwanted sideband. An external 90° hybrid is required to select the desired sideband of operation. LNA The LNA is self biased, and it requires only a single dc bias voltage (VDRF) to operate. The bias current for the LNA is 75 mA at 5 V typically. The typical application circuit (see Figure 96) provided shows the necessary external components on the bias lines to eliminate any undesired stability problems for the RF amplifier and the LO amplifier. The HMC951A is a much smaller alternative to hybrid style image reject converter assemblies, and it eliminates the need for wire bonding by allowing the use of surface-mount manufacturing assemblies. The HMC951A downconverter comes in a compact, 4 mm × 4 mm, 24-lead LFCSP. The HMC951A operates over the −40°C to +85°C temperature range.

Figure 100. EV1HMC951ALP4 Evaluation Board Top Layer Table 6. Bill of Materials for the EV1HMC951ALP41, 2 Evaluation Board PCB

1 Not applicable PCB, EV1HMC951ALP4; circuit board material:

4 J3, J4 Johnson connectors, SRI Johnson Components 142-0701-851

1 J5 Header connectors, 2 mm, four vertical positions, SMT Molex 87759-0414

1 J6 Header connectors, 2 mm, four vertical positions, SMT Molex 87759-0614

6 C1, C4, C6, C8, C10, C13 Ceramic capacitors, 100 pF, 5%, 50 V, C0G, 0402 Kemet C0402C101J5GACTU

1 Reference this number when ordering the evaluation board PCB. 2 This is a generic evaluation board. Some components or bias lines shown in Figure 100 are not used for the HMC951A.

0.02 NOM

0.20 REF

0.20 MIN

Figure 101. 24-Lead Lead Frame Chip Scale Package [LFCSP], 1 The HMC951ALP4E and the HMC951ALP4ETR are RoHS Compliant Parts. 2 See the Absolute Maximum Ratings section. registered trademarks are the property of their respective owners.