ETA5095 ETA | Alldatasheet
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Technical content
www.etasolution.com 1 Powering Minds of the SmartS 40V Input, 150mA Linear Regulator DESCRIPTION FEATURES ETA5095 is a linear regulator features wide input range, high power -supply rejection ratio(PSRR) and low noise . The device provides fixed output voltages of 3.3V and 5V. The output voltage is also adjustable. It can be programmed by a resistor divider from 1.5V to 24V. The device also includes short circuit protection, over voltage protection and thermal shutdown. The shutdown current of ETA5095 is as low as 2uA. Therefore, ETA5095 is an ideal power supply for power delivery, personal digital assistants, low power battery-powered applications. ETA5095 is available in SOT23-5 and SOT89-3 Wide Input Voltage Range: From 6V to 40V Programmable Output Voltage: From 1.5V to 24V Up to 150mA Output Current Very Accurate Output Voltage: 3% Over Temperature and Input Voltage Accurate EN threshold for setting external UVLO High PSRR, 60dB Integrated Thermal and Current Limit
APPLICATIONS
Space-Sensitive Applications Battery-Powered Equipment Cordless and Mobile Phones Industrial and Medical Equipment Portable Equipment TYPICAL APPLICATION OUT ETA5095 (SOT23-5) IN FB/NC EN GND CIN COUT OUTPUTINPUT *R1 *R2 Enable Input * R-Divider only for adjustable version VOUT= R1+R2 X VFB VOUT ETA5095 VIN GND CIN COUT OUTPUTINPUT (SOT89-3) ORDERING INFORMATION PART No. PACKAGE TOP MARK Pcs/Reel ETA5095S2F SOT23-5 JFYW 3000 ETA5095V33S2F SOT23-5 JPYW 3000 ETA5095V50S2F SOT23-5 JZYW 3000 ETA5095V33S8D SOT89-3 JPYW 1000 ETA5095V50S8D SOT89-3 JZYW 1000
www.etasolution.com 2 Powering Minds of the SmartS PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS VIN GND EN VOUT FB/NC SOT23-5 ETA5095 ETA5095 GND VOUT GND VIN SOT89-3 1 2 3 Figure 1: Pin Configuration (Note: Exceeding these limits may damage the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability.) Thermal Resistance θ JC θJA
ELECTRICAL CHARACTERISTICS
(VIN = VOUT(TYP)+≥1V, unless otherwise specified. Typical values are at TA = 25oC.) SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN_RANGE Input Supply Range 6 40 V UVLO Under Voltage Lock Output VIN Rising 6 V UVLO Hysteresis VIN Falling 500 mV OVP IN Over Voltage Protection Threshold VIN Rising 40.5 44 V OVP Hysteresis VIN Falling 1 V IQ Quiescent Current EN = Floating 75 200 µA ISD Shutdown Current EN = 0V 2 5 µA VDROP Dropout Voltage VOUT = 12, IOUT = 100mA 1 1.5 V VOUT_RANGE Output Voltage Range 1.5 24 V VOUT_ACC Output Voltage Accuracy TJ=25°C -2 +2 % VFB FB Pin Regulation Voltage TJ=25°C 1.083 1.1 1.117 V -40°C<TJ<125°C 1.075 1.1 1.125 V ILIM Output Current Limit 150 mA IFB Foldback Current Limit VOUT = 0V 20 mA VLOAD Static Load Regulation 1mA<IOUT<150mA 0.003 %/mA VLINE Static Line Regulation VOUT + 2V < VIN <40V 0.05 %/V
www.etasolution.com 3 Powering Minds of the SmartS SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Noise Output Noise Voltage VOUT = 3.3V, integrated noise (10hz – 20khz) 250 µVRMS PSRR Power Supply Rejection Ratio Frequency = 1kHz, no output cap 60 dB Frequency = 10kHz, no output cap 50 dB TSHUT Thermal Shutdown Threshold 150 ˚C Thermal Shutdown Threshold Hysteresis 30 TEN Enable Delay Time 300 µs VHI Enable Input Logic High EN Pin Voltage Rising 1.1 1.18 1.26 V VLO Enable Input Logic Low EN Pin Voltage Falling 1 V IEN Enable Pin Input Current VEN = 24V 2 µA PIN DESCRIPTION SOT23-5 PIN # SOT89-3 PIN# PIN NAME DESCRIPTION 1 1 IN Input Supply Pin 2 2 GND Ground Pin 3 NA EN Enable Pin. Drive it high to enable IC, drive it low to disable
4 NA FB/NC
Feedback pin for output voltage configuration, FB only for adjustable voltage version, fixed voltage version internal no connection 5 3 OUT Output of regulator
www.etasolution.com 4 Powering Minds of the SmartS FUNCTIONAL BLOCK DIAGRAM OUT ETA5095 IN FB/NC BANDGAP UVLO OVP TSD EN DRIVER GND OAMP ILIM Figure 2: Functional Block Diagram
www.etasolution.com 5 Powering Minds of the SmartS TYPICAL PERFORMANCE CHARACTERISTICS (TA=25°C, VIN = 12V if not specified) 0 5 10 15 20 25 30 35 Iq (uA) Vin(V) Iq Vs. Vin Iq -50 0 50 100 150 Iq (uA) Temperature (℃) Iq Vs. Temp 0.5 1.5 2.5 3.5 0 50 100 150 200 250 300 Vout(V) Iout(mA) Vout Vs. Iout -45 5 55 105 Vout(V) Temperature(℃) Vout Vs. Temp Vout=3.3V Vout=5V 3.1 3.15 3.2 3.25 3.3 3.35 3.4 0 20 40 60 80 100 120 140 160 Vout(V) Iout(mA) Load Regulation Vin=7V Vin=12V Vin=24V 3.1 3.15 3.2 3.25 3.3 3.35 3.4 0 5 10 15 20 25 30 35 40 45 Vout(V) Vin(V) Line Regulation no Load Iout=10mA Iout=100mA 100 0.1 1 10 100 1000 10000 PSRR(dB) Frequency(kHz) PSRR Vs. Freq, Iout=1mA no Cout 1uF Cout 10uF Cout 100 0.1 1 10 100 1000 10000 PSRR(dB) Frequency(kHz) PSRR Vs. Freq, Cout=1uF 1mA 10mA 100mA
www.etasolution.com 6 Powering Minds of the SmartS TYPICAL PERFORMANCE CHARACTERISTICS CONT’D (TA=25°C, VIN = 12V if not specified) Output Load Transient without any Capacitor, VIN = 12V, VOUT = 3.3V Output Load Transient with COUT = 100nF, VIN = 12V, VOUT = 3.3V Output Load Transient without any Capacitor, VIN = 24V, VOUT = 12V Output Load Transient with COUT = 100nF, VIN = 24V, VOUT = 12V Line Transient Without Output Capacitor, VOUT = 3.3V, IOUT = 10mA Line Transient Without Output Capacitor, VOUT = 12V, IOUT = 12mA
www.etasolution.com 7 Powering Minds of the SmartS FUNCTIONAL DESCRIPTION General Description The main feature of the ETA5095 is its capability to operate with wide input range and with small input and output capacitors. ETA5095 use a new architecture of LDO to have sufficient phase margin over all positions of the output capacitor pole. It also includes protection features like input over voltage protection, short circuit protection and thermal shutdown. Enable Sequence ETA5095 is enabled when all following conditions occur: EN pin voltage is greater than a logic high, UVLO < VIN < OVP, Junction temperature is less than Thermal Shutdown, Once all above conditions are occurred, ETA5095 will be enabled after 500us. In case any of above conditions is not correct, ETA5095 will be in shutdown mode. EN pin is internally pulled up to a Logic High. Output Current Limit and Foldback Current Limit ETA5095 guarantees 150mA output current for all output voltage configuration, so it is designed with 250mA (typically). ETA5095 current limit is reduced when output voltage is less than 75% of the configuration. The reduction is linearity and finish when output voltage is at 25% when the limit is only 20mA (typically) left. This feature will make sure ETA5095 will always do its start -up successfully with any load less than maximum loading. Over-Temperature Protection Thermal protection disables the output when the junction temperature rises to approximately 150oC, allowing the device to cool down. When the junction temperature cools to approximately 120°C, the output circuitry is again enabled. Depending on power dissipation, ther mal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits regulator dissipation, protecting the device from damage as a result of overheating.
APPLICATION INFORMATION
ETA5095 does not require high capacitors at both VIN and VOUT pins for stability. Using 100nF capacitor at VOUT will be suitable for the output voltage up to 8V, with any load type. Using 220nF capacitor at VOUT will be suitable for the output voltage up to 14V, with any load type.
www.etasolution.com 8 Powering Minds of the SmartS External Output Voltage Setting In external Output Voltage Setting Version selected, the ETA5095 regulator is programmed using an external resistor divider. The output voltage is calculated using below equation. 𝑉𝑉𝑂𝑂𝑂𝑂𝑂𝑂 = 𝑉𝑉𝐹𝐹𝐹𝐹 × 1 + 𝑅𝑅1 𝑅𝑅2 Resistors R1 and R2 should be chosen for approximately 40μA divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistors values can cause accuracy issues. The recommended design procedure is to choose R 2 = 20kΩ to set the divider current at 40μA, then R1 is calculated using below equation. 𝑅𝑅1 = 𝑉𝑉𝑂𝑂𝑂𝑂𝑂𝑂 𝑉𝑉𝐹𝐹𝐹𝐹 −1× 𝑅𝑅2 PACKAGE OUTLINE
www.etasolution.com 9 Powering Minds of the SmartS PACKAGE OUTLINE(Con’t)