ET2716 STMICROELECTRONICS | Alldatasheet
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COMPONENTS ET2716(Q) ¢ ET2716(0)-1 . T_ IN Jy S81-BIT (2048 * 8) UV ERASABLE PROM —_MOSTEX_ MEMORY COMPONENTS. The ET2716 is a high speed 16K UV erasable and electrically repro- grammable EPROM ideally suited for applications where fast turn- Sround and pattern experimentation are important requiements, NMOS The £12716 1s packaged in a 24-pin dual-in-line package with transparent lid. The transparent tid allows the user to expose the 16,384-BIT chip to ultraviolet light to erase the bit pattern. A new pattern can _ then be written into the device by following the programming proce- (2048 x 8) dure UV ERASABLE PROM This EPROM is fabricated with the reliable, high volume, time pro- ven, N-channel silicon gate technology X- MOS # 2048 « 8 organization + 525 mW max active power, 132 mW max standby power * Low power during programming * Access time ET2716-1, 350ns ; E2716, 450ns , Single 5V power supply Pe © Static-no clocks required . anties © Inputs and outputs TTL compatible during both read and program 24 vee OsuFFix modes t CEROIP PACKAGE * Three-state output with OR-tie capability 1 BLOCK DIAGRAM: — ey PIN AgSIGNMENT ev — ws cro Ara ourPurs wnocnam nurs wi 7 ablvce ; === ae? 2p] = Oc —o CONTROL PROGRAM sQ3 apa rouse —>| tere ua afl vee H if as alae crcct aCe 19D aro a Q7 181) Geran rm) co - te) wos Daren 2 soos - | IK 00,00) fa 1 Hogan cay ce PL BY et | oven Hi ve Aewren we 07 Qi 14 Doe oo ves Qr2 13 []%109 Pin Connection During Read or Program PIN NAME/NUMBER. PIN NAMES* ce/pom (er) ver | vec A0-A10 ‘Address Inputs a a | 26 Qg-07 (Q0-07)| Dats Outputs our CE/PGM (E/P) | Chip Enable/Program Read vie vey 8 u OE (G) Output Enable Program | Pulses VIL | vin | 25 DIN ver Read SV, Program 25V to VIM vec Power (SV) *Symbolt i parenthews ae propowed JEDEC senderd vss Ground
ABSOLUTE MAXIMUM RATINGS (Note 1) ‘Temperature Under Bias —19 Cweerc ‘All input oF Output Voltages with Storage Tempersture = 08 Co + 128°C Respect to VSS (except VPP) ov to - Ov ‘VPP Supply Voltage with Respect to VSS -28.5V to - 03V Power Dissipation 1sW ; Lead Temperature (Soldering. 10 seconds) 300 6 READ OPERATION (Note 2) DC OPERATING CHARACTERISTICS (Note 3) Ta= 0° Cto + 70°C, VCC = BV + 5% for ETZ716, VCC = SV + 10 % for ETZ7I61 VPP = VCC (Note 4), VSS = OV, (Unless otherwise specified) : es CC a SL a A ca PO a Se Ce Ce A OS OY (icer | veo supp curonund | cevow-vmdeva [= [io [as na veer | vere curen cw [ cerom ceva [= fs fw fw] we | moatowvome ee Po [vor | owwarianvowse | vom ceoova ee PT a OC) AC CHARACTERISTICS Ta = 0° C to + 70°C, VCC = SV +5% for E2716, VCC = SV + 10% for ET2716-1 VPP = VCC (Note 4), VSS = OV, (Unless otherwise specitied) [ syweon Lerner | erze | Paes Tine | narenwouesbom | Eronoe-we | - [x | = [oo [aI ice recov [@wowwnonm ——ateva = Pe Po [| . Pacer Posmstnonnoombm [etrewova | Pw fw [| [ior [renar [ ono enownaioounez | cerom-ve [0 [wo |e [vo [I ; [nox | natewsonorvos [ trew-or-ve fo | - [>| - | | Ei tiee [econ pew — Pefbolefels| AG Test Conditions CAPACITANCE (Note 5) : Tas 26°C, 1 1 MMe ‘Output Load : 1 TTL gate and CL. = 100 pF Input Rise and Fall Times 20s ; Input pulse levels :0.45V to 24V Sywor | ranameren [conoitions [ve [ wax | units | ‘Trning measurement reterence evel = [oe [roncwemnn funny [ef | on wos Oa opus a aro [Ceo [owenceresura [vour-ov Le | [or] Note 1 : “Absolute Maximum Ratings” are those values beyond which the salety of the device cannot be guaranteed, Except for ote ing Tenuetature Range: iney are not meant to imply that the devices should be operated at these limits The table of "Electrical Characterities” provides conditions for actual device operation Note 2 : VCC must be applied at the same time or before VPP and removed after of at the same time as VPP Note 3 : Typical conditions are for operation at - Ta = 25%C. VCC = SV. VPP = VCC. and VSS = OV Note 4 : VPP may be connected to VCC except during program Note § :Capacitonce is guaranteed by periodic testing Ta = 25°C. 1= 1 MHz
SWITCHING TIME WAVEFORMS: Read Cycle (CE/PGM = VIL) ae akin ovrvuremase r\\ vw ——— Paw \\2r + —§ Jae «TeHaz) von ravavy vom = i .. : vou Read Cycle (OF = VIL) vin Ba Akan : vin — onmenanee | \\ vu ‘ ‘ we eon rend von Vive vou ‘Standby Power Down Mode (OE = VIL) : vin 2 ADDRESSES vauo VAUD vu vm hon CHIP ENABLE STANDBY active sTANOBY vi top ace ‘TeMaz) ‘AV vou =F ez ‘VALID FOR Wd VALIO FOR ourPuT , cunnewr aopress |) {| __cuanent anoness + Symbols in parentheses are proposed JEDEC standard 25 ;
DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (Notes 1 and 2) : (Ta = 25°C = 5°C) (VEC = SV + 5%, VPP = 25V + 1) [vt | rrortowenes | nt Ts ee ‘AC CHARACTERISTICS AND OPERATING CONDITIONS (Notes 1, 2. and 6) SYMBOL TYP ‘UNITS : [as [tam lawns te | | | . a [Lar | asarannowtine : ea 0 a [oer Leone i ep a@ fe fom] a a Le tran Lomein ps p= fo Note 4 : CE/PGM = VIL. VPP = VCC
The ET2716 is programmed by introducing “0” s into ‘one by controlling which ones receive the program Fe eee Tes ane ahaa bby) as pulse aime aputsoftne ETET® maybepsane time. Any individual address, a sequence of addresses, led. Pulsing the program pin (from VIL to VIH) will pro- : irscarclins thesar'arsign may se propamnad. _gramasint wile mustiegin progrem pul o aur Any or all of the 8 bits associated with an address will keep it from being programmed and keeping OE = Treen a we prartmees anh sang program vit wilfpu ie outpuss nthe HE ite (eine aprind to ihe op enable in All onus voeaye Paves telus ne program etc on chip arabe se Tit attoeonls The peyremmng sequence — enasina ‘With VPP = 25V. VCC = 5V, OE = VIH and CE/PGM = The ET2718 is erased by exposure to high intensity : VIL, an address is selected and the desired data ultraviolet light through the transparent window. This Word is applied to the output pins. (VIL = “O"'and exposure discharges the floating gate to its inital state vit = “1” for both address and data). After the through induced photo current It is recommended that address and data signals are stable the program. the ET2716 be kept out of direct sunlight. The UV pin is pulsed from VIL to VIM with a pulse width content of sunlight may cause a partialerasure of some between 45 ms and 55 ms. bits in a retatively short period of time. : Mutipe pulses are ot needed but wil ot cause siete Ptoe’ Ho" pee thou be a open A hgh ; level (VIH oF higher) must not be maintained longer {An ultraviolet source of 2537 A yielding a total integra: than Tryvpaaxron ‘the program pin during program- ted dosage of 15 watt-seconds/cm? is required. This ming. ET2716's_ may be programmed in paraliel with will erase the part in approximately 15 to 20 minutes if the dame data in te moe TUviamp witha 12 000 08 pom rating nosed Tne ETING rave orned soca eplocest ieanomsy trom ta leg nena fiters shoud be aed Program Verity Mode the programming of the £12716 may be verfiad ether : 1 word at a time during the programming (as shown in An erasure system should be calibrated periodically. the timing diagram) or by reading all of the words out at ‘The distance from lamp to unit should be maintained at the end of the programming sequence This can be 1 inch. The erasure time is increased by the square of done with VPP = 25V (or 5V}in either case. VPP must be the distance (if the distance is doubled the erasure : sreVterallopeating medesondcan bemamtoinadar negates, (f te dtance i doubled the erasure 28V for all programming modes they age When @ lamp 18 chenged, the distence is chenoed or te oma aged. ayntam thous be ; chechod to mato cara tal oestre we aocurng Program Inhibit Mode incomplete erasure will cause symptoms that can be . mmoloading.‘Propranmers components, na sytem The programinneit node slawapcogramming seers! Gaara Rave bean atanscubysusparad ahh EieeR"Tmanccuny hatter Seatoreccn ieoaylete erasure mas tne bea probion PHYSICAL DIMENSIONS inches (miimeters) : __ #t (BoenaSiooanel = i weet owe tes wt uss gama am, = j LL ORE vem ames PTET a EY Fee cee) | tbe big om aia UV window Cavity Dual-In-Line Package (JQ) Order Number ET27160 (-, 1) Package Number J24 CO Tham sctanten w prm chat wnt nn ome ng noe See en en oh shen aka 27 ;
TIMING DIAGRAM * Program Mode = PROGRAM = ___ PROGRAM veRiFY joevin ‘oevity vt ws ‘DATA Out raven a Wali Rooress x pata Nf cara in staat f \\ DATA IN STABLE ww CURRENT ABO HY poe ‘or L. cia, OF : (Ténazy ad arenas evi — ot eu tos |_, Linton qroven! = | ‘ew fe cSSne | arene ro ‘on ze Zi? ? hp iron! we not va. Pe crea eH) = PLL DEVICE OPERATION The £12716 has 3 modes of operation in the normal ‘Standby Mode (Power Down} system environment. These are shown in Table | The €12716 may be powered downto the standby mode by making CE/PGM = VIH This is independent of OF Read Mode ‘and automatically puts the outputs in their Hi-Z state. The ET 2716 read operation requires that OE = VIL, The power is reduced to 25 % (132 mW max) of the GEVPCM = VIL and that addresses AO--A10 have been _—_normal operating power, VCC and VPP must be mainte- Stabilized. Valid deta will appear on the output pins _ned at BV. Access time at power up remains either tac after tACC. LOE OF ICE times (see Switching Time —_or {cE (see Switching Time Waveforms). : Waveforms) depending on which is limiting, Deselect Mode on mina The ET 2716 is deselected by making OE = VIH. This OGRAM! mode is independent of CE/PGM and the condition of /~——The ET 2716 is shipped from THOMSON SEMICON, : the addresses. The outputs are Hi-Z when OE = VIH. DUCTEURS completely erased. All bits will be at "1" This allows OR-tying 2 or more E12716's for memory _level (Output high) in this initial state and after any full ‘expansion. erasure, Table II shows the 3 programming modes. ; TABLE I. OPERATING MODES (VCC = VPP = SV) : cE/PGM ouTPuTs ‘ er) : . 18 9-11,13-17 Read vit vit out 2 Deselect | Don't Care | VIM Hz Standby vin | Don'tCae] Miz TABLE 1, PROGRAMMING MODES (VCC = 5V} PIN NAME/NUMBER zewcm | oe | ver | oureursa (EP) cc) 18 20 | 21 | 9-19.13-17 Progam Pasea vit | vin | 25 on to VIM Program Versty vie vit | 25:1 | 00uT Progam inhibit vit vn | 25 Hz « symbols n parentheses are proposed JEDEC standard 2-8