ET1511A ESMT | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 12
Technical content
Features
1.8V to 5.5V operation voltage range 1.8V input pulse driving Ultra low saturation voltage - 0.36V@200mA, VDD=5V - 0.57V@300mA, VDD=5V Ultra-low standby current Build-in MOSFET shoot through protection circuit to pre vent from device damage by fast output transient SOT23-6L package A/B versions selectable - Ver. A in dual-wire control - Ver. B in one-shot mode control
Applications
IR surveillance camera filter driver Body worn video Wearable IR camera Smart locker
Description
ET1511A/B is an infrared filter switch driver IC which designed for filter control driving in IR cut module in camera. ET1511A /B could functions as a one-channel, low output headroom voltage, bi-directional H -bridge driver by appropriate input controls. Build -in protection diode circuit can minimize the disturbance caused by the feedback current when IR cut is shutdown or ESD transient pulses appeared. The output driver impedance of ET1511A/B is 2 in typical. The current driven through the act uator is determined by the impedance of the IR cut. In case of 5V power supply, the 300mA driving current through actuator is around 300mA with 0.48V output voltage headroom. There are 2 versions (Ver. A and Ver. B) of ET1511, which offers to support singl e-wire input control, dual-wire input control, and one-shot control. In one -shot control mode, the on time could be configured by external capacitor. Simplified Application Circuit
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 2/12 Pin Assignments Pin Description Pin Name Pin No. I/O DESCRIPTION ENB (ET1511A) I ENB input. - Single-wire control mode, ENB is active low. - Dual-wire control mode, ENB and FBC are used for 2 -wire control. CE (ET1511B) I Connect to external capacitor. (One-shot mode control only.) GND 2 P System ground. FBC 3 I Forward/Backward control OUT1 4 O Half-bridge driver output 1 VDD 5 P Power supply OUT2 6 O Half-bridge driver output 2
Ordering Information
Product ID Package Packing / MPQ Comments ET1511A SOT23-6L
3000 Units / Reel
3000 Units / Small Box
Line 1：Product Name Line 2：Tracking Number
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 3/12 Absolute Maximum Ratings Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. SYMBOL PARAMETER TEST CONDITIONS MIN MAX UNIT VDD Supply voltage VDD -0.3 7.0 V VIN Input pin voltage ENB, FBC, CE -0.3 7.0 V IOUT Output current Continuous operation 500 mA 50% duty pulse output 600 TA Operating ambient temperature range -40 85 oC Tstg Storage temperature range -55 150 oC ESD Human Body Model ±2K Charged Device Model ±1K (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, which do not imply functional operation of the device at these or any other conditions beyond those indicated under RecommendedOperating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. (3) Power dissipation and thermal limits must be observed. Recommended Operating Conditions SYMBOL PARAMETER TEST CONDITIONS MIN MAX UNIT VDD Supply voltage VDD 1.8 5.5 V VIN Input pin voltage ENB, FBC, CE 0 5.5 V IOUT Output current Continuous operation 400 mA Thermal Information Package Type Device No. θJA(℃/W) θ JC(℃/W) Ψ JT(℃/W) Exposed Thermal Pad SOT23-6L ET1511A/B 210.3 105 6.1 None Note 1.1 : θ JA is simulatedon a room temperature ( TA=25℃), natural convection environment test board , which is constructed with a thermally efficient, 4 -layers PCB (2S2P). The measurement is simulated using the JEDEC51-5 thermal measurement standard. Note 1.2: θ JC represents the thermal resistance for the heat flow between the chip junction and the package\stop surface. It\s extracted from the simulation data with obtaining a cold plate on the package top. Note 1.3: ΨJT represents the thermal parameterfor the heat flow between the chip junction and the package\s top surface center. It\s extracted from the simulation data for obtainingθ JA, using a procedure described in JESD51-5.
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 4/12
Electrical Characteristics
VDD=5V,TA=25°C (unless otherwise noted) SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT VDD Supply voltage Normal operation 1.8 5.0 5.5 V IVDD Quiescent supply ET1511A (No load) － － 12 uA ET1511B (No load) － － 45 uA ITRAN Transient current Output transit state 0.5 0.8 1 mA Input control ENB/FBC VIH Input logic “H” － 1.6 － 5.5 V VIL Input logic “L” － 0 － 0.2VDD V RPL Input pull-low resistor ENB & FBC pins 120 160 200 kΩ Driver output OUT1/OUT2 VOUT Output voltage headroom (upper + lower) Voltage 3V 3.3V 5V IOUT=200mA 0.48 0.47 0.36 V IOUT=300mA 0.83 0.76 0.57 V IOUT=400mA 1.34 1.15 0.81 V TR Rising transit time From 0.1VDD to 0.9VDD － 2.5 5 ns TF Falling transit time From 0.9VDD to 0.1VDD － 2 4 ns Propagation delay time TPLH ENB (L to H) OUT1/2 VDD=5V, RLOAD=18Ω － 13 16 ns TPHL ENB (H to L) OUT1/2 － 24 40 ns TPW Pulse width of ENB 100 － － ns FMAX Max. frequency of ENB － － 5 MHz
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 5/12 (a) Propagation delay time between ENB and OUT1/OUT2 (b) PWM waveform for ENB Figure1. Waveform timing definition
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 6/12 Truth Table and Diagram Controls (1) ET1511A Input Output ENB FBC OUT1 OUT2 H － L L L H H L L L L H (2) ET1511B Input Output FBC OUT1 OUT2 L L The one-shot period is determined by external capacitor which connected to CE pin of ET1511B. TOS = 1.6 x 106 x CCE (sec.)
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 7/12 Application Circuits (a) Single-wire control by FBC (b) Dual-wire control by ENB and FBC (c) One-shot control by FBC and external capacitor CCE connect to CE pin Figure3. Typical application circuit of ET1511A/B
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 8/12 MCU control The ENB and FBC pins of ET1511A/B are internal pull-low to ground, which is in safety if input port are floating from unknown output states. The input voltage of input pins must higher than VIH or small than VIL to ensure the logic states of the input buffers are stable. In most cases, ET1511A/B is controlled by GPIO ports of host microcontroller. In general, MCU has 2 types of GPIO ports, open-drain output and buffer output. The output level of buffer output is VDD in high level and VSS in low level, the GPIO port could connect to ENB and FBC pins directly. The open-drain output of GPIO port should external pull-up resistor, which does not have pull up driving capability. Because of 150KΩ internal pull-low resistor, the external pull up resistor could be setup to 100KΩ maximum. The smaller external pullup resistor will result in faster rise time of output stage but more current consumption when open-drain driven device turns on.
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 9/12 Layout Guidelines The output coil motor will actuate back EMF voltage, an unexpected high and low voltage level may force on OUT1 and OUT2 pins during output transient. It is recommended to place a RFLT-CFLT filter on VDD pin to protect ET1511A/B from higher extreme transient voltage stress.The resistor RFLT and capacitor CFLT should place as close to VDD pin as possible.
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 10/12 Package Dimensions SOT23-6L SYMBOL MIN. NOM. MAX. A 1.45 A1 0.15 A2 0.90 1.15 1.30 b 0.30 0.50 c 0.08 0.22 D 2.90 BSC. E 2.80 BSC. E1 1.60 BSC. e 0.95 BSC. e1 1.90 BSC. L 0.30 0.45 0.60 L1 0.60 L2 0.25 R 0.10 R1 0.10 0.25 θ 0 4o 8o θ 1 5o 10o 15o
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 11/12
Revision History
1.0 2022.10.05 Original.
Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision:1.0 12/12 Important Notice All rights reserved. No part of this document may be reproduc ed or duplicated in any form or by any means without the prior permission of ESMT. The contents contained in this document are believed to be accurate at the time of publication. ESMT assumes no responsibility for any error in this document, and reserves the right to change the products or specification in this document without notice. The information contained herein is presented only as a guide or examples for the application of our products. No responsibility is assumed by ESMT for any infringement of patents, copyrights, or other intellectual property rights of third parties which may result from its use. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of ESMT or others. Any semiconductor devices may have inherently a certain rate of failure. To minimize risks associated with customer's application, adequate design and operating safeguards against injury, damage, or loss from such failure, should be provided by the customer when making application designs. ESMT's products are not authorized for use in critical applications such as, but not limited to, life support devices or system, where failure or abnormal operation may directly affect human lives or cause physical injury or property damage. If products described here are to be used for such kinds of application, purchaser must do its own quality assurance testing appropriate to such applications.