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8-pin, 24-Bit Stereo D/A Converter for PCM Audio Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com ES7134S GENERAL DESCRIPTION The ES7134S is a low cost 8- pin stereo digital to analog converter . The ES7134S can accept I ²S serial audio data format up to 24- bit word length. The device uses advanced multi -bit ∆-∑ modulation technique to convert data into two channel analog outputs. The multi-bit ∆ -∑ modulator makes the device with very low sensitivity to clock jitter and very low out of band noise.

FEATURES

 95 dB dynamic range  -85 dB THD+N  Up to 100 kHz sampling frequency  Support USB clocks or non standard audio clocks like 25 MHz or 26 MHz  I²S audio data format, 16-24 bits  Single power supply 3V to 3.6V

APPLICATIONS

 Digital Photo Frame  Set top box  Digital TV  DVD player  Audio player

ORDERING INFORMATION

ES7134S -40°C ~ +85°C SOIC-8 (SOP8L) BLOCK DIAGRAM Audio Data Interface Interpolation Filter Interpolation Filter Multi-level Sigma-delta DAC Multi-level Sigma-delta DAC Output Amp Low Pass Filter Output Amp Low Pass Filter Clock Manager/ Sample Rate Detector AOUTL AOUTR CLKIN SDATA LRCK SCLK

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com 1. PIN DESCRIPTIONS PIN PIN I/O DESCRIPTION

1 SDATA I Serial audio data input

2 SCLK I Bit clock input

3 LRCK I Left and right channel clock input indicating input data sampling

rate (Fs) and channel selection

4 CLKIN I System clock input

5 AOUTR O Analog output of right channel

6 GND I Ground

7 VDD I Device power supply

8 AOUTL O Analog output of left channel

  1. RECOMMENDED APPLICATION CIRCUIT SDATA1 SCLK2 LRCK3 CLKI N4 AOUTR 5 GND 6 VD D 7 AOUTL 8 ES7134S 3.3uF 470R 2200pF AGND AOUTL 3.3uF 470R 2200pF AOUTR For the best performance,decoupling and filtering capacitors should be located as close to the device package as possible A dditional parallel capacitors(typically 0.1 μF) can be used, larger value capacitors(typically 10 μF) would also help AGND 1uF AGND AGND 0RGND(SYS) In the layout, chip is treated as an analog device CPU/DSP VD D Figure 1 Recommended Application Circuit AOUTR SDATA SCLK LRCK CLKIN ES7134S AOUTL VDD GND 3

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com 3. APPLICATION DESCRIPTIONS Sampling Rate and Input Clocks According to the sampling rate, the device can work in two speed modes, single speed and double speed. Table 1 lists the typical clock modes supported by the device. The device supports USB clocks or non standard audio clocks like 25 MHz or 26 MHz. Table 1 Speed Mode and CLKIN/LRCK Ratio MODE Sampling Rate CLKIN/LRCK Ratio Single Speed 8kHz – 50kHz 32, 64, 128, 192, 256, 384, 512, 768, 1024 Double Speed 84kHz – 100kHz 128, 192, 256, 384, 512, 768, 1024 Audio Data Input The ES7134S can accept I²S serial audio input data from 16-bit to 24-bit. The device can detect the data word length automatically. The relationship of SDATA, SCLK and LRCK for the format is illustrated through Figures 2. n-2 n-1 n321

1 SCLK

Upon applying VDD, the device will reset itself and enter power down state. During this state, the device clamps outputs to ground and power down the device operation except for clock management unit. Once proper CLKIN and LRCK clocks are applied, the device will leave power down state, and the device outputs ramp from ground to common mode voltage softly. Then the device enters the normal operation. Figure 2 I²S serial audio data format up to 24-bit

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com 4. ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings At or beyond this condition, operating continuously may cause permanent damage to the device. The performance and functions of the device are not guaranteed at these extremes. PARAMETER MIN MAX Supply Voltage Level -0.3V +5.0V Input Voltage Range GND-0.3V VDD+0.3V Operating Temperature Range -40°C +85°C Storage Temperature -65°C +150°C Recommended Operating Conditions PARAMETER MIN TYP MAX UNIT Supply Voltage Level 3 3.3 3.6 V Analog Characteristics Test conditions: VDD=3.3V, GND=0V, ambient temperature=25°C, Fs=48KHz, CLKIN/LRCK=256, input 0dB 1KHz sinewave PARAMETER MIN TYP MAX UNIT DAC Performance Dynamic Range (Note 1) 90 95 dB THD+N -85 -80 dB Channel Separation (1KHz) 100 dB Signal to Noise Ratio 95 dB Interchannel Gain Mismatch 0 dB Frequency Response (20Hz-20KHz) -0.02 +0.08 dB Filter Frequency Response characteristics Single Speed Passband 0 0.454 Fs Stopband 0.547 Fs Passband Ripple ±0.05 dB Stopband Attenuation -53 dB Double Speed Passband 0 0.417 Fs Stopband 0.583 Fs Passband Ripple ±0.005 dB

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com Stopband Attenuation -56 dB Quad Speed Passband 0 0.2083 Fs Stopband 0.792 Fs Passband Ripple ±0.006 dB Stopband Attenuation -50 dB Analog Output Characteristics Full Scale Output Level 2 2.3 2.5 Vpp Output Impedance 120 Ω Minimum Load Resistance 2 KΩ Maximum Capacitance 100 pF Note 1. A-weighted filter is used in measurement.

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com Serial Audio Port Switching Characteristics PARAMETER SYMBOL MIN MAX UNIT CLKIN Frequency 51.2 MHz CLKIN Duty Cycle 40 60 % LRCK Frequency 200 KHz LRCK Duty Cycle 40 60 % SCLK Frequency 26 MHz SCLK Pulse Width Low TSCKL 15 ns SCLK Pulse Width High TSCKH 15 ns SCLK Rising to LRCK Edge Delay TLRH 10 ns SCLK Rising to LRCK Edge Setup Time TRSU 10 ns SDATA Valid to SCLK Rising Setup Time TSDS 10 ns SCLK Rising to SDATA Hold Time TSDH 10 ns SDATA SCLK LRCK TLRH TLRSU TSDS TSDH TSCKH TSCKL TSCKY DC Characteristics PARAMETER MIN TYP MAX UNIT Normal Operation Mode VDD Current VDD=3.3V 20 mA Power Down Mode VDD Current VDD=3.3V 5 mA Digital Voltage Level Input High-level Voltage 1.65 V Input Low-level Voltage 0.8 V Output High-level Voltage VDD V Output Low-level Voltage 0 V Figure 3 Serial Audio Port Timing

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com 5. PACKAGE INFORMATION 8-pin SOIC/SOP8L (150mil) Outline Dimensions Symbols Dimensions (inch) Dimensions (mm) Min TYP Max Min TYP Max J 0.0100x45o --- 0.0160 x45o 0.254 x45o --- 0.406 x45o L 0 o --- 8 o 0 o --- 8 o Note: 1. Reference JEDEC MS-012 (C), VAR. AA

Everest Semiconductor ES7134S Rev 4.0 September 2018 Latest datasheet: http://www.everest-semi.com or info@everest-semi.com 6. Contact Information: Everest Semiconductor Co., Ltd. 苏州工业园区金鸡湖大道 1355 号国际科技园, 邮编 215021 Email: info@everest-semi.com