ES1A_14 TSC | Alldatasheet

Document overview

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Technical content

  • Glass passivated junction chip - Ideal for automated placement - Super fast recovery time for high efficiency - Built-in strain rellef - Halogen-free according to IEC 61249-2-21 definition Molding compound, UL flammability classification rating 94V-0 Base P/N with suffix "G" on packing code - Green compound (halogen-free) Base P/N with prefix "H" on packing code - AEC-Q101 qualified Terminal: Matte tin plated leads, solderable per JESD22-B102 Meet JESD 201 class 1A whisker test with prefix "H" on packing code meet JESD 201 class 2 whisker test V RRM 50 100 150 200 300 400 500 600 V VRMS 35 70 105 140 210 280 350 420 V VDC 50 100 150 200 300 400 500 600 V IF(AV) A Trr ns Cj pF TJ OC TSTG OC Document Number: DS_D1405052 Version:J14 - Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC MECHANICAL DATA Case: DO-214AC (SMA) DO-214AC (SMA) ES1A thru ES1J Taiwan Semiconductor Surface Mount Super Fast Rectifiers

FEATURES

  • Moisture sensitivity level: level 1, per J-STD-020 Polarity: Indicated by cathode band Weight: 0.06 g (approximately) MAXIMUM RATINGS AND ELECTRICAL CHARACTERSTICS (TA=25℃ unless otherwise noted) PARAMETER SYMBOL ES ES ES ES ES ES ES ES UNIT Maximum repetitive peak reverse voltage Maximum RMS voltage OC/W Maximum DC blocking voltage Maximum average forward rectified current 1 Peak forward surge current, 8.3 ms single half sine-wave superimposed on rated load IFSM 30 Maximum reverse current @ rated VR TJ=25 ℃ TJ=100℃ IR A Maximum instantaneous forward voltage (Note 1) @ 1 A VF V Operating junction temperature range Storage temperature range - 55 to +150 - 55 to +150 Typical junction capacitance (Note 3) Typical thermal resistance RθJL RθJA μA Note 2: Reverse Recovery Test Conditions: IF=0.5A, IR=1.0A, IRR=0.25A Note 3: Measured at 1 MHz and Applied VR=4.0 Volts Note 1: Pulse test with PW=300μs, 1% duty cycle 0.95 1.3 1.7 100 Maximum reverse recovery time (Note 2)

PART NO. PART NO. ES1J ES1J ES1J (TA=25℃ unless otherwise noted) Document Number: DS_D1405052 Version:J14 ES1A thru ES1J Taiwan Semiconductor

ORDERING INFORMATION

(Note 1) Prefix "H" Suffix "G" SMA 1,800 / 7" Plastic reel R2 SMA 7,500 / 13" Paper reel M2 SMA 7,500 / 13" Plastic reel F3 Folded SMA 1,800 / 7" Plastic reel F2 Folded SMA 7,500 / 13" Paper reel F4 Folded SMA 7,500 / 13" Plastic reel N/A E3 Clip SMA 1,800 / 7" Plastic reel E2 Clip SMA 7,500 / 13" Plastic reel Note 1: "x" defines voltage from 50V (ES1A) to 600V (ES1J) EXAMPLE PREFERRED P/N AEC-Q101 QUALIFIED PACKING CODE GREEN COMPOUND CODE

DESCRIPTION

ES1J R3G R3 G Green compound ES1JHR3 H R3 AEC-Q101 qualified RATINGS AND CHARACTERISTICS CURVES 0.2 0.4 0.6 0.8 1.2 80 90 100 110 120 130 140 150 AVERAGE FORWARD A CURRENT (A) LEAD TEMPERATURE (oC) FIG.1 MAXIMUM FORWARD CURRENT DERATING CURVE RESISTER OR INDUCTIVE LOAD 1 10 100 PEAK FORWARD SURGE CURRENT (A) NUMBER OF CYCLES AT 60 Hz FIG. 3 MAXIMUM NON-REPETITIVE FORWARD PEAK SURGE CURRENT 8.3mS Single Half Sine Wave (JEDEC Method) 0.01 0.1 100 1000 0 20 40 60 80 100 120 140 INSTANTANEOUS REVERSE CURRENT (μA) PERCENT OF RATED PEAK REVERSE VOLTAGE (%) FIG. 4 TYPICAL REVERSE CHARACTERISTICS TJ=25℃ TJ=125℃ TJ=75℃ 0.1 100 INSTANTANEOUS FORWARD CURRENT (A) FORWARD VOLTAGE (V) FIG. 2 TYPICAL INSTANTANEOUS FORWARD CHARACTERISTICS ES1H-1J Pulse Width=300μs 1% Duty Cycle ES1F-1G ES1A-D

A 1.27 1.58 0.050 0.062 B 4.06 4.60 0.160 0.181 C 2.29 2.83 0.090 0.111 D 1.99 2.50 0.078 0.098 E 0.90 1.41 0.035 0.056 F 4.95 5.33 0.195 0.210 G 0.10 0.20 0.004 0.008 H 0.15 0.31 0.006 0.012 P/N = Specific Device Code G = Green Compound YW = Date Code F = Factory Code Document Number: DS_D1405052 Version:J14 ES1A thru ES1J Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS DIM. Unit (mm) Unit (inch) SUGGESTED PAD LAYOUT Symbol Unit (mm) A1 . 6 8 B1 . 5 2 Unit (inch) 0.066 0.060 0.155 0.095 0.215 MARKING DIAGRAM C3 . 9 3 D2 . 4 1 E5 . 4 5 100 0.1 1 10 100 JUNCTION CAPACITANCE (pF) REVERSE VOLTAGE (V) FIG. 5 TYPICAL JUNCTION CAPACITANCE ES1A-D ES1F-J f=1.0MHz Vsig=50mVp-p

assumes no responsibility or liability for any errors inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied,to any intellectual property rights is granted by this document. Except as provided in TSC's terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or seling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_D1405052 Version:J14 ES1A thru ES1J Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,