ER5911

ER5911 MICROCHIP | Alldatasheet

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Om Oe§GSOX MICROCHIP TECHNOLOGY INC @2£ D MM 6103201 OOO4bL7 b mm P4b-13-27 ‘ ER5911 Microchip oCyauooaoaoaoauauamamamomuEe 1 1K (128 x 8 or 64 x 16) Serial Electrically Erasable PROM FEATURES DESCRIPTION + User-selectable organization: 64 x 16 or 128 x 8 The ER5911 is a low cost, serial EEPROM manutac- * Single +5V only operation tured in Microchip's highly reliable SNOS technology, + Binary addressing . This device features +5V only operation, a self-timed + Fully automatic self-timed erage/write mode reprogramming cycle and two user-selectable mem- + Word and chip erasable ory array organizations, 64 x 16 or 128 x 8, which are * Unlimited read accesses selectable externally by means of a one bit code * Fully TTL compatible inputs and outputs ’ applied to control pin ORG. The Input (Dl) and + ESD Protection: Inputs are designed to meet 1.0kV ‘Output (DO) pins are controlled by separate serial per test method 3015.1, MIL-STD 883 formats. When separate lines are used the DO output * Highly reliable N-Channel SNOS technology pin is valid only in the read mode and is in the high * Designed for 10 year data retention after 10,000 impedance state in ali other modes, thus eliminating erase/write cycles per word bus contention, Five instructions may be executed + Power-on/off data protection circuitry and the instruction length will be twelve bits when . + Available for extended temperature ranges: using the 128 x 8 organization and eleven bits when — Commercial: 0°C to 70°C the 64 x 16 organization is used. The instruction — Industrial: -40°C to 85°C format has a logical 1 as a start a bit, four bits as an opcode and either six or seven address bits. PIN CONFIGURATION BLOCK DIAGRAM

1 Voc GND

E = Memory: Address ~ “ a es(ji 81] Voc or 64x16 cux C2 7D rovausy | o Mode Decode cs ox | wer Clock ‘© 1989 Microchip Technology Ino. 1-145 DS20039A-1

eee QQ, EE Vm—vwnrnree—_ Ey. _ QI MICROCHIP TECHNOLOGY INC 22£ D M@@ 6103201 OOO4LLA & mm ER5911 T-46-13-27 ELECTRICAL CHARACTERISTICS PIN FUNCTION TABLE Hannum alias | Name | Function | All inputs and outputs with respect rs — er—a—j——w—v—V—s>S 10 QFOUNA sssssmensnemnensensnennennennt TV 10 -O.3V cs Chip Select ‘Storage temperature (unpowered and . CLK Clock Input without data retention) «sss B5°C 10 +150°C ol Serial Data Input Ambient temperature with ple) Serial Data Output POWGr APPIEM vssiniessansantetseseneneesB5°C tO 125°C Veo ___ +5V Power Supply ‘Soldering temperature of leads eneesY Status ¢ Output . “Notice: Stresses above those listed under “Maximum Ratings" may ‘cause permanent damage to the device. Thisis a stress rating only and functional operation of the device at those or any other conditions above: those indicatedin the operation listings of this specification is notimplied.. Exposure to maximum rating conditions for extended periods may affect . davies rokiabliy. DC CHARACTERISTICS Veo = +5V +10% Commercial: Tamb = 0°C to 70°C Industrial: Tamb = -40°C to +85°C a a eee ee Input Voltage . High Level vin | 20 | — |Voc+10} v Low Level ve} -03 | — | +08 | Vv High Level Vou] 24 | — | Veo | V_ | ton =-400uA Low Level Vou.{ — - 04 Vv lov = 1.6mA Leakage Current Input uw} — | — | +10 | A | ViN=GNDtoVoo Output ho} — | — | +10 | BA | Vour=GNDto Veo Chip Selected too} — | — [40,12] ma | Voc=s5.sv Chip Selected (ProcrAM & erat modes) | Ico | — | — | 12/15] mA | Vcc=5.5V Chip Deselacted (Standby) ko | — | — | 3] 5] mA | Voo=55v Power Consumption Chip Selected Pec] — | — | 55] 66] mW | Vco=5.6V Chip Selected (procram & ena. modes) | Pec] — | — | 66] 83) mW | Vco=5.6V Chip Deselected (STANDBY) Pec] — | — | 17] 28] mW | Voc=5.8V FIGURE 1 - SYNCHRONOUS DATA TIMING a a [i ee eatohmad ' y SOX we KXKXXKXKXK we KXKKXXKXK ait = ot hed (ia) 1 Tels Jf na tieinal eT re . eee S20039A-2 1-146 © 1989 Microchip Technology Inc.

Sa a EE EEE eOo7[I-™ MICROCHIP TECHNOLOGY INC 2@2£ D M@ 6103201 QOO4LLS T ETF T-46-13-27 AC CHARACTERISTICS (See Figure 1) . i 1 CLK Frequency fox | 0 250 | KHZ | CL=1009t CLK Duty Cycle pouk | 25 75 % | Vo=0.8V Chip Select Setup Time toss | 02 _ us ton sRoy Chip Select Hold Time tesH | 0 - uS | Goce oun /OL = 0.8V Data Input Setup Time tos | 04 — | +S | vonz2ov Data Input Hold Time ton | 04 — | us : CLK Pulse Width tcpw | 20 —. | ps Data Output Delay tet : 20 | us Data Output Delay - tPD0 - 2.0 us Status Low Time ter | 20 75 | ms (programming time) PIN DESCRIPTION Chip Select (CS) Cate must be taken with the leading dummy zero which . is output after a READ command has been detected. AHIGH level selects the device. A LOW level deselects Also, the controlling device mustnot drive the DDO bus : the device and puts it into standby mode, during ERAL and PROGRAM cycles. Serlal Clock (CLK) Organization (ORG) The Serial Clack is used to synchronize the communi- ORG is the Memory Array Organization Selection In- cation between a master device and the ERS911. Op- put.. When the ORG pins connected to +5V the 64 x code, address, and data bits are clocked in on the 16 organization is selected. When It is connected to positive edge of CLK. Data bits are also clocked out on ground the 128 x 8 organization is selected. If the the positive edge of CLK. ORG pins left unconnected, then an internal pullup CLK is a Don't Care if CS is LOW (device deselected). device will select the 64 x 16 organization. \\fCSis HIGH butastart condition has notbeen detected, Ready/Busy (RDY/BSY) any number of clack cycles can be received by the ‘ — , 4 ; Pin 7 provides RDY/BSY status information. RDY/ oon hanging its statue (2, walting for start BSY is low ifthe device is performing a PROGRAM or ‘ ERAL operation. When it is high, the internal self- CLK cycles are not required during the self timed timed PROGRAM or ERAL operation has been com- PROGRAM (i.e. auto erase/write) cycle. pleted, and the device is ready to receive a new After detection of a start condition the specified number Instruction. of clock cycles (respectively LOW to HIGH transitions of CLK) mustbe provided. These clock oycles are required to clock in all required opcode, address, and data bits POWER-ON DATA PROTECTION before an instruction is executed (see Instruction set CIRCUITRY wrath te) Dut | modes of operatic Inhibited uring power-up all modes of operation are int Data In (D1) until Voc has reached a level of between 2.8 and 3.5, Data Inis used to clock in Start bit, opcode, address and volts. During power-down the source data protection cir- data synchronously with the CLK input. cuitry acts to inhibitall modes when Voc has fallen below the voltage range of 2.8 to 3.6 volts. Data Out (DO) Data Out is used in the READ mode to output data synchronously with the CLK input (Too after the posi- tive edge of CLK). This outputis in High-Z mode except if data Is clocked out as a result of a READ instruction. DI and DO can be connected together to perform a 3- wire interface (CS, CLK, DDO). ’ a © 1989 Microchip Technology Ino. 4-147 DS20039A-3 i . i

OO OE EEE __eeGCooeoow MICROCHIP TECHNOLOGY INC 22 D M@ 6103201 OOO4L70 &b ER5911 aT 46-13-27 FUNCTIONAL DESCRIPTION INSTRUCTION SET . READ 1000 AG-AQ | A5-AO Read Address AN-AO PROGRAM x100 A6-AO AS-AO 07-DO | D15-D0 | Program Address AN-AO PEN ‘oo11 | 0000000 | 000000 Program Enable ~ PDS 00 | 0000000 | 000000 Program Disable ERAL 0010 0000000 go0000 Erase All Addresses Data In/ Data Out (DI/D0) _ Bead Mode It ls possible to connect the Data In and Data out pins The READ instruction is the only instruction which together. However, with this configuration it is possible outputs serial data on the DO pin. After a READ for a “but conflict” to occur during the “dummy zero” that instruction is received, the instruction and address are precedes the read operation, if AQ Is a logic high lavel. decoded, followed by data transfer from the memory Under such a condition the voltage level seen at Data register into a serial-out shift register. A dummy bit Out is undefined and will depend upon the relative four *0") precedes the data output: ering, The output impedances of Data Out and the signal source driving fata changes during the high states of the system clock. - AQ, The higher the current sourcing capability of AO, the higher the voltage at the Data Out pin. FIGURE 2 - READ MODE cs / Ss s \\ CLK sB Op-Code oO fi 1\\.0 0 o fm Xf Xe \\ HIGH -Z 20 4+ 0 fo XTX oy) [ORGANIZATION | Av | Dw_| | taaxe [Aas | 07 | [_e4xte | as | 018 | DS20039A-4 1-148 © 1989 Microchip Technology Inc. t

EE EE —— —_e MICROCHIP TECHNOLOGY INC eee D MM 6103201 0004671 5 me T-46-13-27 Program Mode The PROGRAM instruction is followed by either eight or During the automatic erase/write sequence the RDY/ sixteen bits of data, which are to be written into the ‘BUSY output will go low for the duration of the automatic specified address. programming cycle as indicated by Tp. Atter the last data bit (D0) has been shifted into the data During a program cycle the internal erase and write 1 register the contents of the specified address will be operations occur automatically and are self-timed on the erased and the new data written to the same address. device. A single memory location may also be erased by programming that address with all "t's". FIGURE 3 - PROGRAM MODE . ouK 7 $ FLT RXXXXXXXN 88 Op-Code SB . WPT OTOL, / XD i) a a a ae BUSY [GRGANTZATION [mv] Om] http [teexe | Ae | 07_| [_eaxte [As | 015 | © 1989 Microchip Technology Inc, 1-149 DS20039A-5

MICROCHIP TECHNOLOGY INC 22E£ D MM 6103201 0004673 1 a ER5911 T-46-13-27 Chip Erase (ERAL) Entire chip erasing Is provided for ease of programming and is implemented with the ERAL (erase all registers) instruction. Erasing the chip means that all registers in the memory array have each bit set to a 1. 1 FIGURE 5A - ERAL (ERASE ALL) FOR 128 X 8 ORGANIZATION 004,64) $8 Op-Code $8 oO /i\\@ of/t\\o © Oo Oo OO ©O 0 @ /*\\-X-X AoW BUSY a fo FIGURE 5B - ERAL (ERASE ALL) FOR 64 X16 ORGANIZATION cuk KXXXXXXXY LOLA

88 Op-Code $8

oD fi\\\\o o/f1\\ 0 0 oO ° oO o o fi N x x ‘BUSY Http i © 1989 Microchip Technology Inc. 4-151 0S20039A-7 t

OO EEE EE EEE eGO7V7'r_m mrcRensow INC 22E D MB 6103201 0004474 3 mw = T_ 4G] 3-27 SALES AND SUPPORT To order or to obtain information, e.g, on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales oftices. PART NUMBERS , ERS5911 -I /P P Plastic DIP (OTP Avaitable) Temperature Blank 0°C to 70°C Range: I -40°C to8s'c Device 5911 1K SNOS Serial EEPROM DS20039A-8 1-152 ‘© 1989 Microchip Technology Ino,