EPA424-25

EPA424-25 PCA | Alldatasheet

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Technical content

SO SMD 14 Pin 5 Tap TTL Compatible Active Delay Lines Package Dimensions EIN Pulse Input Voltage 3.2 Volts PW Pulse Width % of Total Delay 110 % TRI Pulse Rise Time (0.75 - 2.4 Volts) 2.0 nS PRR Pulse Repetition Rate @ Td ≤ 200 nS 1.0 MHz Pulse Repetition Rate @ Td > 200 nS 100 KHz VCC Supply Voltage 5.0 Volts Input Pulse Test Conditions @ 25° C Unit VOH High-Level Output VoltageVCC = min. VIL= max. IOH = max 2.7 V VOL Low-Level Output VoltageVCC = min. VIH= min. IOL= max 0.5 V VIK Input Clamp Voltage VCC = min. II= IIK -1.2 V IIH High-Level Input CurrentVCC = max. VIN= 2.7V 50 µA VCC = max. VIN = 5.25V 1.0 mA IIL Low-Level Input Current VCC = max. VIN = 0.5V -2 mA IOS Short Circuit Output CurrentVCC = max. VOUT = 0. -40 -100 mA (One output at a time) ICCH High-Level Supply CurrentVCC = max. VIN = OPEN 75 mA ICCL Low-Level Supply CurrentVCC = max. VIN= 0 75 mA TRO Output Rise Time Td ≤ 500 nS (0.75 to 2.4 Volts) 4 nS NH Fanout High-Level OutputVCC = max. VOH = 2.7V 20 TTL LOAD NL Fanout Low-Level Output VCC = max. VOL = 0.5V 10 TTL LOAD Parameter Test Conditions Min Max Unit VCC Supply Voltage 4.75 5.25 V VIH High-Level Input Voltage 2.0 V VIL Low-Level Input Voltage 0.8 V IIK Input Clamp Current -18 mA IOH High-Level Output Current -1.0 mA IOL Low-Level Output Current 20 mA PW * Pulse Width of Total Delay 40 % d* Duty Cycle 40 % TA Operating Free-Air Temperature -55 +125 °C Recommended Operating Conditions Min Max Unit *These two values are inter-dependent. Schematic TAP DELAYS TOTAL DELAYS PART ±5% or ±2 nS† ±5% or ±2 nS† NUMBER 5, 10, 15, 20 25 EPA424-25 6, 12, 18, 24 30 EPA424-30 7, 14, 21, 28 35 EPA424-35 8, 16, 24, 32 40 EPA424-40 9, 18, 27, 36 45 EPA424-45 10, 20, 30, 40 50 EPA424-50 12, 24, 36, 48 60 EPA424-60 15, 30, 45, 60 75 EPA424-75 TAP DELAYS TOTAL DELAYS PART ±5% or ±2 nS† ±5% or ±2 nS† NUMBER 20, 40, 60, 80 100 EPA424-100 25, 50, 75, 100 125 EPA424-125 30, 60, 90, 120 150 EPA424-150 35, 70, 105, 140 175 EPA424-175 40, 80, 120, 160 200 EPA424-200 45, 90, 135, 180 225 EPA424-225 50, 100, 150, 200 250 EPA424-250 †Whichever is greater. Delay times referenced from input to leading edges at 25°C, 5.0V, with no load. DSA424 Rev. A 2/5/96 QAF-CSO1 Rev. B 8/25/94 Unless Otherwise Noted Dimensions in Inches Tolerances: Fractional = ± 1/32 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 TEL: (818) 892-0761 FAX: (818) 894-5791 E L E C T R O N I C S I N C . 12 4 10 6 8 OUTPUT GROUND INPUT

14 VCC

.155 .150 PCA EPA424-25 D.C. .200 Max. .500 Max. .235 Max. .004 Typ. .02 .050 .228 .244 .060 .275 .24 Suggested Solder Pad Layout .100 .50