ECJCV50J106M

ECJ-CV50J106M ETC2 | Alldatasheet

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CLASSIFICATION SPECIFICATIONS Ｎｏ．151S-ECJ-KBD38E PAGE 1 of 1SUBJECT Multilayer Ceramic Chip Capacitor “12” (EIA 0805 ) VA Type Individual Specification DATE 23 th Apr. 2003 Note : Ceramic Business Unit LCR Device Company Matsushita Electronic Components Co.,Ltd. K a d o m a , O s a k a , J a p a n APPROVAL H.Itow CHECK A.Omi DESIGN T.Senshu 1.Scope This specification applies to MATSUSHITA’S Multilaye r Ceramic Chip Capacitor “0805 VA Type ” Temp. Char：X5R Rated voltage DC6.3V Nominal Cap.10 µF. 2.Style and Dimensions Table １ Symbol Dimensions(mm) Ｌ 2.00±0.20 Ｗ 1.25±0.20 Ｔ 0.85±0.10 L1,L2 0.50±0.25 ３．Operating Temperature Range Table ２ Temperature Characteristics Operating Temp. Range. Class２ X5R -55 to +85°C ４．Individual Specification T a b l e ３ Part Number Rated Voltage Temp. Char. Nominal Capacitance Cap. Tolerance ECJCV50J106M D.C. 6.3V X5R 10 µF M : ±20% ５．Explanation of Part Numbers E C J C V 5 ０ J 1 0 6 M ６．Temperature Characteristics of Class 2 Capacitors T a b l e 4 Capacitance Change rate from Temperature.Temp. Char. Code Temp. Char. Without voltage application Measurement Temperature Range Reference Temperature ７．Soldering method Soldering method of Multilayer ceramic chip capacitor shall be reflow soldering. ＬＷＴ Packaging Styles Code Packaging V φ180Reel Paper Taping 4000pcs Rated Voltage Code Voltage 0J DC6.3V Show in Table 4 Size Code Code Size C 0805 VA Type Common Code Temp. Char. Cap. Tolerance Code Show in Table 3 Nominal Cap.

CLASSIFICATION SPECIFICATIONS Ｎｏ．151S-ECJ-KAD39E PAGE 1 of 1SUBJECT Multilayer Ceramic Chip Capacitor “13” (EIA 1206 ) VA Type Individual Specification DATE 23 th Apr. 2003 Note : Ceramic Business Unit LCR Device Company Matsushita Electronic Components Co.,Ltd. K a d o m a , O s a k a , J a p a n APPROVAL H.Itow CHECK A.Omi DESIGN T.Senshu 1.Scope This specification applies to MATSUSHITA’S Multilaye r Ceramic Chip Capacitor “1206 VA Type ” Temp. Char：X5R Rated voltage DC6.3V Nominal Cap.10 µF,22µF. 2.Style and Dimensions Table １ Symbol Dimensions(mm) Ｌ 3.20±0.20 Ｗ 1.60±0.20 Ｔ 0.85±0.10 L1,L2 0.60±0.30 ３．Operating Temperature Range Table ２ Temperature Characteristics Operating Temp. Range. Class２ X5R -55 to +85°C ４．Individual Specification T a b l e ３ Part Number Rated Voltage Temp. Char. Nominal Capacitance Cap. Tolerance ECJDV50J106M D.C. 6.3V X5R 10 µF M : ±20% ECJDV50J226M D.C. 6.3V X5R 22 µF M : ±20% ５．Explanation of Part Numbers E C J D V 5 ０ J 1 0 6 M ６．Temperature Characteristics of Class 2 Capacitors T a b l e 4 Capacitance Change rate from Temperature.Temp. Char. Code Temp. Char. Without voltage application Measurement Temperature Range Reference Temperature ７．Soldering method Soldering method of Multilayer ceramic chip capacitor shall be reflow soldering. ＬＷＴ Packaging Styles Code Packaging V φ180Reel Paper Taping 4000pcs Rated Voltage Code Voltage 0J DC6.3V Show in Table 4 Size Code Code Size D 1206 VA type Common Code Temp. Char. Cap. Tolerance Code Show in Table 3 Nominal Cap.

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-KZD38E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Class2 Large Capacitance) D A T E 2 3th. Apr. 2003 Note ; Ceramic Business Unit LCR Device Company Matsushita Electronic Components Co.,Ltd. K a d o m a , O s a k a , J a p a n APPROVAL H.Itow CHECK A.Omi DESIGN T.Senshu １．Scope This specification applies to MATSUSHITA’S Multilayer Ceramic Chip Capacitor “0805 ,1206 VA Type” Temp. Char：X5R Rated voltage DC6.3V. If there is a difference between this common specification and any individual specifications, priority shall be given to the individual specifications ２．Applications 2.1 This product sha ll be used for general purpose applications required of consumer-type-electronic(audio visual, household, office, information & communication) equipment. However, depending on ways of application there might be possib ilities to accelerate the life-end as in failure modes of performance deterioration or short/open circuits. Especially for such product design needed a high level of safet y, a careful pre-study about how a single trouble with this product affects end product shall be recommended ; Ex. ①ensure safety as a system by adding protective devices or circuits. Ex. ②ensure safety as a system by adding a redundant-design ci rcuits not to become unsafe because of a single trouble with this product.. Such failsafe-design considerations shall be practiced for a higher level of safety.

2.2 Whenever a doubt about safety arises from this product, please inform us immediately for technical

consultation without fail. 2.3 For the following applications, please consult us for a different specification from this specification. 2.3.1 When it is considered hard to follow the instructions below for safety or handling.

2.3.2 Any applications where a trouble or erroneous operation with th is product may cause directly or

indirectly hazardous situations which could result in death or injury ; Ex. ①Aircraft Equipment, Aerospace Equipment (artificial satellite, rocket, etc.) ②Submarine Equipment (submarine repeating equipment, etc.) ③The defense agency ④Transport Equipment (motor vehicles, airplane, trains, ship, traffic signal controllers) ⑤Power generation control Equipment (atomic power, hydroelectric power, thermal power plant control system) ⑥Medical Equipment (life-support equipment, a pacemaker for the heart, dialysis controllers) ⑦Information processing Equipment (a large scale computer system) ⑧Electric Heating Appliances, Burning Apparatus ⑨Rotary Motion Equipment ⑩Security Systems ⑪an equivalent equipment above and so forth ３．Part Number Code ＥＣＪ C V ５０Ｊ１０６ M ①② ③ ④⑤ ⑥ ⑦

3.1 Common Code ①

ＥＣＪ： Multilayer Ceramic Chip Capacitors 3.2 Size②, Packaging Styls③. Temperature Characteristic④, R a t e d V o l t a g e ⑤ , C a p a c i t a n c e T o l e r a n c e ⑦ S h o w n i n I n d i v i d u a l S p e c i f i c a t i o n .

3.3 Nominal Capacitance⑥

The Nominal Capacitance value is expressed in Pico farad s(pF) and is identified by a three-digit number ; the first tw o digit represent significant figures and the last digit specifi es the number o f z e r o t o f o l l o w . 1 of 7 Symbol (Ex.) Nominal Cap. １０４０．１μＦ１０５１μＦ１０６１０μＦ

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-KGD38E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Class2 Large Capacitance) DATE 23 th. Apr. 2003 Note ; ４．Operating Temperature Range Shown in Individual Specification. ５．Performance The performance of the capacitor and its test condition shall be specified in Table 2.

5.1 Pretreatment

Before test and measurements, the following pretreatment shall be applied when necessary.

5.1.1 Heat Treatment

The capacitors shall be kept in a temperature of 150+0/-10℃ for 1 hour and then shall be stored in a room temperature for 48±4 hours, before initial measurement.

5.1.2 Voltage Treatment

A D. C. voltage shall be applied for 1 hour in the specified test condition and then shall be stored in a room temperature for 48±4 hours, before initial measurement. ６．Test Unless otherwise specified, all test and measurements shall be made at a temperature of 15～35℃ and at a relative humidity of 45～75%. If results obtained are doubted a further test should be carried out at a temperature of 20±2℃ and a relative humidity of 60～70%. ７．Structure The structure shall be in a monolithic form as shown in Fig. 1. Ｆｉｇ．１８．Product Place ・Hokkaido Matsushita Electric Co., Ltd. / 1037-2, Kamiosatsu, Chitose-shi, Hokkaido, Japan ・Matsushita Electric Devices (M) Sdn. Bhd. / No.1 Jalan Pelga 16/13, 4000 Shah Alam, Selanger, MALAYSIA ・Tianjin Matsushita Electronic Component Co., Ltd. / S9 4TH Sub-street west Xiqing Economic Development Z o n e T i a n j i n ９. Receipt and Effective term of Specifications (1) Please send back one copy of this specification after yo u stamp your company stamp in this specification. If you do not it back even if three months have passed af ter the issue date mentioned in the cover of this specification, we assume t hat the specification would be received. (2) When either your company or our company has no offer by document until three months before the t e r m i n a t i o n o f the expiry date mentioned in the cover of this specification, the expiry date of this specification shall be continuously extended one more yea r every year. In addition to the above, i f revision is performed during effective term and you have confirmed, old specification shall be invalidity 2 of 7 Ｔａｂｌｅ１ No. Name ① Dielectric ② Inner electrode ③S u b s t r a t e e l e c t r o d e ④ Intermediate electrode ⑤ External electrode

１ Appearance There shall be no defects which affect

the life and use. With a magnifying glass (3 times). ２ Dimensions Shown in Individual Specification. With slide calipers and a micrometer.

３ Dielectric

There shall be no dielectric breakdown or damage. Test voltage : 250% of rated voltage Apply a D. C. voltage of the above value for 1 to 5 seconds. Charge/discharge current shall be within 50mA.

４ Insulation

Resistance(I.R.) More than 100/C MΩ. (C : Rated Cap. in µF ) Measuring voltage : Rated voltage Measuring voltage time : 60±5s Charge/discharge current shall be within 50mA. ５ Capacitance Shall be withi n the specified tolerance.

６ Dissipation Factor

(tanδ) 0.15 max. For the class2 Capacitors, perform the heat treatment in par. 5. 1. 1. Our Measurement instrument is shown in the Table 3. Measure the capacitance at each stage by changing the temperature in the order of step 1 to 4 shown in the table below. Calculate the r a t e o f c h a n g e r e g a r d i n g t h e c a p a c i t a n c e a t stage 3 as the reference. Temp. Char. X5R Stage１ 25±2 Stage２ -55±3 Stage３ 25±2 Stage４ 85±2 Stage５ 25±2 ７T e m p e r a t u r e Characteris- tics Without Voltage Appli- cation Temp. Char. X5R : Within ±15%

８ Adhesion The terminal electrode shall be free

from peeling or signs of peeling. Solder the specimen to the testing jig shown in the figure., and apply a 5N force in the arrow direction for 10 seconds. Material : Alumina board (95% min.) or glass e p o x y b o a r d . Thickness : 1.0mm min. (continue) 3 of 7 Cap. Measuring Frequency Measuring Voltage Cap. Measuring Frequency Measuring Voltage

９ Bending

After soldering capacitor on the substrate 1mm of bending shall be applied for 5 seconds. Bending speed : 1mm/s (shown in Fig. 3) Appea- rance There shall be no cracks and other Mechanical damage. Capac- itance Shall be within the specified tolerance.

１０ Vibration

ｔａｎδ Shall meet the specified initial value. For the class 2 Capacitors, perform the heat treatment in par. 5.1.1. Solder the specimen to the testing jig shown in Fig 2. Apply a variable vibration of 1.5mm total amplitude in the 10～55～10Hz vibration frequency range swept in 1 min. in 3 mutually perpendicular directions for 2 hours each, a total of 6 hours. Appea- rance There shall be no cracks and other Mechanical damage. Characteristic Change from the value before test. Capac- itance X5R Within ±12.5% ｔａｎδ Shall meet the specified initial value. I.R. Shall meet the sp ecified initial value.

１１ Resistance

There shall be no dielectric breakdown or damage. (1)Solder both method Preconditioning : Heat Temperature ( S e e 5 . 1 . 1 ) / C l a s s 2 Solder temperature : 270±5 Dipping period : 3±0.5s Preheat condition Use solder H63A(JIS-Z-3282).For the flux, use rosin (JIS-K-5902) ethanol solution of a concentration of about 25% by weight. Use tweezers for the holder to dip the specimen. Recovery : 48±4 hours (continue) 4 of 7 Period（s） Type“12” Type“13” １ 80 to 100 120 to 180 300 to 360 ２ 150 to 200 120 to 180 300 to 360 Order Temp. (℃)

１２ Solderability More than 75% of the soldered area of

both terminal electrodes shall be covered with fresh solder. Solder temperature : 230±5℃ Dipping period : 4±1s Dip the specimen in solder so that both terminal electrodes are completely submerged. Use solder H63A(JIS-Z-3282). For the flux use rosin (JIS-K-5902) of ethanol solution of a concentration of about 25% by weight. Use tweezers for the holder to dip the specimen. Appea- rance There shall be no mechanical damage. Temp. Char. Change from the value before test. Capac- itance X5R Within ±12.5% ｔａｎδ Shall meet the specified initial value. I.R. Shall meet the sp ecified initial value. With- stand voltage There shall be no dielectric breakdown or damage.

１３ Temperature

There shall be no mechanical damage. Characteristic Change from the value before test Capac- itance X5R Within ±20% ｔａｎδ 0.25 max.

１４ Moisture

I.R. More than 10/C MΩ. (C : Rated Cap. in µF ) For the class2 capacitors, perform the heat treatment in par. 5. 1. 1. Solder the specimen to the testing jig shown in Fig.2. Test temperature : 40±2℃ Relative humidity : 90 to 95％ Test period : 500＋24／0 h Before the measurement after test, the specimen shall be left to stand at room temperature for the following period : 48±4 h (continue) 5 of 7 Solder the specimen to the testing jig shown in Fig.2. Condition the specimen to each temperature from step 1 to 4 in this order for the period shown in the table below. Regard- ing this conditioning as one cycle, perform 5 cycles continuously. STEP TEMPERATURE (℃) PERIOD (min)

1 Minimum operation

temperature±3 30±3 2 Room temperature 3 max.

3 Maximum operation

temperature±5 30±3 4 Room temperature 3 max. For the class2 capacitors, perform the heat treatment in par. 5.1.1. Before the measurement after test, the specimen shall be left to stand at room temperature for the following period : 48±4 h

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-KGD38E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Class2 Large Capacitance) DATE 23 th. Apr. 2003 Note ; Ｔａｂｌｅ２ No. Contents Perfomance Test Method Appea- rance There shall be no mechanical damage. Characteristic Change from the value before test. Capac- itance X5R Within ±20% ｔａｎδ 0.25 max. I.R. More than 5/C MΩ. (C : Rated Cap. in µF )

１５ Moisture

For the class2 capacitors, perform the voltage reatment in par. 5. 1. 2. Solder the specimen to the testing jig shown in Fig 2. Test temperature : 40±2℃ Relative humidity : 90 to 95% Applied voltage : Rated Voltage ( D . C . V o l t a g e ) Charge/discharge current shall be within 50mA Test period : 500+24/0 h Before the measurement after test, the specimen shall be left to stand at room temperature for the following period : 48±4 h Appea- rance There shall be no mechanical damage. Characteristic Change from the value before test. Capac- itance X5R Within ±20% ｔａｎδ 0.25 max. I.R. More than 10/C MΩ. (C : Rated Cap. in µF )

１６ High

For the class2 capacitors, perform the voltage treatment in par. 5.1.2. Solder the specimen to the testing jig shown in Fig 2. Tｅｓｔ temperature ： Max. Rated temp.±3℃ Applied voltage ： Rated Voltage （D. C. Voltage） Charge/discharge current shall be w i t h i n 5 0 m A . Test period ： 1000＋48/0 h Before the measurement after test, the specimen shall be left to stand at room temperature for the following period : 48±4 h When uncertainty occurs in the weather resistance characteristi c tests (temperature cycle, moisture resistance, moisture resistant loading, high temperature resistant loading), the same tests shall be performed for the capacitor itself. 6 of 7

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-KGD38E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Class2 Large Capacitance) DATE 23 th. Apr. 2003 Note ; Table 3 OUR STANDARD MEASURING INSTRUMENT MEASURING INSTRUMENT ・Ｃ≦１０ µF 4278A 1kHz/1MHz CAPACITANCE METER (Hewlett-Packard Co.) ・Ｃ＞１０µF 4284A PRECISION LCR METER (Hewlett-Packard Co.) MEASURING MODE PARALLEL MODE RECOMMENDED MEASURING JIG (Note) HP 16034E TEST FIXTURE (Hewlett-Packard Co.) Note : A sample capacitor shall be fitted with a measuring jig terminal center shaft. Fig. 2 Testing jig Table 4 SHAPE [EIA] ＡＢＣ Type 13 [1206] 2.2 5.0 2.0 Type 12 U n i t : m m Material ： Glass epoxy board Thickness ： 1.6mm ：Copper foil (0.035mm thick）： Solder resist Fig. 3 Testing jig Table 5 Material ： Glass epoxy board ：Copper foil (0.035mm thick）：Solder resist SHAPE [EIA] ＡＢＣ BOARD THICK- NESS Type 13 Type 12 U n i t : m m 7 of 7

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; Ceramic Business Unit LCR Device Company Matsushita Electronic Components Co.,Ltd. Kadoma, Osaka, Japan APPROVAL H.Itow CHECK Y.Tsutsumi DESIGN K.Ohishi １．Cautions on Operation If a chip stacked ceramic capacitor ( hereafter referred to as capacitor ) is troubled by its peripheral conditions Such as use environment, design requirements, and installation requirements, it will be short-circuited at worst. If it is used in the shorted state, a large current will flow through it when a voltage is applied which will heat the capacitor body, and possibly burn the circuit board out . Design and assembly cautions are described below. Confirm them sufficiently before use. １．１ Design Cautions １．１．１ Design of Circuit １．１．１．１ Working temperature The working temperature must be within the range specified in the delivery specification. The working temperatures must not exceed the maximum working temperature １．１．１．２ Working voltage The voltage across the terminals of the capacitor must be equal to or less than the rated voltage. Do not use the capacitor in a circuit where an abnormal voltage exceeding the rated voltage (surge voltage, pulse voltage, electrostatic voltage) may be applied to the capacitor. The capacitor may be shorted. If a DC voltage is superimposed with an AC voltage, take care that the peak voltage (Vp - p) is equal to or less than the rated voltage. Even if the voltage is equal to or less than the rated voltage, when the capacitor is used in a circuit where a high frequency voltage or a steep pulse voltage is applied continuously to it, closely examine the reliability of the capacitor. If such a voltage is applied continuously to the capacitor, the service life of it will be affected. １．１．１．３ Working current If the capacitor causes a short-circuit at the secondary side of the power supply circuit, a large current will flow through it to heat the capacitor body, and the circuit board may be burnt out. Sufficiently examine the safety of use, and install a protective circuit if required. １．１．１．４ Self-heating When self-heating is caused by an AC voltage or a pulse voltage circuit, if the ambient temperature around the capacitor in use is room temperature (about 25 ℃), take care so that a temperature rise (a difference between the surface temperature of the capacitor and the ambient temperature around i t ) c o m e s w i t h i n 2 0℃ or below. The surface temperature of the capacitor including an amount increased by the self-heating must be equal to or less than the maximum working temperature specified in the delivery specification. For the temperature rise of the capacitor according to the use circuit conditions, check the actual operating conditions of the equipment in use. １．１．１．５ Limitation of use places Do not use the capacitor in the places indicated below. It may cause a short-circuit. (1) Peripheral environmental (weatherproofness) conditions (a) Places where water or salt water is applied directly (b) Places where dewatering state occurs (c) Places where corrosive gases (hydrogen sulfide, sulfurous acid, chlorine, and ammonia) are filled out (2) Places for which the requirements of vibration or impact are so severe as to exceed the range specified in the delivery specification. 1 of 12

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; １．１．１．６ Piezoelectricity A dielectric used for the capacitor (type 2) causes a piezoelectricity (or an electrostriction). As a result, the following events may occur. (1) If a signal with a specified frequency is applied to the capacitor, the natural frequency of the capacitor determined by the size of the capacitor may cause resonance and generate noise. To prevent this problem, it is effective to change the size of the capacitor to change its resonance frequency. An alternative method is to change the material of the capacitor to a low loss material without causing (or with small) piezoelectricity or to use a type 1 capacitor. (2) If vibration or impact is applied to the capacitor, a mechanical force is converted to electric signals, which may produce noise. (Particularly, care must be taken when the capacitor is used n e a r a n a m p l i f i e r . ) To prevent this problem, the alternative method of changing the material of the capacitor to a low loss material without causing (or with small) piezoelectricity or the use of a type 1 capacitor may b e u s e d . (3) Even if a beating sound occurs, it does not cause any problem with the performance and reliability of products. However, the equipment manufacturer is worried about the sound. Since it may lead to the occurrence of noise, check the equipment for operation. To solve the problem, it is effective to change to a capacitor with a different shape, size, and characteristics of the capacitors indicated in items (1) and (2) above. It may also be effective to change the direction of installation of the capacitor to suppress the resonance with the cabinet of a printed circuit board or fix the capacitor with the cabinet of the printed circuit board with adhesive agent. １．１．２ Design of Circuit Board １．１．２．１ Selection of circuit board When a capacitor is used on an alumina board, it is expected to deteriorate in performance due to thermal impact (temperature cycle). Before using the capacitor on a board, sufficiently examine the actual board to check that the quality of the capacitor is not affected.. １．１．２．２ Setting of land dimensions (1) As the amount of solder increases, stress applied to the capacitor increases, which may lead to cracking. To prevent this problem, when designing the land of a circuit board, set the shape and size thereof so that the amount of solder is of appropriate volume. (2) When two or more parts are installed on a common land, separate them from each other so that the land can be used exclusively for both parts at the solder resist. The recommended land pattern dimensions not causing an excessive amount of solder, cases that should be avoided, and recommended cases are shown below. Recommended land dimensions(Ex.) For General Electronic Equipment , High Value Capacitance Low Thickness Type , 100V･200V series 2 of 12 ab c Solder resist SMDLand

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; U n i t : : m m Component DimensionSize Code ＬＷＴａｂｃ W i d e - W i d t h T y p e Unit: : mm Component DimensionSize Code ＬＷＴａｂｃ A r r a y T y p e U n i t : : m m Component DimensionSize Code ＬＷＴ abcP 0.75 0.5～ 0 . 6 0.2～ 0 . 3 0.4～ 0 . 6 1 . 1 0.7～ 0 . 9 0.35～ 0.45 0.7～ 0 . 9 P/2 Pc a b Land SMD Solder resist b a c SMDLand 3 of 12

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; Cases that should be avoided and recommended cases ( 3 ) Design the land so that its lengths to the right and left are identical to each other. If the amount of solder on the land on the right side is different from that on the left side, stress will act on one side of a part, and a crack may occur since an area with a larger amount of solder will set l a t e r a t t h e t i m e o f c o o l i n g . Recommended amount of solder １．１．２．３ Arrangement of part If a circuit board is bent in the process or during handling after the capacitor is welded to it, the capacitor may cause a crack. To prevent this problem, arrange the part so that stress caused by the deflection of the circuit board can be minimized. (1) The recommended example of arrangement of the capacitor in which mechanical stress caused by warpage or deflection of a circuit board can be minimized. (a) Too large amount of s o l d e r (b) Proper amount o f s o l d e r (c) Too small amount of solder PC board PC board PC board ←solder ←solder ←solder Case of improvement by pattern division The lead line of part with lead Sectional plan Solder resist mixed mounting together with parts with lead arrangement near chassis retrofitting of parts with lead lateral arrangement Cases that should be avoidedItem Chassis Solder (groung solder) Electrode pattern Soldering iron lead of retrofitted parts portion excessively solderedLand Solder resist Sectional plan Sectional plan Solder resist Sectional plan Solder resist Sectional plan Sectional plan Dispose the part sideways relative to the stress acting direction Recommended cases Warpage of circuit board Cases that should be avoided 4 of 12

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; (2) Refer to the following drawings since mechanical stress near the split board varies depending on the installation position of the capacitor. (3) The magnitude of the mechanical stress applied to the capacitor when the circuit board is divided is in the order of those in push back < slit < V-groove < perforation. Consider also the arrangement of the capacitor and the dividing method into account. １．１．２．４ Installation density and part intervals If the parts are arranged too densely, the parts will be affected by bridges and solder balls. C a r e f u l l y d e t e r m i n e t h e p a r t i n t e r v a l s . １．２ Cautions on Assembly １．２．１ Storage (1) Avoid storing parts in hot and humid places. Store them in an environment of 5 to 40 ℃ in temperature and 20 to 70% RH in humidity. (2) If parts are stored in a place where moisture, dust, and/or harmful gas (hydrogen sulfide, sulfurous acid, chlorine, and ammonia) is present, the solderability of external electrodes will deteriorate. Also, if they are stored in a place subjected to heating or exposed to direct sunshine, the tape of taped packages may deform or a part may adhere to the tape, which may cause trouble at the time of i n s t a l l a t i o n . (3) The storage period before use must be within six months. If the products are stored for six months or longer, check them for solderability before use. (4) The products (characteristic symbols: B, F) of high dielectric constant system (type 2) cause a secular change in capacitance depending on the specific characteristics of ceramic dielectric materials. This secular change returns to the capacitance at the time of shipping from the plant at the soldering temperature in the soldering process. (5) When measuring the initial capacitance, perform the heat treatment at a temperature of 150+0/-10℃ for one hour, leave it in a normal temperature and humidity environment for 48 ± 4 hours, and measure the initial value. 5 of 12 ＡＢＣＥＤ Slit Magnitude of stress Ａ＞Ｂ＝Ｃ＞Ｄ＞Ｅ Perforation -10 Time(ｈ) Class１(Char. C,SL) change rate of capacitance (％) Char. Ｂ Char. Ｆ Secular change of capacitance (Ex.)

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; １．２．２ Amount and curing of adhesive agent (1) To determine the amount of application of adhesive agent, carefully examine the amount and viscosity so that the adhesive agent does not expand to the land due to a flow at the time of heating (2) If the amount is too small, the capacitor may fall during flow-soldering. (3) If the viscosity is too low, the installation position of the capacitor may be displaced. (4) Heat hardening is made by ultraviolet and far infrared radiation. To prevent the terminal electrode from being oxidized, perform the heat hardening at a temperature of 160 ℃ for within two minutes (5) If the hardening is not sufficient, the capacitor may fall during flow soldering. Also, insulation resistance between the terminal electrodes may deteriorate due to moisture absorption. To prevent these problems, sufficiently examine the hardening conditions. １．２．３ Installation on circuit board (1) When installing a capacitor on a circuit board, take care so that the pressure and displacement of absorbing nozzles at the time of installation do not occur on the capacitor body and that an excessive impact load such as a mechanical impact and stress, at the time of positioning, is not applied to the c a p a c i t o r b o d y . (2) The maintenance and inspections of the mounting machine must be performed regularly. (3) If the bottom dead center of the adsorbing nozzles is too low, an excessive force will be applied to the capacitor at the time of installation causing cracking. Use the following cautions for your reference. 1) Set and adjust the bottom dead center of the adsorbing nozzles to the upper surface of the circuit board after correcting the warpage of the circuit board. 2) Set the nozzle pressure at the time of installation to 1 to 3 N or below in static load. 3) For double surface installation, to minimize the impact of the adsorbing nozzles, apply a support pin on the rear surface of the circuit board to suppress the deflection of the circuit board. A typical example is shown in the following. 4) Adjust the adsorbing nozzles so that their bottom dead center at the time of installation is not l o w e r e d e x c e s s i v e l y . (4) If the positioning claw becomes worn, at the time of positioning, the mechanical impact applied to the capacitor will be applied locally, which may cause chipping or cracking on the capacitor. To prevent these problems, control the closed dimension of the positioning claw, and perform the maintenance, inspections, and the replacement of the positioning claw at regular intervals. 6 of 12 Double surface installation One surface installation Crack Support pin Separation of solder The support pin must not be necessarily positioned just beneath the capacitor. Support pinCrack Cases that should be avoided recommended cases

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; １．２．４ Selection of Flux Flux may seriously affect the performance of the capacitor. Therefore, check the following before use. (1) Use flux having a halogen based content of 0.1 wt. % (converted to chlorine) or below. Do not use flux with strong acid. (2) The coated amount of flux when the capacitor is soldered to the circuit board must be confirmed. (3) When using soluble flux, wash clean the capacitor sufficiently. １．２．５ Soldering １．２．５．１ Flow Soldering By flow-soldering, stress due to an abrupt temperature change is applied directly to the part body. Therefore, take sufficient care to control the solder temperature. Capacitors particularly dislike abrupt heating and cooling. If the capacitor is abruptly heated or cooled, a strain will be produced inside the capacitor due to a large temperature difference, which may cause thermal cracking. To prevent this problem, take sufficient care of the temperature difference. (1) Coating of flux: Apply a thin coat of flux uniformly. For flow-soldering, the coating of flux using the foaming method is generally used. (2) Preheating: Sufficiently preheat the capacitor so that a difference between the solder temperature and the surface temperature of the capacitor is 150 ℃ or below (100 to 130 ℃). (3) Immersion into solder: Immerse the capacitor in a molten solder bath of 240 to 260 ℃ for 3 to 5 s e c o n d s . (4) After soldering, gradually cool the capacitor. Avoid cooling it abruptly (forcibly). Failure to do so may cause thermal cracking. (5) Cleaning: If the capacitor is immersed into the cleaning solvent immediately after soldering, confirm that the surface temperature of the capacitor is 100 ℃ or below beforehand. (6) The one time of flow-soldering in the conditions shown in the figure below [recommended p r o f i l e o f f l o w - s o l d e r i n g ( e x a m p l e ) ] d o n o t c a u s e a n y p r o b l e m s . However, take sufficient care with regards to warpage and possible deflection of the circuit b o a r d . Recommended profile of Flow Soldering ［Ex.］〈Allowable temperature difference △Ｔ〉 Size Temp. Tol. 0603 to 1206 0508 , 0612 △Ｔ≦１５０℃ 7 of 12 60～120s 3～5s Soldering Gradual cooling （Leave undisturbed at room temperature ）△T 240 ～260℃ Time Temp. (℃)

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; １．２．５．２ Reflow Soldering The temperature conditions for reflow soldering are formed of the temperature curves of the preheat section, temperature rise section, heating section, and gradual cooling section. If heat is abruptly applied to a capacitor, a strain will be produced inside a capacitor due to the large temperature difference, which may cause thermal cracking. To prevent this problem, take sufficient care with the temperature difference. The preheat section is a critical area for prevention of tombstone (chip standing) and, therefore, control the temperature with sufficient care. (1) Preheat: Increase the surface temperature of the circuit board to 140 to 160 ℃. (2) Temperature increasing stage : 150 to 220 ℃ at a rate of 2 to 5 ℃/sec. ( 3 ) H e a t i n g s e c t i o n : 2 2 0℃ or above within 20 sec. (4) Gradual cooling section: Leave undisturbed at room temperature Avoid cooling the gradual cooling section abruptly (forcibly). Failure to do so may cause t h e r m a l c r a c k i n g . 230 to 100 ℃ at a rate of 1 to 4 ℃/sec. (5) Cleaning: If the capacitor is immersed into cleaning solvent immediately after soldering, confirm that the surface temperature of the capacitor is 100 ℃ or below beforehand. (6) The two times of flow-soldering in the conditions shown in the figure below [Recommended p r o f i l e o f r e f l o w - s o l d e r i n g ( e x a m p l e ) ] d o n o t c a u s e a n y p r o b l e m . However, take sufficient care with regards to warpage and the possible deflection of the circuit b o a r d . (Allowable temperature difference △Ｔ〉 Size Temp. Tol. 0201 to 1206 0508 , 0612 △Ｔ≦１５０℃ 1210 to 2220 △Ｔ≦１３０℃ １．２．５．３ Soldering with soldering iron In soldering with a soldering iron, stress due to an abrupt temperature change is applied directly to the capacitor body. Accordingly, carefully control the temperature of the soldering iron tip. Take care that the soldering iron tip does not come directly into contact with the capacitor body and t h e t e r m i n a l e l e c t r o d e . Temp. increasing stage 60s min. ①Preheating1 ③Soldering ④Cooling Time 120s max. 20s max. 220℃ 240 ～260℃ Temp. (℃) 8 of 12

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; Capacitors particularly dislike abrupt heating and cooling. If the capacitor is abruptly heated or cooled, a strain will be produced inside the capacitor due to the large temperature difference, which may cause thermal cracking. To prevent this problem, take sufficient care of the temperature difference. Solder with the soldering iron taking care so as not to heat or cool abruptly before and after the soldering. The product once removed with the soldering iron cannot be re-used. (1) Condition 1 (with preheating) 1) Solder: Use a wire solder requiring a smaller amount of flux chlorine for precision electronic equipment (wire diameter: 1.0 mm dia. or less). 2) Preheating: Preheat sufficiently so that the difference between the solder temperature and the surface temperature of the capacitor is 150 ℃ or below. 3) Iron tip temperature: 300℃ or below (Fuse the required amount of solder at the tip of the soldering iron beforehand.) 4) Gradual cooling: After soldering, leave the capacitor undisturbed at room temperature to allow it t o c o o l g r a d u a l l y . R e c o m m e n d e d p r o f i l e f o r s o l d e r i n g w i t h a s o l d e r i n g i r o n［Ex.］〈Allowable temperature difference △Ｔ〉 Size Temp. Tol. 0201 to 1206 0508 , 0612 △Ｔ≦１５０℃ 1210 to 2220 △Ｔ≦１３０℃ (2) Condition 2 (without preheating) Without preheating, the soldering iron can be corrected within the range specified below. 1) The soldering iron tip must not directly touch the ceramic dielectric of the capacitor. 2) After preheating the land section sufficiently with the soldering iron tip, slide the soldering iron tip to the terminal electrode of the capacitor for soldering. Conditions of soldering iron tip without preheating Condition Chip size 0201 to 0805 , 0508 1206 to 2220 , 0612 Temperature of soldering iron 270 ℃ Max. 250 ℃ Max. Wattage 20W Max. Shape of soldering iron tip φ3mm Max. Soldering time with soldering iron 3s Max. 9 of 12 60 to 120 s Soldering Gradual cooling Preheating 3 s max.

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; １．２．６ Cleaning (1) If the cleaning solvent is not appropriate, residue and other foreign matter of the flux may adhere to the surface of the capacitor and deteriorate the performance (particularly, insulation resistance) of t h e c a p a c i t o r . (2) If the cleaning conditions are not appropriate (insufficient cleaning, excessive cleaning), the performance of the capacitor may be impaired. 1) If cleaning is insufficient: ① The metal of the terminal electrode may be corroded by the halogen substance contained in t h e r e s i d u e o f t h e f l u x . ② The halogen substance contained in the residue of the flux may adhere to the surface of the c a p a c i t o r a n d l o w e r t h e i n s u l a t i o n r e s i s t a n c e . ③ The tendencies of items 1) and 2) above may be remarkable for soluble flux more than those f o r r o s i n f l u x . 2) If cleaning is excessive: ① For ultrasonic cleaning, if output is too large, the circuit board may cause resonance to develop cracking in the body of the capacitor or solder, which will lower the strength of the terminal e l e c t r o d e . To prevent these problems, perform cleaning as follows. U l t r a s o n i c w a v e o u t p u t : 2 0 W / L o r b e l o w U l t r a s o n i c w a v e f r e q u e n c y : 4 0 k H z o r b e l o w U l t r a s o n i c w a v e c l e a n i n g t i m e : 5 m i n . o r s h o r t e r 3) If the cleaning solvent is contaminated, the density of liberated halogen may be increased to induce the same results as those obtained when the cleaning is insufficient. １．２．７ Inspections When inspecting a capacitor on the circuit board after installation, check whether the circuit board is fixed by a support pin or a dedicated jig. (1) Take care so that the circuit board is not deflected by the pressure of the check pin. (2) Take care so that the circuit board is not vibrated by the impact at the time of contact. When the operational check of the circuit board is performed, the pressing force of the check pin may be increased to prevent poor contact of the check pin of the board checker. By the force, the circuit board may be deflected, and the capacitor may be broken or the solder at the terminal electrode may be separated by the stress due to the deflection. Accordingly, referring to the following figure, take an appropriate measure against possible deflection of the circuit board. １．２．８ Protective Coat (1) When resin is coated on the installation surface for moistureproofing and dustproofing after the capacitor is installed on the circuit board, check the actual equipment that the quality of the capacitor is not affected by the protective coat. 10 of 12 Separated Deflect of circuit board Cases that should be avoided Check pin Recommended cases Support pin Check pin

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; (2) Select those materials which do not generate cracked gas nor reaction gas that may affect the m e m b e r s f o r m i n g t h e c a p a c i t o r . (3) If large stress is applied to the capacitor due to thermal expansion or thermal contraction at the time of curing the resin, cracking may occur in the capacitor. １．２．９ Division of multiple printed circuit board (1) During the circuit board dividing operation after the installation of the parts including the capacitor, take care not to provide deflective or torsional stress to the circuit board. If stress such as deflection or torsion, shown in the following figure, is applied to the circuit board when the circuit board is divided, cracking may occur in the capacitor. To prevent this problem, take care not to apply any stress to it. (2) When dividing a circuit board, avoid dividing manually, but use a dedicated jig to prevent mechanical stress from being applied to the circuit board. (3) Example of circuit board dividing jig The outline of the circuit board dividing jig is shown below. It is recommended that you hold the circuit board at the portion near the jig so that the board is not deflected and divide the stress caused so that only compressive stress is applied to the part such as the capacitor. Avoid holding the circuit board at any position apart from the jig, as the board will be easily deflected, and divide it so that tensile stress is not applied to the capacitor, which may cause cracking in the capacitor １．２．１０ Mechanical Impact (1) Take care not to apply any excessive mechanical impact to the capacitor. Since the capacitor body is made of ceramics, it may become damaged or cracked by a drop impact. The quality of the dropped capacitor may already be lost, and its failure level of significance may be i n c r e a s e d . N e v e r u s e i t . Particularly, capacitors of a large size tend to be damaged or cracked more easily. 11 of 12 Deflective Torsion Circuit board dividing jig Circuit board Load position V-groove Load direction Recommended cases Cases that should be avoided V-groove Circuit board Outline of jig Parts Load position Circuit board Parts V-groove Load direction /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 Floor Crack

CLASSIFICATION SPECIFICATIONS No. 151S-ECJ-SS001E PAGESUBJECT Multilayer Ceramic Chip Capacitor Common Specifications (Precautions for Use) DATE 1st. Apr. 2002 Note ; (2) When handling a circuit board with a capacitor, take care that another circuit board does not collide with the capacitor. When circuit boards after installation are stored in a stacked state or handled, the corners of them may collide with a capacitor causing damage or cracking in the capacitor by the impact, which may lead to a deterioration of the withstand voltage and a reduction in insulation resistance. １．３ Remarks The above cautions are typical ones. For special installation conditions, contact us. Cautions of Operations above are from Please refer to above technical report for details. /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 Circuit boards after installationCrack /i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0/i0 The Technical Report EIAJ RCR-2333 Caution Guide Line for Operation of Fixed Multilayer Ceramic Capacitors for Electronic Equipment by Electronic Industries Association of Japan. (March 1995 issued) The Technical Report EIAJ RCR-2335 Caution Guide Line for Operation of Fixed Multilayer Ceramic Capaci- tors for Electronic Equipment by Japan Electronics & Information Technology Industries Association (New enactment in 2002) 12 of 12

CLASSIFICATION ＳＰＥＣＩＦＩＣＡＴＩＯＮＳ No. 151S-ECJ-SV020E PAGE 1 o f 6SUBJECT Multilayer Ceramic Chip Capacitor Taped and Reeled Packaging Specifications DATE 1st. Apr. 2002 Note : Ceramic Business Unit LCR Device Company Matsushita Electronic Components Co.,Ltd. Kadoma, Osaka, Japan APPROVAL H.Itow CHECK A.Omi DESIGN T.Shinriki １．Scope This specification applies to taped and reeled packing for MATSUSHITA’s multilayer ceramic chip capacitors. ２．Applicable Standards EIAJ (Electric Industries Association of Japan) Standard EIAJ RC-1009B JIS (Japanese Industrial St andard) Standard JIS C 0806 ３．Packing Specification ３．１ Structure and Dimensions Paper taping packaging is carried out according the following diagram （１）Carrier tape : Shown in Fig. 5. （２）Reel : Shown in Fig. 6. （３） P a c k a g i n g : W e s h a l l p a c k s u i t a b l y i n o r d e r p r e v e n t damage during transportation or storage. ３．２ Packing Quantity Carrier-Tape Quantity （pcs.／reel） φ180mm Reel φ330mm ReelType Thickness of Capacitor(mm) Material Taping Pitch Packaging Code Quantity Packaging Code Quantity “06”(0201) 0.30 ± 0.03 Paper Taping 2mm Ｅ 15000 ―― ―― “10”(0402) 0.50 ± 0.05 Paper Taping 2mm Ｅ 10000 Ｗ 50000 “11”(0603) 0.8 ± 0.1 Paper Taping 4mm Ｖ 4000 Ｚ 10000 0.6 ± 0.1 Paper Taping 4mm Ｖ 5000 Ｚ 20000 “12”(0805) 0.85 ± 0.10 Paper Taping 4mm Ｖ 4000 Ｚ 10000 1.25 ± 0.10 1.25 ± 0.15 1.25 ± 0.20 Embossed Tap. 4mm Ｆ 3000 ―― ―― 0.6 ± 0.1 Paper Taping 4mm Ｖ 5000 Ｚ 20000 0.85 ± 0.10 Paper Taping 4mm Ｖ 4000 Ｚ 10000 “13”(1206) 1.15 ± 0.10 Embossed Tap. 4mm Ｆ 3000 ―― ―― 1.15 ± 0.10 Embossed Tap. 4mm Ｙ 2000 ―― ―― 1.6 ± 0.2 Embossed Tap. 4mm Ｙ 2000 ―― ―― “23”(1210) 2.0 ± 0.2 Embossed Tap. 4mm Ｙ 2000 ―― ―― 2.5 ± 0.3 Embossed Tap. 4mm Ｙ 1000 ―― ―― “34”(1812) 2.5 ± 0.3 Embossed Tap. 8mm Ｙ 500 ―― ―― 3.2 ± 0.3 Embossed Tap. 8mm Ｙ 500 ―― ―― ※ E x p l a n a t i o n o f P a r t N u m b e r s ( E x a m p l e ) ＥＣＪ１ＶＢ１Ｃ１０４Ｋ P a c k a g i n g C o d e

CLASSIFICATION ＳＰＥＣＩＦＩＣＡＴＩＯＮＳ No. 151S-ECJ-SV020E PAGESUBJECT Multilayer Ceramic Chip Capacitor Taped and Reeled Packaging Specifications DATE 1st. Apr. 2002 Note : ３．３ Marking on the Reel The following items are described in the side of a reel in English at least. （１）Part Number （２） Q u a n t i t y （３） L o t N u m b e r （４） C o u n t r y o r o r i g i n ３．４ Structure of Taping （１）The direction of winding of taping on the reel shall be in accordance with the following diagram. Fig. 1 Paper Taping Fig. 2 Embossed Taping 2 of 6

CLASSIFICATION ＳＰＥＣＩＦＩＣＡＴＩＯＮＳ No. 151S-ECJ-SV020E PAGESUBJECT Multilayer Ceramic Chip Capacitor Taped and Reeled Packaging Specifications DATE 1st. Apr. 2002 Note : （２）The specification of the leader and empty portion shall be in accordance with the following diagram. Fig. 3 Leader Part and Taped End ４．Efficiency ４．１ Breakage strength of the tape : 10N or more. ４．２ Peel strength of the cover tape (refer to the following figure). （１）Peel angle : 165 to 180 degree from the tape adhesive face. （２）Peel velocity : 300mm per min. （３）Peel strength : 0.1 to 0.7N Fig. 4 Peel strength of the cover tape （ａ）Paper Taping （ｂ）Embossed Taping 3 of 6

CLASSIFICATION ＳＰＥＣＩＦＩＣＡＴＩＯＮＳ No. 151S-ECJ-SV020E PAGESUBJECT Multilayer Ceramic Chip Capacitor Taped and Reeled Packaging Specifications DATE 1st. Apr. 2002 Note : ４．３ Barrs on tape There shall be no barrs preventing suction when products are taken out. ４．４ Missing of products The missing of products shall be 0.1% or less per reel and ther e shall be no continuous missing of products. ４．５ Adherence to the tape Products shall not be stuck to the cover tape or bottom tape. Fig. 5 Carrier Tape Dimension （ａ）”06” and “10”type : 2mm taping pitch for Paper taping 記号寸法Ｗ8 . 0 ± 0 . 2 Ｆ 3.50 ± 0.05 Ｅ 1.75 ± 0.10 Ｐ１ 2.00 ± 0.05 Ｐ２ 2.00 ± 0.05 Ｐ０ 4.00 ± 0.05 Ｄ０ φ1.5 +0.1/-0 “06” Type 0.5 max.ｔ１ “10” Type 0.7 max. “06” Type 0.8 max.ｔ２ “10” Type 1.0 max. Unit : mm （ｂ）“11” and “12” and “13” type : 4mm taping pitch for Paper tap ing. Code Dimension Ｗ8 . 0 ± 0 . 2 Ｆ 3.50 ± 0.05 Ｅ 1.75 ± 0.10 Ｐ１ 4.0 ± 0.1 Ｐ２ 2.00 ± 0.05 Ｐ０ 4.0 ± 0.1 Ｄ０ φ1.5 +0.1/-0 ｔ１ 1.1 max. ｔ２ 1.4 max. Unit : mm Type 4 of 6 Type Code “06” “10” Ａ 0.37 ± 0.03 0.65 ± 0.05 Ｂ 0.67 ± 0.05 1.15 ± 0.05

CLASSIFICATION ＳＰＥＣＩＦＩＣＡＴＩＯＮＳ No. 151S-ECJ-SV020E PAGESUBJECT Multilayer Ceramic Chip Capacitor Taped and Reeled Packaging Specifications DATE 1st. Apr. 2002 Note : （ｃ）“12” and “13” and “23” type : 4mm chip taping pitch for Embossed taping. Code Dimension Ｗ8 . 0 ± 0 . 2 Ｆ 3.50 ± 0.05 Ｅ 1.75 ± 0.10 Ｐ１ 4.0 ± 0.1 Ｐ２ 2.00 ± 0.05 Ｐ０ 4.0 ± 0.1 Ｄ０ φ1.5 +0.1/-0 Ｄ１ φ1.1± 0.1 ｔ１ 0.6 max. “12”” 13” type 2.5 max. “23”type 3.5 max. Unit : mm Type （d）“34”type : 8mm chip tapin g pitch for Embossed taping. Code Dimension Ｗ 12.0 ± 0.3 Ｆ 5.50 ± 0.05 Ｅ 1.75 ± 0.10 Ｐ１ 8.0 ± 0.1 Ｐ２ 2.00 ± 0.05 Ｐ０ 4.0 ± 0.1 Ｄ０ φ1.5 +0.1/-0 ｔ１ 0.6 max. ｔ２ 4.0max. Unit：ｍｍ Type Code “34” (1812) Ａ3 . 6 ± 0 . 3 Ｂ4 . 9 ± 0 . 3 5 of 6

CLASSIFICATION ＳＰＥＣＩＦＩＣＡＴＩＯＮＳ No. 151S-ECJ-SV020E PAGESUBJECT Multilayer Ceramic Chip Capacitor Taped and Reeled Packaging Specifications DATE 1st. Apr. 2002 Note : Fig. 6 Reel Dimension （ａ）φ180mm Reel (Standard Reel) Code Dimension Ａ φ180+0/-3.0 Ｂ φ 6 0 ± 0 . 5 Ｃ 13.0 ± 0.5 Ｄ 21.0 ± 0.8 Ｅ2 . 0 ± 0 . 5 Ｗ9 . 0 ± 0 . 3 Ｗ１ 11.4 ± 0.1 Unit : mm （ｂ）φ330mm Reel (Large size Reel) Code Dimension Ａ φ330 ± 5.0 Ｂφ 5 0 m i n . Ｃ 13.0 ± 0.5 Ｄ2 0 m i n . Ｅ2 . 0 ± 0 . 5 Ｗ9 . 5 ± 1 . 0 Ｗ１ 2.0 ± 0.5 Unit : mm 6 of 6

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PRODUCT SPECIFICATION FOR INFORMATION

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