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Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Renesas Technology Home Page: http://www.renesas.com Renesas Technology Corp. Customer Support Dept. April 1, 2003 To all our customers

Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. 2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.

MOS FET Power Amplifier Module for E-GSM and DCS1800/1900 Triple Band Handy Phone ADE-208-1606 (Z) Rev.0 Oct. 2002 Application

Triple band amplifier for E-GSM (880 MHz to 915 MHz), DCS1800/1900 (1710 MHz to 1785 MHz, 1850 MHz to 1910 MHz).
For 3.5 V & GPRS Class12 operation compatible

Features

All in one including output matching circuit
Simple external circuit
Simple power control
High gain 3stage amplifier : 0 dBm input Typ
Lead less thin & Small package : 8.0 × 10.0 mm Typ × 1.5 mm Max
High efficiency : 55% Typ at 35.0 dBm for E-GSM 47% Typ at 32.5 dBm for DCS1800 47% Typ at 32.0 dBm for DCS1900 Pin Arrangement Pin GSM Vapc Vdd1 Pout GSM Pout DCS Vdd2 Vctl Pin DCS GND RF-Q-8 1 2 3 4 G 8 7 6G

Rev.0, Oct. 2002, page 2 of 14 Absolute Maximum Ratings * (Tc = 25°C) Item Symbol Rating Unit Remark

7.0 V at no-operationSupply voltage Vdd

5.0 V at operation (50 Ω load)

Idd GSM 3.5 ASupply current Idd DCS 2A Vctl voltage Vctl 4 V Vapc voltage Vapc 4 V Input power Pin 10 dBm Operating case temperature * Tc (op) −30 to +100 °C Storage temperature Tstg −40 to +100 °C Pout GSM 5WOutput power Pout DCS 3W Notes: 1. The maximum ratings shall be valid over both the E-GSM-band (880 to 915 MHz), and the DCS1800/1900-band (1710 to 1785 MHz, 1850 to 1910 MHz). 2. These are specified at pulsed operation with pulse width = 1154 µsec and duty cycle of 2:8. Electrical Characteristics for DC (Tc = 25°C) Item Symbol Min Typ Max Unit Test Condition Drain cutoff current Ids  20 µA Vdd = 4.7 V, Vapc = 0 V, Vctl = 0.2 V Vapc control current Iapc  2.0 mA Vapc = 2.2 V Vctl control current Ictl  2 µAV c t l = 3 V

Rev.0, Oct. 2002, page 3 of 14 Electrical Characteristics for E-GSM band (Tc = 25°C) Test conditions unless otherwise noted: f = 880 to 915 MHz, Vdd1 = Vdd2 = 3.5 V, Pin = 0 dBm, Vctl = 2.0 V, Rg = Rl = 50 Ω, Tc = 25°C, Pulse operation with pulse width 1154 µs and duty cycle 2:8 shall be used. Item Symbol Min Typ Max Unit Test Condition Frequency range f 880  915 MHz Band select (GSM active) Vctl 2.0  2.8 V Input power Pin –2 0 2 dBm Control voltage range Vapc 0.2  2.2 V Supply voltage Vdd 3.1 3.5 4.5 V Total efficiency ηT 47 55  % 2nd harmonic distortion 2nd H.D. − 15(–50) 0(–35) dBm(dBc) 3rd harmonic distortion 3rd H.D. − 10(–45) 0(–35) dBm(dBc) 4th~8th harmonic distortion 4th~8th H.D. 0(–35) dBm(dBc) Input VSWR VSWR (in)  1.5 3  Pout GSM = 35 dBm, Vapc = controlled Output power (1) Pout (1) 35.0 36.0  dBm Vapc = 2.2 V Output power (2) Pout (2) 33.5 34.5  dBm Vdd = 3.1 V, Vapc = 2.2 V, Tc = +85°C Idd at Low power   300 mA Pout GSM = 7 dBm Isolation  − 48 −37 dBm Vapc = 0.2 V Isolation at DCS RF-output when GSM is active  − 25 −18 dBm Pout GSM = 35 dBm, Measured at f = 1760 to 1830 MHz Switching time t r, tf  12 µs Pout GSM = 5 to 35 dBm Stability  No parasitic oscillation > –36 dBm  Vdd = 3.1 to 4.5 V, Pout ≤ 35 dBm, Vapc GSM ≤ 2.2 V, Rg = 50 Ω, Output VSWR = 6 : 1 All phase angles Load VSWR tolerance  No degradation or Permanent degradation  Vdd = 3.1 to 4.5 V, Pout GSM ≤ 35 dBm, Vapc GSM ≤ 2.2 V, Rg = 50 Ω, t ≤ 20 sec., Output VSWR = 10 : 1 All phase angles Load VSWR tolerance at GPRS CLASS 12 operation  No degradation or Permanent degradation  Vdd = 3.1 to 4.2 V, Pout GSM ≤ 35 dBm, Vapc GSM ≤ 2.2 V, Rg = 50 Ω, t ≤ 20 sec., Tc ≤ 90°C, Output VSWR = 10 : 1 All phase angles Slope Pout/Vapc  160 200 dB/V Pout GSM = 5 to 35 dBm AM output  15 20 % Pout GSM = 5 to 35 dBm, 4% AM modulation at input 50 kHz modulation frequency

Rev.0, Oct. 2002, page 4 of 14 (Tc = 25°C) Test conditions unless otherwise noted: f = 1710 to 1785 MHz, Vdd1 = Vdd2 = 3.5 V, Pin = 0 dBm, Vctl = 0 V, Rg = Rl = 50 Ω, Tc = 25°C, Pulse operation with pulse width 1154 µs and duty cycle 2:8 shall be used. Item Symbol Min Typ Max Unit Test Condition Frequency range f 1710  1785 MHz Band select (DCS active) Vctl 0  0.1 V Input power Pin –2 0 2 dBm Control voltage range Vapc 0.2  2.2 V Supply voltage Vdd 3.1 3.5 4.5 V Total efficiency ηT 40 47  % 2nd harmonic distortion 2nd H.D. − 14.5(–47) −2.5(–35) dBm(dBc) 3rd harmonic distortion 3rd H.D. − 7.5(–40) −2.5(–35) dBm(dBc) 4th~8th harmonic distortion 4th~8th H.D. − 2.5(–35) dBm(dBc) Input VSWR VSWR (in)  1.5 3  Pout DCS = 32.5 dBm, Vapc = controlled Output power (1) Pout (1) 32.5 33.5  dBm Vapc = 2.2 V Output power (2) Pout (2) 31.0 32.0  dBm Vdd = 3.1 V, Vapc = 2.2 V, Tc = +85°C, Idd at Low power  — 150 mA Pout DCS = 5 dBm Isolation  − 42 −37 dBm Vapc = 0.2 V Switching time t r, tf  12 µs Pout DCS = 0 to 32.5 dBm Stability  No parasitic oscillation > –36 dBm  Vdd = 3.1 to 4.5 V, Pout DCS ≤ 32.5 dBm, Vapc ≤ 2.2 V, Rg = 50 Ω, Output VSWR = 6 : 1 All phase angles Load VSWR tolerance  No degradation or Permanent degradation  Vdd = 3.1 to 4.5 V, Pout DCS ≤ 32.5 dBm, Vapc ≤ 2.2 V, Rg = 50 Ω, t ≤ 20 sec., Output VSWR = 10 : 1 All phase angles Load VSWR tolerance at GPRS CLASS 12 operation  No degradation or Permanent degradation  Vdd = 3.1 to 4.2 V, Pout DCS ≤ 32.5 dBm, Vapc ≤ 2.2 V, Rg = 50 Ω, t ≤ 20 sec., Tc ≤ 90°C, Output VSWR = 10 : 1 All phase angles Slope Pout/Vapc  160 200 dB/V Pout DCS = 0 to 32.5 dBm AM output  15 20 % Pout DCS = 0 to 32.5 dBm, 4% AM modulation at input 50 kHz modulation frequency

Rev.0, Oct. 2002, page 5 of 14 (Tc = 25°C) Test conditions unless otherwise noted: f = 1850 to 1910 MHz, Vdd1 = Vdd2 = 3.5 V, Pin = 0 dBm, Vctl = 0.2 V, Rg = Rl = 50 Ω, Tc = 25°C, Pulse operation with pulse width 1154 µs and duty cycle 2:8 shall be used. Item Symbol Min Typ Max Unit Test Condition Frequency range f 1850  1910 MHz Band select (DCS active) Vctl 0  0.1 V Input power Pin –2 0 2 dBm Control voltage range Vapc 0.2  2.2 V Supply voltage Vdd 3.1 3.5 4.5 V Total efficiency ηT 40 47  % 2nd harmonic distortion 2nd H.D. − 15(–47) −3(–35) dBm(dBc) 3rd harmonic distortion 3rd H.D. − 8(–40) −3(–35) dBm(dBc) 4th~8th harmonic distortion 4th~8th H.D. − 3(–35) dBm(dBc) Input VSWR VSWR (in)  1.5 3  Pout DCS = 32.0 dBm, Vapc = controlled Output power (1) Pout (1) 32.0 33.0  dBm Vapc = 2.2 V Output power (2) Pout (2) 30.5 31.5  dBm Vdd = 3.1 V, Vapc = 2.2 V, Tc = +85°C Idd at Low power   150 mA Pout DCS = 5 dBm Isolation  − 42 −37 dBm Vapc = 0.2 V Switching time t r, tf  12 µs Pout DCS = 0 to 32.0 dBm Stability  No parasitic oscillation > –36 dBm  Vdd = 3.1 to 4.5 V, Pout DCS ≤ 32.0 dBm, Vapc ≤ 2.2 V, Rg = 50 Ω, Output VSWR = 6 : 1 All phase angles Load VSWR tolerance  No degradation or Permanent degradation  Vdd = 3.1 to 4.5 V, Pout DCS ≤ 32.0 dBm, Vapc ≤ 2.2 V, Rg = 50 Ω, t ≤ 20 sec., Output VSWR = 10 : 1 All phase angles Load VSWR tolerance at GPRS CLASS 12 operation  No degradation or Permanent degradation  Vdd = 3.1 to 4.2 V, Pout DCS ≤ 32.0 dBm, Vapc ≤ 2.2 V, Rg = 50 Ω, t ≤ 20 sec., Tc ≤ 90°C, Output VSWR = 10 : 1 All phase angles Slope Pout/Vapc  160 200 dB/V Pout DCS = 0 to 32.0 dBm AM output  15 20 % Pout DCS = 0 to 32.0 dBm, 4% AM modulation at input 50 kHz modulation frequency

Rev.0, Oct. 2002, page 6 of 14 Circuit Diagram PIN8 Pin DCS PIN1 Pin GSM PIN4 Pout GSM PIN5 Pout DCS Bias circuit PIN7 Vctl PIN3 Vdd1 PIN6 Vdd2 PIN2 Vapc

Rev.0, Oct. 2002, page 7 of 14 Characteristic Curves GSM mode (880MHz to 915 MHz) GSM mode (880 MHz) Eff vs. Pout 0 5 10 15 20 25 30 35 40 Pout (dBm) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C GSM mode (915 MHz) Eff vs. Pout 0 5 10 15 20 25 30 35 40 Pout (dBm) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C GSM mode (880 MHz) Pout, Eff vs. Pin 34.5 35.0 35.5 36.0 36.5 37.0 –10 –8 –6 –4 –2 02468 1 0 Pin (dBm) Pout (dBm) Eff Pout Vdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 35 dBm Eff (%) Eff (%) GSM mode (915 MHz) Pout, Eff vs. Pin 34.5 35.0 35.5 36.0 36.5 37.0 –10 –8 –6 –4 –2 02468 1 0 Pin (dBm) Pout (dBm) Eff Pout Vdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 35 dBm Eff (%) Eff (%) Vapc (V) GSM mode (880 MHz) Pout, Eff vs. Vapc –50 –40 –60 –30 –20 –10 Pout (dBm) 100 Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Pout Eff Vapc (V) GSM mode (915 MHz) Pout, Eff vs. Vapc –50 –40 –60 –30 –20 –10 Pout (dBm) 100 Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Eff Pout

Rev.0, Oct. 2002, page 8 of 14 GSM mode (880MHz to 915 MHz) (cont.) Vdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 35 dBm GSM mode (880 MHz) Idd vs. Pout 0.01 0.1 –50 –40 –20–30 –10 0 10 20 30 40 Pout (dBm) Idd (A) GSM mode (880 MHz) Pout vs. Pin –8 –6 –4 –2 02468 Pin (dBm) Pout (dBm) GSM mode (915 MHz) Pout vs. Pin GSM mode (915 MHz) Idd vs. Pout 700 750 800 850 900 950 1000 Freq (MHz) GSM mode Pout, Eff vs. Freq Pout (dBm) Eff (%) Pout

880 MHz

915 MHz

Vdd = 3.5 V, Tc = 25°C Vdd = 3.5 V, Tc = 85°C Vdd = 3.1 V, Tc = 85°C Eff Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C 0.01 0.1 –50 –40 –20–30 –10 0 10 20 30 40 Pout (dBm) Idd (A) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Vdd = 3.5 V Tc = 25°C Vapc = 2.2 V –8 –6 –4 –20 2 4 6 8 Pin (dBm) Pout (dBm) Vdd = 3.5 V, Tc = 25°C Vdd = 3.5 V, Tc = 85°C Vdd = 3.1 V, Tc = 85°C Vapc = 2.2 V GSM mode Pout vs. Vdd Vdd (V) Pout (dBm) Pout:Vapc = 2.2 V Eff:Pout = 35 dBm

Rev.0, Oct. 2002, page 9 of 14 DCS mode (1710MHz to 1785 MHz) DCS mode (1710 MHz) Eff vs. Pout 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35 Pout (dBm) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C DCS mode (1785 MHz) Eff vs. Pout Pout (dBm) Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C DCS mode (1710 MHz) Pout, Eff vs. Pin 32.0 32.5 33.0 33.5 34.0 34.5 –10 –8 –6 –4 –2 02468 1 0 Pin (dBm) Pout (dBm) Eff PoutVdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 32.5 dBm Eff (%) DCS mode (1785 MHz) Pout, Eff vs. Pin Eff (%) Vapc (V) DCS mode (1710 MHz) Pout, Eff vs. Vapc –50 –40 –60 –30 –20 –10 Pout (dBm) 100 Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Pout Eff Vapc (V) DCS mode (1785 MHz) Pout, Eff vs. Vapc –50 –40 –60 –30 –20 –10 Pout (dBm) 100 Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Eff Pout 32.0 32.5 33.0 33.5 34.0 34.5 –10 –8 –6 –4 –2 02468 1 0 Pin (dBm) Pout (dBm) Eff Pout Vdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 32.5 dBm Eff (%)

Rev.0, Oct. 2002, page 10 of 14 DCS mode (1710MHz to 1785 MHz) (cont.) Pin = 0 dBm Vapc = 2.2 V Tc = 25°C DCS mode (1710 MHz) Idd vs. Pout 0.01 0.1 –50 –40 –20–30 –1 00 1 02 03 04 0 Pout (dBm) Idd (A) DCS mode (1710 MHz) Pout vs. Pin –8 –6 –4 –2 02468 Pin (dBm) Pout (dBm) DCS mode (1785 MHz) Pout vs. Pin DCS mode (1785 MHz) Idd vs. Pout 1600 1650 1700 1750 1800 1850 1900 1950 2000 Freq (MHz) DCS, PCS mode Pout, Eff vs. Freq Pout (dBm) Eff (%) Pout 1710 MHz

1785 MHz

Vdd = 3.5 V, Tc = 25°C Vdd = 3.5 V, Tc = 85°C Vdd = 3.1 V, Tc = 85°C Eff Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C 0.01 0.1 –50 –40 –20–30 –10 0 10 20 30 40 Pout (dBm) Idd (A) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Vdd = 3.5 V Tc = 25°C Vapc = 2.2 V –8 –6 –4 –20 2 4 6 8 Pin (dBm) Pout (dBm) Vdd = 3.5 V, Tc = 25°C Vdd = 3.5 V, Tc = 85°C Vdd = 3.1 V, Tc = 85°C Vapc = 2.2 V DCS mode Pout vs. Vdd Vdd (V) Pout (dBm) Pout:Vapc = 2.2 V Eff:Pout = 32.5 dBm

Rev.0, Oct. 2002, page 11 of 14 PCS mode (1850MHz to 1910 MHz) PCS mode (1850 MHz) Eff vs. Pout 0 5 10 15 20 25 30 35 Pout (dBm) PCS mode (1910 MHz) Eff vs. Pout 0 5 10 15 20 25 30 35 Pout (dBm) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C PCS mode (1850 MHz) Pout, Eff vs. Pin 32.0 32.5 33.0 33.5 34.0 34.5 32.0 32.5 33.0 33.5 34.0 34.5 Pin (dBm) Pout (dBm) Eff Pout Vdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 32 dBm Eff (%) Eff (%) PCS mode (1910 MHz) Pout, Eff vs. Pin Pin (dBm) Pout (dBm) Eff Pout Vdd = 3.5 V Tc = 25°C Pout:Vapc = 2.2 V Eff:Pout = 32 dBm Eff (%) Eff (%) Vapc (V) PCS mode (1850 MHz) Pout, Eff vs. Vapc –50 –40 –60 –30 –20 –10 Pout (dBm) 100 Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Pout Eff Vapc (V) PCS mode (1910 MHz) Pout, Eff vs. Vapc –50 –40 –60 –30 –20 –10 Pout (dBm) 100 Eff (%) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Eff Pout Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C

Rev.0, Oct. 2002, page 12 of 14 PCS mode (1850MHz to 1910 MHz) (cont.) PCS mode (1850 MHz) Idd vs. Pout 0.01 0.1 –50 –40 –20–30 –10 0 10 20 30 40 Pout (dBm) Idd (A) PCS mode (1850 MHz) Pout vs. Pin –8 –6 –4 –2 02468 Pin (dBm) Pout (dBm) 35Pout (dBm) PCS mode (1910 MHz) Pout vs. Pin PCS mode (1910 MHz) Idd vs. Pout 1600 1650 1700 1750 18501800 1900 1950 2000 Freq (MHz) DCS, PCS mode Pout, Eff vs. Freq Pout (dBm) Eff (%) Vdd = 3.5 V, Tc = 25°C Vdd = 3.5 V, Tc = 85°C Vdd = 3.1 V, Tc = 85°C Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C 0.01 0.1 –50 –40 –20–30 –10 0 10 20 30 40 Pout (dBm) Idd (A) Pin = 0 dBm Vdd = 3.5 V Vapc = control Tc = 25°C Vdd = 3.5 V Tc = 25°C Vapc = 2.2 V –8 –6 –4 –20 2 4 6 8 Pin (dBm) Vdd = 3.5 V, Tc = 25°C Vdd = 3.5 V, Tc = 85°C Vdd = 3.1 V, Tc = 85°C Vapc = 2.2 V PCS mode Pout vs. Vdd Vdd (V) Pout (dBm) Pout:Vapc = 2.2 V Eff:Pout = 32 dBm Pout Eff

1850 MHz

1910 MHz

Pin = 0 dBm Vapc = 2.2 V Tc = 25°C

Rev.0, Oct. 2002, page 13 of 14 Package Dimensions Unit: mm Hitachi Code JEDEC JEITA Mass (reference value) RF-Q-8 (Upper side) 10.0 ± 0.3 8.0 ± 0.3 785 G3214 1.5 max (0.80) (0.80) (1.20) (Bottom side) (2.50) (3.90) (0.60) (1.80) (3.20) Preliminary 1 2 3 4 G 8 7 6G Pin GSM Vapc Vdd1 Pout GSM Pout DCS Vdd2 Vctl Pin DCS GND

Rev.0, Oct. 2002, page 14 of 14 Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. 2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corporation for further details on these materials or the products contained therein. Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Copyright © 2003. Renesas Technology Corporation, All rights reserved. Printed in Japan. Colophon 0.0

Product Information

E2081606_PF08127B specifications and overview.

Summary

MOS FET Power Amplifier Module for E-GSM and DCS1800/1900 Triple Band Handy Phone

Description

MOS FET Power Amplifier Module for E-GSM and DCS1800/1900 Triple Band Handy Phone

Source title E2081606_PF08127B Datasheet(PDF) - Renesas Technology Corp

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