DTC701 FS | Alldatasheet
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NPN S ilicon Surface Mount Transistors With Monolithic Bias Resistor Network This new series of digital transistors is des igned to r eplace a single device and its external resistor bias network. The BRT (B ias Resistor Transistor) contains a s ingle tra nsistor w ith a mono lithic bias network consisting of two resist ors; a ser ies base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a s ingle de vice. The use of a BRT can red uc e both system cost and board space. The d evice is housed in the SOT-723 package which is designed for low power su rface mount applications. MAXIMUM RATINGS(TA = 25 C unless otherwise noted) Rating Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc Collector Current IC 100 mAdc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation TA = 25 C Derate above 25 C PD 260 (Note 1) 600 (Note 2) 2.0 (Note 1) 4.8 (Note 2) mW Thermal Resistance – Junction-to-Ambient RθJA 480 (Note 1) 205 (Note 2) C/W Storage Temperature Range Tstg –55 to +150 C mW/ C Simplifies Circuit Design Reduces Component Count The SOT-723 Package can be Soldered using Wave or Reflow. Available in 4 mm, 8000 Unit Tape & Reel Reduces Board Space SOT-723 PIN 3 COLLECTOR (OUTPUT) PIN 2 EMITTER (GROUND) PIN 1 BASE (INPUT) C TJ 150Junction Temperature 1. F R–4 @ Minimum Pad 2. F R–4 @ 1.0 x 1.0 inch Pad 2018. 11. 22 1/10 SEMICO NDUCTOR TECH NICAL DATA DTC701 ~ 711 DTC714 / 717 / 722 Revision No : 1
DEVICE MARKING AND RESISTOR VALUES Device Marking R1 (K) R2 (K) Package Shipping 4.7 2.2 4.7 4.7 2.2 100 2.2 4.7 100 SOT−723 8000/T ape & Reel 2018. 11. 22 2/10 DTC701~711 / DTC714 / DTC717 / DTC722 Revision No : 1 DTC702T5G DTC703T5G DTC704T5G DTC717T5G DTC701T5G DTC706T5G DTC708T5G DTC705T5G DTC722T5G DTC709T5G DTC714T5G DTC707T5G DTC711T5G DTC710T5G
ELECTRICAL CHARACTERISTICS(TA = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector−Base Cutoff Current (VCB = 50 V, I E = 0) ICBO − − 100 nAdc Collector−Emitter Cutoff Current (VCE = 50 V, I B = 0) ICEO − − 500 nAdc Emitter−Base Cutoff Current (VEB = 6.0 V, I C DTC704 DTC707 DTC711 DTC710 DTC717 DTC701 DTC706 DTC708 DTC705 DTC722 DTC709 DTC714 IEBO − 0.5 0.2 0.1 0.2 0.9 1.9 2.3 1.5 0.18 0.13 0.2 0.05 0.13 0.2 mAdc Collector−Base Breakdown Voltage (IC = 10 A, IE = 0) V(BR)CBO 50 − − Vdc Collector−Emitter Breakdown Voltage (Note 3) (IC = 2.0 mA, I B = 0) V(BR)CEO 50 − − Vdc ON CHARACTERISTICS (Note 3) n i a G t n e r r u C C D (VCE = 10 V, IC = 5.0 mA) hFE 160 160 8.0 160 100 140 140 350 350 200 150 140 150 140 350 Collector−Emitter Saturation Voltage (IC = 10 mA, I B = 0.3 mA) (IC = 10 mA, I B = 5 mA) DTC717 (IC = 10 mA, I B = 1 mA) DTC701 / DTC706 / DTC708 / DTC710 / DTC711 / DTC714 VCE(sat) − − 0.25 Vdc Output Voltage (on) (VCC = 5.0 V, V B = 2 5 V, R L = 1.0 k ) (VCC = 5.0 V, V B = 3 5 V, R L = 1.0 k ) (VCC = 5.0 V, V B = 5 5 V, R L = 1.0 k ) (VCC = 5.0 V, V B = 4.0 V, R L = 1.0 k ) VOL 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 Vdc 3. Pul se Test: Pulse Width < 300 s, Duty Cycle < 2.0%. 2018. 11. 22 3/10 DTC701~711 / DTC714 / DTC717 / DTC722 Revision No : 1 DTC702 DTC703 DTC701 DTC702 DTC703 DTC707 DTC706 DTC708 DTC711 DTC710 DTC717 DTC704 DTC714 DTC709 DTC722 DTC704 DTC702 DTC703 DTC707 DTC711 DTC710 DTC717 DTC701 DTC706 DTC708 DTC705 DTC722 DTC709 DTC714 = 0 ) DTC705
- Pul se Test: Pulse Width < 300 s, Duty Cycle < 2.0%.
Figure 1. Derating Curve
Figure 7. VCE(sat) versus I C Figure 8. DC Current Gain Figure 9. Output Capacitance Figure 10. Output Current versus Input Voltage
75 C 25 C100
Figure 11. Input Voltage versus Output Current
Figure 12. VCE(sat) versus I C
75 C 25 C
Figure 13. DC Current Gain Figure 14. Output Capacitance Figure 15. Output Current versus Input Voltage Figure 16. Input Voltage versus Output Current
D E b e A L C H −Y− −X− X0.08 (0.0032) Y E1 2 1.0 0.039 mm inches 0.40 0.0157 0.40 0.0157 0.40 0.0157 0.40 0.0157 0.40 0.0157 PIN 1 BASE
2 EMITTER
3 COLLECTOR
E NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14 5M, 1982
2 CONTROLLING DIMENSION: MILLIMETERS
3 MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL
4 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS SOT−723 SOLDERING FOOTPRINT 2018. 11. 22 10/10 DTC701~711 / DTC714 / DTC717 / DTC722 Revision No : 1