DTC114E ONSEMI | Alldatasheet

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 Semiconductor Components Industries, LLC, 2000 May, 2000 – Rev. 0

1 Publication Order Number:

/C0068/C0084/C0067/C0049/C0049/C0052/C0069 /C0083/C0069/C0082/C0073/C0069/C0083 Preferred Devices /C0066/C0105/C0097/C0115 /C0082/C0101/C0115/C0105/C0115/C0116/C0111/C0114 /C0084/C0114/C0097/C0110/C0115/C0105/C0115/C0116/C0111/C0114 NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the TO–92 package which is designed for through hole applications. MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc Collector Current IC 100 mAdc Total Power Dissipation @ T A = 25°C (1.) Derate above 25°C PD 350 2.81 mW mW/ °C THERMAL CHARACTERISTICS Characteristic Symbol Value Unit Thermal Resistance, Junction to Ambient (surface mounted) R θJA 357 °C/W Operating and Storage Temperature Range TJ, Tstg –55 to +150 Maximum Temperature for Soldering Purposes, Time in Solder Bath TL 260 Sec DEVICE MARKING AND RESISTOR VALUES Device Marking R1 (K) R2 (K) Shipping DTC114E DTC124E DTC144E DTC114Y DTC114T DTC143T DTD113E DTC123E DTC143E DTC143Z DTC114E DTC124E DTC144E DTC114Y DTC114T DTC143T DTD113E DTC123E DTC143E DTC143Z 4.7 1.0 2.2 4.7 4.7 1.0 2.2 4.7 5000/Box 1. Device mounted on a FR–4 glass epoxy printed circuit board using the minimum recommended footprint. http://onsemi.com CASE 29 TO–92 (TO–226) STYLE 1 Preferred devices are recommended choices for future use and best overall value. NPN SILICON BIAS RESISTOR TRANSISTOR 2 3 COLLECTOR BASE EMITTER

http://onsemi.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector–Base Cutoff Current (VCB = 50 V, IE = 0) ICBO — — 100 nAdc Collector–Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO — — 500 nAdc Emitter–Base Cutoff Current DTC114E (VEB = 6.0 V, IC = 0) DTC124E DTC144E DTC114Y DTC114T DTC143T DTD113E DTC123E DTC143E DTC143Z IEBO — 0.5 0.2 0.1 0.2 0.9 1.9 4.3 2.3 1.5 0.18 mAdc Collector–Base Breakdown Voltage (IC = 10 µA, IE = 0) V(BR)CBO 50 — — Vdc Collector–Emitter Breakdown Voltage (2.) (IC = 2.0 mA, IB = 0) V(BR)CEO 50 — — Vdc ON CHARACTERISTICS (2.) DC Current Gain DTC114E (VCE = 10 V, IC = 5.0 mA) DTC124E DTC144E DTC114Y DTC114T DTC143T DTD113E DTC123E DTC143E DTC143Z hFE 35 160 160 3.0 8.0 100 140 140 350 350 5.0 200 Collector–Emitter Saturation Voltage (IC = 10 mA, IE = 0.3 mA) DTC144E/DTC114Y (IC = 10 mA, IB = 0.3 mA) DTD113E/DTC143E (IC = 10 mA, IB = 5 mA) DTC123E (IC = 10 mA, IB = 1 mA) DTC114T/DTC143T/ (IC = 10 mA, IB = 1 mA) DTC143Z/DTC124E VCE(sat) — — 0.25 Vdc Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ ) DTC114E DTC124E DTC114Y DTC114T DTC143T DTD113E DTC123E DTC143E DTC143Z CC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ ) DTC144E VOL 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 Vdc 2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%

http://onsemi.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Typ Max Unit Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ ) DTC114E DTC124E DTC144E DTC114Y DTC123E DTC143E CC = 5.0 V, VB = 0.05 V, RL = 1.0 kΩ ) DTD113E (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kΩ ) DTC114T DTC143T DTC143Z VOH 4.9 — — Vdc Input Resistor DTC114E DTC124E DTC144E DTC114Y DTC114T DTC143T DTD113E DTC123E DTC143E DTC143Z R1 7.0 15.4 32.9 7.0 7.0 3.3 0.7 1.5 3.3 3.3 4.7 1.0 2.2 4.7 4.7 28.6 61.1 6.1 1.3 2.9 6.1 6.1 kΩ Resistor Ratio DTC114E/DTC124E/DTC144E DTC114Y DTC114T/DTC143T DTD113E/DTC123E/DTC143E DTC143Z R 1/R2 0.8 0.17 0.8 0.055 1.0 0.21 1.0 0.1 1.2 0.25 1.2 0.185

0.1 Vin, INPUT VOLTAGE (VOLTS)

Figure 1. Derating Curve Figure 2. VCE(sat) versus IC Figure 3. DC Current Gain Figure 4. Output Capacitance Figure 5. VCE(sat) versus IC Figure 6. VCE (sat) versus IC

Figure 12. VCE(sat) versus IC

0.001 I C , COLLECTOR CURRENT (mA)

Figure 13. DC Current Gain Figure 14. Output Capacitance Figure 15. Output Current versus Input Voltage Figure 16. Input Voltage versus Output Current

http://onsemi.com PACKAGE DIMENSIONS TO–92 (TO–226) CASE 29–11 ISSUE AL NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. R A P J L B K G H SECTION X–X CV D N N XX SEATING PLANE DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.021 0.407 0.533 G 0.045 0.055 1.15 1.39 H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 N 0.080 0.105 2.04 2.66 STYLE 1: PIN 1. EMITTER 2. BASE 3. COLLECTOR STYLE 6: PIN 1. GATE 2. SOURCE & SUBSTRATE 3. DRAIN STYLE 11: PIN 1. ANODE 2. CATHODE & ANODE 3. CATHODE STYLE 16: PIN 1. ANODE 2. GATE 3. CATHODE STYLE 21: PIN 1. COLLECTOR 2. EMITTER 3. BASE STYLE 26: PIN 1. V CC 2. GROUND 2 3. OUTPUT STYLE 31: PIN 1. GATE 2. DRAIN 3. SOURCE STYLE 2: PIN 1. BASE 2. EMITTER 3. COLLECTOR STYLE 7: PIN 1. SOURCE 2. DRAIN 3. GATE STYLE 12: PIN 1. MAIN TERMINAL 1 2. GATE 3. MAIN TERMINAL 2 STYLE 17: PIN 1. COLLECTOR 2. BASE 3. EMITTER STYLE 22: PIN 1. SOURCE 2. GATE 3. DRAIN STYLE 27: PIN 1. MT 2. SUBSTRATE 3. MT STYLE 32: PIN 1. BASE 2. COLLECTOR 3. EMITTER STYLE 3: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 8: PIN 1. DRAIN 2. GATE 3. SOURCE & SUBSTRATE STYLE 13: PIN 1. ANODE 1 2. GATE 3. CATHODE 2 STYLE 18: PIN 1. ANODE 2. CATHODE 3. NOT CONNECTED STYLE 23: PIN 1. GATE 2. SOURCE 3. DRAIN STYLE 28: PIN 1. CATHODE 2. ANODE 3. GATE STYLE 33: PIN 1. RETURN 2. INPUT 3. OUTPUT STYLE 4: PIN 1. CATHODE 2. CATHODE 3. ANODE STYLE 9: PIN 1. BASE 1 2. EMITTER 3. BASE 2 STYLE 14: PIN 1. EMITTER 2. COLLECTOR 3. BASE STYLE 19: PIN 1. GATE 2. ANODE 3. CATHODE STYLE 24: PIN 1. EMITTER 2. COLLECTOR/ANODE 3. CATHODE STYLE 29: PIN 1. NOT CONNECTED 2. ANODE 3. CATHODE STYLE 34: PIN 1. INPUT 2. GROUND 3. LOGIC STYLE 5: PIN 1. DRAIN 2. SOURCE 3. GATE STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE STYLE 15: PIN 1. ANODE 1 2. CATHODE 3. ANODE 2 STYLE 20: PIN 1. NOT CONNECTED 2. CATHODE 3. ANODE STYLE 25: PIN 1. MT 1 2. GATE 3. MT 2 STYLE 30: PIN 1. DRAIN 2. GATE 3. SOURCE STYLE 35: PIN 1. GATE 2. COLLECTOR 3. EMITTER

http://onsemi.com Notes

http://onsemi.com Notes

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