DSS0012B

TPS61096A TI1 | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 28

Technical content

L 2.2 µH C IN 4.7 µF R UP R DOWN C OUT 10 µF VIN 1.8 V to 5.5 V V OUT

4.5 V to 28 V

Copyright © 2017, Texas Instruments Incorporated Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS61096A SLVSE09A –APRIL 2017–REVISED APRIL 2017 TPS61096A28-VOutputVoltageBoostConverterwithUltra-LowQuiescentCurrent

1 Features

1• 1 µA ultra-low IQ into VIN pin

Operating Input Voltage from 1.8 V to 5.5 V
Adjustable Output Voltage from 4.5 V to 28 V
Selectable Inductor Peak Current: – 0.25 A and 0.5 A
Integrated Power Diode
Integrated Level Shifters
70% Efficiency at 10 µA load
12-Pin 3-mm x 2-mm WSON Package
Create a Custom Design Using the TPS61096A With the WEBENCH® Power Designer

2 Applications

Stylus
Memory LCD Bias
Sensor Power
General Purpose Bias
RF Mems Relay Power

3 Description

The TPS61096A is a high output voltage boost converter with ultra-low quiescent current. It is designed for products that require high efficiency at light load conditions powered by either two-cell alkaline, or one-cell Li-Ion or Li-polymer battery. The TPS61096A integrates a 30-V power switch and a power diode. It can output up to 28 Volts. The TPS61096A uses a PFM peak current control scheme to obtain the highest efficiency over a wide range of input and output load conditions. It only consumes 1 µA quiescent current and can achieve up to 70% efficiency under 10-µA load condition. The TPS61096A can also support selective inductor peak current. With 250-mA current limit, the TPS61096A can reduce inductor ripple so that it reduces external component size for light load applications. With 500 mA current limit, the TPS61096A can provide 30 mA output current for a conversion from 3.3 V to 18 V. The TPS61096A integrates two-channel low-power level shifters to convert low level signals to output voltage level signals for specific applications. It only consumes 1-µA static current per channel and ensures very low static and dynamic power consumption across the entire output range. The TPS61096A is available in a 12-pin 3.0-mm x 2.0-mm WSON Package. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TPS61096A WSON (12) 3 mm x 2 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Circuit

11.2 Receiving Notification of Documentation Updates 20

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (March 2017) to Revision A Page

5 Pin Configuration and Functions

12-Pin WSON, 3 mm × 2 mm × 0.75 mm Top View Pin Functions PIN TYPE DESCRIPTION NAME NO. LVI1 1 I Input of level shifter 1 LVI2 2 I Input of level shifter 2 VIN 3 I IC power supply input SW 4 PWR Switch pin of the converter. It is connected to inductor. ILIM 5 I Inductor peak current limit selection pin. Logic low voltage to select 250mA peak current limit, logic high voltage to select 500mA peak current limit. Must be actively tied high or low. Do not leave it floating. EN 6 I Enable logic input. Logic high voltage enables the device, logic low voltage disables the device. Must be actively tied high or low. Do not leave it floating. FB 7 I Voltage feedback of adjustable output voltage. Connect to the center tap of a resistor divider to program the output voltage. VOSNS 8 I/O Boost converter output voltage sense pin. Connect an external resistor divider between this pin and FB pin. VOUT 9 PWR Boost converter output GND 10 PWR Ground pin HVO2 11 O Output of level shifter 2 HVO1 12 O Output of level shifter 1

SLVSE09A –APRIL 2017–REVISED APRIL 2017 www.ti.com Product Folder Links: TPS61096A Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

Voltage range at terminals VIN, EN, ILIM, LVI1, LVI2 –0.3 6 V FB -0.3 3.6 V SW, VOUT, VOSNS, HVO1, HVO2 –0.3 32 V Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions.

6.1 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ± 2000 VCharged-device model (CDM), per JEDEC specification JESD22- C101(2) ± 500

6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input voltage 1.8 5.5 V VOUT Boost converter output voltage 4.5 28 V L Inductor 1.0 2.2 47 µH CIN Input capacitor 1.0 4.7 µF COUT Output capacitor 10 10 100 µF TJ Operating junction temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.3 Thermal Information

THERMAL METRIC(1) TPS61096A UNITDSS (WSON)

12 PINS

RθJA Junction-to-ambient thermal resistance 65.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 72.4 °C/W RθJB Junction-to-board thermal resistance 29.7 °C/W ψJT Junction-to-top characterization parameter 2.5 °C/W ψJB Junction-to-board characterization parameter 29.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 10.7 °C/W

6.4 Electrical Characteristics

-40°C ≤ TJ ≤ 125°C and VIN=3.6V. Typical values are at TJ = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY VIN Input voltage range 1.8 5.5 V VUVLO Undervoltage lockout threshold Input voltage rising 1.5 1.7 V Hysteresis 0.2 0.3 V IQ_VIN Quiescent current into VIN pin Device enabled, no load, no switching -40°C ≤ TJ ≤ 85 °C 1.2 2.5 µA IQ_VOUT Quiescent current into VOUT pin Device enabled internal LS main switch on, VOSNS switch on VOUT = 20 V, IQ to level shifter excluded, -40°C ≤ TJ ≤ 85 °C 0.2 µA ISD Shutdown current into VIN pin Device disabled -40°C ≤ TJ ≤ 85 °C 0.07 0.3 µA OUTPUT VOUT Output voltage range 4.5 28 V VREF Internal reference voltage 0.98 1 1.02 V IOUT_LKG Leakage current into VOUT pin Device disabled VOUT = 20 V -40°C ≤ TJ ≤ 85 °C 0.2 µA IFB_LKG Leakage current into FB pin VFB = 1.0 V 0.2 µA VOVP Output overvoltage protection threshold Rising edge at VOUT pin 28.2 29.4 30.6 V VOVP_HYS Overvoltage protection hysteresis 0.4 0.8 1.2 V POWER SWITCH AND CURRENT LIMIT RDS(on) MOSFET on-resistance VIN = 3.6 V 450 700 mΩ IILIM Peak switch current limit ILIM = Low 0.15 0.25 0.35 A ILIM = High 0.35 0.5 0.6 A tSS Soft-start time 1 4.5 ms ISW_LKG Leakage current into SW pin (from SW pin to GND) Device disabled , VSW = 20 V -40°C ≤ TJ ≤ 85 °C 0.5 µA LEVEL SHIFTER IQ_LS Level shifters quiescent current into VOUT pin Both level shifter channel enabled, LVIx = Low 0.5 1 µA Both level shifter channel enabled, LVIx = High 1.5 3 µA fPULSE Pulse frequency CHVOx ≤ 10 pF 200 kHz VIL Low level input voltage threshold at LVIx pin Falling edge 0.15 × Vin V VIH High level input voltage threshold at LVIx pin Rising edge 0.8 × Vin V VOH High-level output voltage at HVOx pin

12 V ≤ VOUT ≤ 28 V

IHVOx = 10 µA VOUT –

0.1 V V

IHVOx = 100 µA VOUT –

0.3 V V

VOL Low-level output voltage at HVOx 12 V ≤ VOUT ≤ 28 V IHVOx = -10 µA 0.1 V IHVOx = -100 µA 0.3 V ISRC Level shifter high-side FET sourcing current VOUT = 20 V, VHVOx = 0 V 800 µA ISINK Level shifter low-side FET sinking current VHVOx = 20 V 800 µA

SLVSE09A –APRIL 2017–REVISED APRIL 2017 www.ti.com Product Folder Links: TPS61096A Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Electrical Characteristics (continued) -40°C ≤ TJ ≤ 125°C and VIN=3.6V. Typical values are at TJ = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Iin Input leakage current at LVIx pin VOUT = 0 V to 28 V VLVIx = 0 V to 4.5 V 0.5 µA tpd Propagation delay from input to output VOUT = 20 V, CHVOx = 5 pF From VLVIx rising above 0.8×Vin to VHVOx rising above 2 V 500 ns VOUT = 20 V, CHVOx = 5 pF From VLVIX falling below 0.15×Vin to VHVOx falling below 18 V 500 ns Control Logic VIL_EN EN pin low level input voltage threshold 0.4 V VIH_EN EN pin high level input voltage threshold 1.2 V VIL_ILIM ILIM pin low level input voltage threshold 0.4 V VIH_ILIM ILIM pin high level input voltage threshold 1.2 V IEN_LKG Leakage current into EN pin VEN = 5 V -40°C ≤ TJ ≤ 85 °C 50 nA IILIM_LKG Leakage current into ILIM pin VILIM = 5 V -40°C ≤ TJ ≤ 85 °C 50 nA Protection TSD Overtemperature protection TJ rising 150 °C TSD_HYS Overtemperature hysteresis TJ falling below TSD 25 °C

6.5 Typical Characteristics

Figure 1. Load Efficiency with Different Inputs Figure 2. Load Efficiency with Different Outputs Figure 3. Quiescient Current into VIN vs Temperature Figure 4. Reference Voltage vs Temperature Figure 5. Current Limit vs VIN with ILIM = H Figure 6. Current Limit vs Temperature with ILIM = H

7 Detailed Description

7.1 Overview

The TPS61096A operates with an input voltage range of 1.8 V to 5.5 V and can generate output voltage up to 28 V. The device operates in a PFM peak current control scheme with selective peak current. This control scheme consumes very low quiescent current so that it is able to achieve high efficiency at light load condition. The TPS61096A integrates two-channel low power level shifters to convert low voltage logic signals to output voltage for specific applications. It only consumes 1µA static current per channel and ensures very low static and dynamic power consumption across the entire output range.

Copyright © 2017, Texas Instruments Incorporated TPS61096A SLVSE09A –APRIL 2017–REVISED APRIL 2017 www.ti.com Product Folder Links: TPS61096A Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Controller Circuit

turns on again. In this way, the TPS61096A regulates the output voltage at the target value. allowing a wide selection range for the inductor and output capacitor. Figure 10. PFM Peak Current Control Operation

7.3.2 Current Limit Selection

components, especially the inductor, for light load applications.

7.4 Device Functional Modes

7.4.1 Under-Voltage Lockout

device when the input voltage is between 1.3 V and 1.5 V.

7.4.2 Enable and Disable

shutdown mode. In shutdown mode, less than 1-µA input current is consumed.

7.4.3 Soft Start

7.4.4 Level Shifters

generating up to 200 kHz pulses with up to 10pF capacitive load connected to the outputs. Figure 11. Level Shifter Schematic Illustration

Figure 12. Level Shifter Timing Diagram

7.4.5 Over-voltage Protection

threshold, the device resumes operating again.

7.4.6 Thermal Shutdown

device starts operating again.

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

current capability to meet more application requirements. signals for specific applications.

8.2 Typical Application

Figure 13. 12-V Pulse Generation From 3.6-V Input Voltage

8.2.1 Design Requirements

the signals' amplitude is required to be converted. High efficiency under light load is required. always works in light load condition.

Table 1. TPS61096A Design Parameters

8.2.2 Detailed Design Procedure

The following sections describe the selection process of the external components.

8.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the TPS61096A device with the WEBENCH® Power Designer.

Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
Compare the generated design with other possible solutions from Texas Instruments.

pricing and component availability.

Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.

8.2.2.2 Programming the Output Voltage

to the desired value. When the output voltage is regulated, the typical VREF voltage at FB pin is 1.0 V. For the best accuracy, the current following through R2 should be 100 times larger than FB pin leakage current.

8.2.2.3 Maximum Output Current

the current limit of the boost converter. It can be estimated by Equation 2.

VIN is the input voltage
VOUT is the output voltage
ILIM is the peak current limit
η is the power conversion efficiency (2)

minimum value of the selected current limit should be used as the worst case condition for the estimation.

8.2.2.4 Inductor Selection

values from 1.0 μH to 47 μH are recommended.

L is the selected inductor value (3) Choose the smaller one between VIN(max) and to calculate the highest switching frequency across the entire input range. The selected inductor should have a saturation current that is larger than the maximum peak current of the converter. Use the minimal value of selected current limit for this calculation. Another important inductor parameter is the dc resistance. The lower the dc resistance, the higher the efficiency of the converter. Table 2 lists the recommended inductors for the TPS61096A.

Table 2. Recommended Inductors

8.2.2.5 Capacitor Selection

For best output and input voltage filtering, low ESR X5R or X7R ceramic capacitors are recommended. to the VIN and GND pins of the IC is recommended.

VRIPPLE refers to the output voltage ripple
tdelay is the internal comparator delay time, typical value 10 µs
COUT is effective output capacitance (4)

condition, is selected for the VOUT rail. The performance is shown in the Application Curves section.

8.2.3 Application Curves

Figure 14. Switching Waveform at Heavy Load Figure 15. Switching Waveform at Light Load Figure 16. Startup by VIN Figure 17. Startup by EN

2 V/Div

10 V/Div

1 V/Div

Figure 18. Line Transient Figure 19. Load Regulation Figure 20. Load Transient Figure 21. Line Regulation Figure 22. Level Shifters Function

9 Power Supply Recommendations

capacitance may be required in addition to the ceramic bypass capacitors.

10 Layout

10.1 Layout Guidelines

paths. The input and output capacitor, as well as inductor should be placed as close as possible to the IC.

10.2 Layout Example

Figure 23. Example PCB Layout

11 Device and Documentation Support

11.1 Device Support

11.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.1.2 Development Support

11.1.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the TPS61096A device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available:

Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 5-May-2017 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS61096ADSSR ACTIVE WSON DSS 12 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 61096A TPS61096ADSST ACTIVE WSON DSS 12 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 61096A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com 5-May-2017 Addendum-Page 2

www.ti.com PACKAGE OUTLINE C 12X 0.3 0.2 2.65 0.1 12X 0.35 0.25 2.5 1 0.1 10X 0.5

0.8 MAX

0.05 0.00 B 2.1 1.9 A 3.1 2.9 0.35 0.25 0.3 0.2 (0.2) TYP WSON - 0.8 mm max heightDSS0012B PLASTIC SMALL OUTLINE - NO LEAD 4218908/A 01/2017 PIN 1 INDEX AREA SEATING PLANE 0.08 C (OPTIONAL) PIN 1 ID 0.1 C A B 0.05 C THERMAL PAD EXPOSED SYMM SYMM SEE TERMINAL DETAIL NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. SCALE 4.500 DETAIL OPTIONAL TERMINAL TYPICAL

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MIN

ALL AROUND0.05 MAX ALL AROUND (1) 10X (0.5) (1.9) 12X (0.25) 12X (0.5) (2.65) (R0.05) TYP ( 0.2) VIA TYP (1.075) WSON - 0.8 mm max heightDSS0012B PLASTIC SMALL OUTLINE - NO LEAD 4218908/A 01/2017 SYMM 6 7 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:25X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSDE METAL

www.ti.com EXAMPLE STENCIL DESIGN (0.685) 12X (0.25) 12X (0.5) 10X (0.5) 2X (1.17) 2X (0.95) (1.9) (R0.05) TYP WSON - 0.8 mm max heightDSS0012B PLASTIC SMALL OUTLINE - NO LEAD 4218908/A 01/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 13: 83% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:25X SYMM 6 7 SYMM EXPOSED METAL TYP

Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and services. Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products used in or for Designers’applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will thoroughly test such applications and the functionality of such TI products as used in such applications. TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource solely for this purpose and subject to the terms of this Notice. TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED “AS IS”AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements. Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S. TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers’own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non- compliance with the terms and provisions of this Notice. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated

Summary

28-V Output Voltage Boost Converter with Ultra-Low Quiescent Current

Description