DSC557-03

DSC557-03 MICROCHIP | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 24

Technical content

Features

• Complies with PCIe Gen1/2/3/4 Common Clock Spec
• Integrated MEMS Resonator Eliminates the Need for External 25 MHz Crystal
• Wide Temperature Range: - Ext. Industrial: –40°C to +105°C - Industrial: –40°C to +85°C - Commercial: –20°C to +70°C
• 100 MHz HCSL/LVDS/LVCMOS Options Available
• Dedicated Output Enable (OE) Pins for Clock Outputs
• Small Footprints: - 14-Lead VQFN (DSC557-03, Two Outputs) - 20-Lead VQFN (DSC557-04, Three Outputs; DSC557-05, Four Outputs)
• Excellent Shock and Vibration Immunity - Qualified to MIL-STD-883
• High Reliability - 20x Better MTF than Quartz Oscillators
• Low Current Consumption: 30% Lower than Competing Devices
• Supply Range of 2.25V to 3.63V
• Lead-Free and RoHS Compliant

Applications

• Communications/Networking - Ethernet - 1G, 10GBASE-T/KR/LR/SR, and FcoE - Routers and Switches - Gateways, VoIP , Wireless APs - Passive Optical Networks
• Storage - SAN, NAS, SSD, JBOD
• Embedded Applications - Industrial, Medical, and Avionics - Security Systems and Office Automation - Digital Signage, POS, and Others
• Consumer Electronics - Smart TV, Blu-Ray, STB General Description The DSC557 series of high performance PCI Express clock generators use a proven silicon MEMS technology to provide 100 MHz differential output clocks with excellent jitter and stability over a wide range of supply voltages and temperatures. By eliminating the need for quartz or SAW technology, MEMS oscillators significantly enhance reliability and accelerate product development, while meeting stringent clock performance criteria for a variety of communications, storage, and networking applications. The DSC557-03/04/05 have two, three, and four 100 MHz outputs, respectively. All have output enable/disable features. The DSC557-03 is available in a space-saving 14-lead VQFN package. The DSC557-04 and DSC557-05 are available in a 20-lead VQFN. Additional LVDS and LVCMOS output formats are available in addition to the default HCSL output format. Multiple Output MEMS PCIe Gen1/2/3/4 Clock Generators

DS20006691C-page 2  2022 - 2023 Microchip Technology Inc. and its subsidiaries Package Types Block Diagrams DSC557-03 14-Lead VQFN (Top View) DSC557-04 20-Lead VQFN (Top View) 5 6 7 8 9 10 181920 151617 OE2 NC VSS VSS VSS VSS OE1 NC CLK0- CLK0+ CLK1- CLK1+ VDD NC NC VDD NC NC CLK2+ CLK2- 5 6 7 8 9 10 181920 151617 OE2 NC VSS VSS VSS VSS OE1 NC CLK0- CLK0+ CLK1- CLK1+ VDD NC NC VDD CLK3+ CLK3- CLK2+ CLK2- DSC557-05 20-Lead VQFN (Top View) 5 6 7 121314 NC NC NC OE VSS NC CLK1+ CLK1- CLK0- CLK0+ VDD0NC NC VDD1 DSC557-03 DSC557-04 DSC557-05 Note: CLK0+/–, CLK1+/–, CLK2+/–, and CLK3+/– are 100 MHz, per PCIe standards. Control Circuitry MEMS PLL Output Control and Divider CLK1+ CLK1- CLK0+ CLK0- OE Control Circuitry MEMS PLLs Output Control and Divider CLK2+ CLK2- CLK1+ CLK1- OE1 CLK0+ CLK0-OE2

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 3 DSC557-03/04/05

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings † † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

Electrical Characteristics: Unless otherwise specified, T = +25°C, VDD = 3.3V. Parameter Symbol Min. Typ. Max. Units Conditions Supply Voltage VDD 2.25 — 3.63 V Note 1 Supply Current, DSC557-03 I DD — 21 23 mA HCSL output, EN pin low, output disabled — 60 — HCSL output, EN pin high, output enabled Supply Current, DSC557-04 I DD — 42 46 mA HCSL output, EN pin low, output disabled — 100 — HCSL output, EN pin high, output enabled Supply Current, DSC557-05 I DD — 42 46 mA HCSL output, EN pin low, output disabled — 120 — HCSL output, EN pin high, output enabled Frequency Stability (including frequency variations due to initial tolerance, temp., and power supply voltage) Δf — — ±100 ppm All temperature ranges— — ±50 Aging - 1st Year Δf — — ±5 ppm ±1 ppm each subsequent year Startup Time (Note 2) tSU — — 5 ms T = +25°C Input Logic Levels Input Logic High VIH 0.75 x VDD — — V — Input Logic Low VIL — — 0.25 x VDD V — Output Disable Time (Note 3) t DS — — 5 ns — Output Enable Time tEN — — 20 ns — Enable Pull-Up Resistor (Note 4) — — 40 — kΩ Internally pulled up HCSL Outputs (Note 5) Output Logic High VOH 0.725 — — V R L = 50Ω Output Logic Low VOL — — 0.1 V R L = 50Ω Peak-to-Peak Output Swing — — 750 — mV Single-Ended Output Frequency fOUT — 100 — MHz —

DS20006691C-page 4  2022 - 2023 Microchip Technology Inc. and its subsidiaries Output Transition Time (Note 6) tr/tf 200 — 400 ps 20% to 80%, R L = 50Ω, CL = 2 pF Output Duty Cycle SYM 48 — 52 % Differential Period Jitter (Note 7) JPER — 2.5 — ps RMS f01 = f02 = 100 MHz Jitter, Phase (Common Clock Architecture) TJ — 17 86 ps PP PCIe Gen 1.1, (Note 8) TJ = DJ + 14.069 x RJ (BER 10-12) JRMS-CCHF — 1.46 3.1 ps RMS PCIe Gen 2.1, 1.5 MHz to Nyquist, (Note 8) JRMS-CCLF — 0.08 3.0 ps RMS PCIe Gen 2.1, 10 kHz to 1.5 MHz, (Note 8) JRMS-CC — 0.313 1.0 ps RMS PCIe Gen 3.0, (Note 8) JRMS-CC — 0.313 0.5 ps RMS PCIe Gen 4.0, 16 GHz, (Note 8) Integrated Phase Noise (Data Clock Architecture) JRMS-DCHF — 2.15 4.0 ps RMS PCIe Gen 2.1, 1.5 MHz to Nyquist, (Note 8) JRMS-DCLF — 0.06 7.5 ps RMS PCIe Gen 2.1, 10 kHz to 1.5 MHz, (Note 8) JRMS-DC — 0.32 1.0 ps RMS PCIe Gen 3.0, (Note 8) LVDS Output VOS Magnitude Change ΔV OS — — 50 mV — Output High Voltage VOH 0.9xVDD — — V — Output Low Voltage VOL — — 0.1xVDD V — Output Frequency fOUT — 100 — MHz — Differential Output Voltage V OD 275 350 475 mV PP — VOD Magnitude Change ΔV OD — — 40 mV — LVDS Output Rise/Fall Time t r/tf — 200 — ps 20% – 80% Output Duty Cycle ODC 48 50 52 % 20% – 80%, R L = 50Ω, CL = 2 pF Period Jitter, Peak to Peak J PTP — 2.5 — ps f OUT = 100 MHz, Standard Drive Integrated Phase Noise J PH — 0.28 — psRMS 200 kHz to 20 MHz @ 100 MHz, TA = +105°C — 0.4 — 100 kHz to 80 MHz @ 100 MHz — 1.7 2.0 12 kHz to 10 MHz @ 100 MHz ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise specified, T = +25°C, VDD = 3.3V. Parameter Symbol Min. Typ. Max. Units Conditions

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 5 DSC557-03/04/05 LVCMOS Output Output High Voltage VOH 0.8xVDD — — V ±10 mA drive current Output Low Voltage VOL — — 0.2xVDD V ±10 mA drive current Output Frequency fOUT — 100 — MHz — Output Rise/Fall Time tr/tf — 1.2 — ns 20% – 80%, C L = 15 pF Output Duty Cycle ODC 48 50 52 % f OUT = 100 MHz, Standard Drive Period Jitter JPTP — 3 — ps RMS fOUT = 100 MHz, Standard Drive Integrated Phase Noise J PH — 0.3 — psRMS 200 kHz to 20 MHz @ 100 MHz — 0.38 — 100 kHz to 20 MHz @ 100 MHz — 1.7 2.0 12 kHz to 20 MHz @ 100 MHz Note 1: Each pin VDD should be filtered with a 0.1 µF capacitor. 2: tSU is time to 100 ppm of output frequency after VDD is applied and outputs are enabled. 3: Output Waveform and Test Circuit figures define the parameters. 4: Output is enabled if pad is floated or not connected. 5: Contact Microchip for alternate output options (LVDS, LVCMOS). 6: Output Waveform and Connection Diagram define the parameters. 7: Period Jitter includes crosstalk from adjacent output. ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise specified, T = +25°C, VDD = 3.3V. Parameter Symbol Min. Typ. Max. Units Conditions TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Operating Temperature Range TA –20 — +70 °C Ordering Option E –40 — +85 °C Ordering Option I –40 — +105 °C Ordering Option L Junction Operating Temperature TJ — — +150 °C — Storage Temperature Range TS –55 — +150 °C — Lead Temperature — — +260 — °C Soldering, 40s

DS20006691C-page 6  2022 - 2023 Microchip Technology Inc. and its subsidiaries

2.0 PIN DESCRIPTIONS AND CONNECTION DIAGRAMS

The descriptions of the pins are listed in Table 2-1, Table 2-2, and Table 2-3. FIGURE 2-1: 14-Lead VQFN Connection Diagram with Two HCSL Outputs. FIGURE 2-2: LVDS Outputs. FIGURE 2-3: LVCMOS Outputs. TABLE 2-1: DSC557-03 VQFN-14 PIN FUNCTION TABLE Pin Number Pin Name Pin Type Description 1 OE I Output enable, active-high. 2 NC N/A Ground recommended or leave as a NC. 3 NC N/A Ground recommended or leave as a NC. 4 VSS P Ground. 5 NC N/A Ground recommended or leave as a NC. 6 NC N/A Ground recommended or leave as a NC. 7 NC N/A Ground recommended or leave as a NC. 8 CLK1+ O True output of differential pair. 9 CLK1– O Complement output of differential pair. 10 CLK0– O Complement output of differential pair. 11 CLK0+ O True output of differential pair.

12 VDD1 P Power supply for output 0 (CLK0+/CLK0–)

13 VDD0 P Power supply for core and output 1 (CLK1+/CLK1–)

14 NC N/A Ground recommended or leave as a NC. VDD Enable 0.1μF 5ȍ 5ȍ 5ȍ 5ȍ CLK1+ CLK1- CLK0+ CLK0- 5 6 7 121314 Ropt Ropt 22Ω – 33Ω optional Receiver CLK0+ CLK0- Z0 = 50Ω CLK1- CLK1+ Z0 = 50Ω 100Ω 100Ω DSC557-03 4 5 67 14 13 12 Z0 = 50ё Receiver CLK0 CLK1 DSC557-03 RS Z0 = 50ё RS 4 5 67 14 13 12

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 9 DSC557-03/04/05

3.0 OUTPUT WAVEFORM

FIGURE 3-1: DSC557-03/04/05 Output Waveform. TABLE 3-1: OUTPUT VOLTAGE SWING Specification VCM VSWING_SE (typ.) LVDS 1.2V 350 mV HCSL 350 mV 675 mV Enable tR tF 1/f0 tDA tEN Output VIL VIH 50% 20% 80% Output Output voltage swing. Refer to table below.

DS20006691C-page 10  2022 - 2023 Microchip Technology Inc. and its subsidiaries

4.0 SOLDER REFLOW PROFILE

FIGURE 4-1: Solder Reflow Profile. TABLE 4-1: SOLDER REFLOW VQFN-14/VQFN-20 MSL 1 @ 260°C Refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp.) 3°C/sec. max. Preheat Time 150°C to 200°C 60 to 180 sec. Time Maintained above 217°C 60 to 150 sec. Peak Temperature 255°C to 260°C Time within 5°C of Actual Peak 20 to 40 sec. Ramp-Down Rate 6°C/sec. max. Time 25°C to Peak Temperature 8 minutes max.

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 11 DSC557-03/04/05

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

Note: DSC557 parts may ship with “DSA” on the package marking until such time as stock is depleted and the updated “DSC” marking appears. Regardless of those three characters, the part is the same. Example14-Lead VQFN* XXXXXX-XX DXPYYWW 0SSS DSC557-03 DCP1936 0943 Example20-Lead VQFN* XXXXXX-XX DXPYYWW 0SSS DSC557-05 DAP1918 0235 Legend: XX...X Product code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) SSS Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package.

• , ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale.

DS20006691C-page 12  2022 - 2023 Microchip Technology Inc. and its subsidiaries 14-Lead VQFN 2.5 mm x 3.2 mm Package Outline and Recommended Land Pattern

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 13 DSC557-03/04/05

DS20006691C-page 14  2022 - 2023 Microchip Technology Inc. and its subsidiaries

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 15 DSC557-03/04/05 20-Lead VQFN 5.0 mm x 3.2 mm Package Outline and Recommended Land Pattern

DS20006691C-page 16  2022 - 2023 Microchip Technology Inc. and its subsidiaries

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 17 DSC557-03/04/05

DS20006691C-page 18  2022 - 2023 Microchip Technology Inc. and its subsidiaries NOTES:

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 19 DSC557-03/04/05 APPENDIX A: REVISION HISTORY Revision A (June 2022)

• Initial release of DSC557-03/04/05 as Microchip data sheet DS20006691A. This data sheet com- bines DSC557-03, DSC557-04, and DSC557-05 into a single data sheet. Revision B (March 2023)
• Added a note to Section 5.1 “Package Marking Information” indicating some parts may be shipped with DSA on the package marking until that stock is depleted and the updated DSC pack- age marking begins. Revision C (May 2023)
• Updated information for Pins 12 and 13 in Table 2-1.

DS20006691C-page 20  2022 - 2023 Microchip Technology Inc. and its subsidiaries NOTES:

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 21 DSC557-03/04/05 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) DSC557-0344FL0: Two HCSL Outputs PCIe Clock Generator, 14-Lead VQFN, –40°C to +105°C Temperature Range, ±100 ppm Stability, 110/Tube b) DSC557-04111KI1T: Three LVCMOS Outputs PCIe Clock Generator, 20-Lead VQFN, –40°C to +85°C Temperature Range, ±50 ppm Stability, 1000/Reel c) DSC557-053344KE0: Four Output PCIe Clock Generator, (CLK3/CLK2: LVDS, CLK1/CLK0: HCSL), 20-Lead VQFN, –20°C to +70°C Temperature Range, ±100 ppm Stability, 96/Tube Device: DSC557-03: Two Output PCIe Clock Generator for Automotive DSC557-04: Three Output PCIe Clock Generator for Automotive DSC557-05: Four Output PCIe Clock Generator for Automotive Output Format: (Note 1) 1 = LVCMOS 3 = LVDS 4 = HCSL K = 20-Lead VQFN (DSC557-04/05 Only) Temperature Range: L = –40 C to +105C (Ext. Industrial) I = –40 C to +85C (Industrial) E = –20 C to +70C (Commercial) Stability: 0 = ±100 ppm 1 = ±50 ppm Packing Option: <blank>= 72/Tube (DSC557-04/05) <blank>= 110/Tube (DSC557-03) T = 1000/Reel (All Package Options) Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. Note 1: The Output Format’s arrangement is CLK3 to CLK0 (left-to-right) and may only have as many digits as that particular part allows. For example, DSC557-03 has two outputs; the part number example can only have two digits in that location. DSC557-04 can only have three and DSC557-05 can only have four. PART No. XXXX X X X X Device Output Format Package Temp. Range Stability Packing Option

DS20006691C-page 22  2022 - 2023 Microchip Technology Inc. and its subsidiaries NOTES:

 2022 - 2023 Microchip Technology Inc. and its subsidiaries DS20006691C-page 23 This publication and the information herein may be used only with Microchip products, including to design, test, and integrate Microchip products with your application. Use of this informa- tion in any other manner violates these terms. Information regarding device applications is provided only for your conve- nience and may be superseded by updates. It is your responsi- bility to ensure that your application meets with your specifications. Contact your local Microchip sales office for additional support or, obtain additional support at https:// www.microchip.com/en-us/support/design-help/client-support- services. THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON- INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE, OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI- RECT, SPECIAL, PUNITIVE, INCIDENTAL, OR CONSE - QUENTIAL LOSS, DAMAGE, COST, OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY , THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life support and/or safety applica- tions is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, Clockstudio, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In- Circuit Serial Programming, ICSP , INICnet, Intelligent Paralleling, IntelliMOS, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, KoD, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP , SimpliPHY, SmartBuffer, SmartHLS, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY , Total Endurance, Trusted Time, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2022 - 2023, Microchip Technology Incorporated and its subsidiar- ies. All Rights Reserved. ISBN: 978-1-6683-2542-1 Note the following details of the code protection feature on Microchip products:

• Microchip products meet the specifications contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and under normal conditions.
• Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is "unbreakable" Code protection is constantly evolving. Microchip is committed to continuously improving the code protection features of our products. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.

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