DSC400-0111Q0117 MICROCHIP | Alldatasheet
Document overview
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Technical content
Features
Frequencies and output formats: - 16.64MHz LVCMOS x 1 - 33MHz LVCMOS x 1 - 25MHz LVCMOS x 1 Low RMS phase jitter: <1ps (typ) High stability: ±25ppm, ±50ppm Wide temperature range - Industrial: -40°C to +85°C - Ext. commercial: -20°C to +70°C High supply noise rejection: -50dBc Available pin-selectable frequency table - 1 pin per bank for 2 frequency sets Excellent shock & vibration immunity - Qualified to MIL-STD-883 High reliability - 20x better MTF than quartz based devices Supply range of 2.25V to 3.6V AEC-Q100 automotive qualified 20-pin 5mm x 3.2mm QFN package Block Diagram VSS VDD1/VDD2 Control Circuitry MEMS PLL Output Control And Dividers OE1 FSB1 OE2 FSB2 Control Circuitry MEMS PLL Output Control And Dividers CLK1 16.64MHz LVCMOS CLK3 25MHz LVCMOS CLK2 33MHz LVCMOS ClockWorks is a registered trademark of Microchip Technology Inc. Microchip Technology Inc. http://www.microchip.com March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117
Ordering Information
-40°C to +85°C ±25ppm Tube 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KI2T -40°C to +85°C ±25ppm Tape and Reel 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KI1 -40°C to +85°C ±50ppm Tube 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KI1T -40°C to +85°C ±50ppm Tape and Reel 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KE2 -20°C to +70°C ±25ppm Tube 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KE2T -20°C to +70°C ±25ppm Tape and Reel 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KE1 -20°C to +70°C ±50ppm Tube 20-pin 5mm x 3.2mm QFN DSC400-0111Q0117KE1T -20°C to +70°C ±50ppm Tape and Reel 20-pin 5mm x 3.2mm QFN Devices are Green and RoHS compliant. Sample material may have only a partial top mark. Pin Configuration 20-pin 5mm x 3.2mm QFN OE1 NC VSS VSS VSS VSS NC OE2 NC CLK1 NC CLK2 VDD2 FSB2 FSB1 VDD1 NC NC CLK3 NC March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117 Pin Description Pin Number Pin Name Pin Type Pin Function OE1 I Output enable for Bank 1 (CLK1 and CLK4); active high - see Table 1 NC Leave unconnected or connect to ground VSS PWR Ground VSS PWR Ground NC Leave unconnected or connect to ground CLK1 O LVCMOS output 1 = 16.64MHz NC Leave unconnected or connect to ground CLK2 O LVCMOS output 2 = 33MHz VDD2 PWR Power supply for Bank 2 (CLK3 and CLK2) FSB2 I Input for selecting pre-configured frequencies on Bank 2 (CLK3 and CLK2) No connect if the function is not used. OE2 I Output enable for Bank 2 (CLK3 and CLK2); active high - see Table 1 NC Leave unconnected or connect to ground VSS PWR Ground VSS PWR Ground NC Leave unconnected or connect to ground CLK3 O LVCMOS output 3 = 25MHz NC Leave unconnected or connect to ground NC Leave unconnected or connect to ground VDD1 PWR Power supply for Bank 1 (CLK1 and CLK4) FSB1 I Input for selecting pre-configured frequencies on Bank 1 (CLK1 and CLK4) No connect if the function is not used. March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
resistance to shock and vibration decreases the aging rate, greatly improving product life in the system. inputs OE1 and OE2 are used to disable the banks of outputs. Outputs are disabled in tristate (Hi-Z) mode, see Table 1 below. Table 1. Output Enable (OE) Selection Table Each output maybe pre-configured independently to be one of the following formats: LVCMOS, LVDS, LVPECL or HCSL. outputs and from 2.3MHz to 170MHz on LVCMOS outputs. VSS is common to the entire device. The exposed die paddle should be connected to VSS.
Microchip Technology Inc. DSC400-0111Q0117 Absolute Maximum Ratings Item Min. Max. Units Condition Supply Voltage -0.3 +4.0 V Input Voltage -0.3 VDD + 0.3 V Junction Temp +150 Storage Temp -55 +150 Soldering Temp +260 40sec max. ESD HBM MM CDM 4000 400 1500 V 1000+ years of data retension on internal memory Specifications (Unless specified otherwise: Ta = 25°C, VDD = 3.3V) Parameter Symbol Condition Min. Typ. Max. Unit Supply Voltage¹ VDD 2.25 3.6 V Supply Current - Core² IDDcore OE (1:2) = 0 All outputs are disabled mA Frequency Stability F All temp and VDD ranges ±25 ±50 ppm Aging - first year Fy1 1 year @ 25°C ppm Aging - after first year Fy2 Year 2 and beyond @ 25°C < ±1/yr ppm Startup Time³ tSU T = 25°C ms Input Logic Levels Input Logic High Input Logic Low VIH VIL 0.75 x VDD 0.25 x VDD V Output Disable Time tDA OE(1:2) transition from 1 to 0 ns Output Enable Time tEN OE(1:2) transition from 0 to 1 ns Pull-Up Resistor Rpu All input pins have an internal pull-up kOhms Notes: 1. VDD pins should be filtered with 0.1µF capacitor connected between VDD and VSS. 2. The addition of IDDcore and IDDio provides total current consumption of the device. 3. tSU is time to 100ppm stable output frequency after VDD is applied and outputs are enabled. 4. Output Waveform figures below the parameters. See Output Waveform section. March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117 LVCMOS Outputs Output Logic Levels Output Logic High Output Logic Low VOH VOL I = ±6mA 0.9 x VDD 0.1 x VDD V Output Transition Time³ Rise Time Fall Time tR tF 20% to 80% CL = 15pF 1.1 1.3 ns Frequency CLK1 CLK2 CLK3 16.64 MHz Output Duty Cycle SYM Differential Supply Current - IO² IDDio Per output at 125MHz, CL = 15pF mA Period Jitter JPER CLK(1:4) = 125MHz psRMS Integrated Phase Noise JPH 200kHz to 20MHz @ 156.25MHz 100kHz to 20MHz @ 156.25MHz 12kHz to 20MHz @ 156.25MHz 0.3 0.38 1.7 psRMS LVCMOS Typical Termination Scheme S R is a series resistor implemented to match the trace impedance to that of the clock output. Depending on the board layout, the value may range from 0 to 27Ohms. LVCMOS Output Waveform March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117 Connection Diagram The connection Diagram below includes recommended capacitors to be placed on each VDD for noise filtering. March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117 Solder Reflow Profile MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/sec Max. Preheat Time 150°C to 200°C 60 - 180 sec Time maintained above 217°C 60 - 150 sec Peak Temperature 255 - 260°C Time within 5°C of actual Peak 20 - 40 sec Ramp-Down Rate 6°C/sec Max. Time 25°C to Peak Temperature 8 min Max. March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117
Package Information
20 QFN, 5.0mm x 3.2mm Package March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456
Microchip Technology Inc. DSC400-0111Q0117 Recommended Solder Pad layout units: mm[inches] Connect the center pad to ground plane for best thermal performance. Microchip makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Microchip does not assume responsibility for its use. Microchip reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Microchip's terms and conditions of sale for such products, Microchip assumes no liability whatsoever, and Microchip disclaims any express or implied warranty relating to the sale and/or use of Microchip products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Microchip products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Microchip Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Microchip for any damages resulting from such use or sale. © 2018 Microchip Technology Inc. March 12, 2018 Revision 1.0 tcghelp@microchip.com 6456