DSC2011FI1-F0033 MICROCHIP | Alldatasheet

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Technical content

Features

 Frequency and output formats: - LVCMOS 24MHz - LVCMOS 8MHz  Low RMS phase jitter: <1ps (typ)  ±50ppm frequency stability  -40°C to +85°C industrial temperature range  High supply noise rejection: -50dBc  Pin-selectable configurations - 2-bit output drive strength - Up to 8 output frequency combinations  Separate power supply (VDD2) for CLK2  Excellent shock & vibration immunity - Qualified to MIL-STD-883  High reliability - 20x better MTF than quartz oscillators  Supply range of 2.25 to 3.6V  AEC-Q100 automotive qualified  14-pin 3.2mm x 2.5mm QFN package Block Diagram VSS VDD/VDD2 Control Circuitry MEMS PLL ÷ 2 ÷ M1 ÷ M2 ÷ 2 CLK1 24MHz LVCMOS CLK2 8MHz LVCMOS O1S0/O1S1 O2S0/O2S1 OE FS0/FS1/FS2 ClockWorks is a registered trademark of Microchip Technology Inc. Microchip Technology Inc. http://www.microchip.com June 23, 2016 Revision 1.0 tcghelp@microchip.com or (408) 955-1690 3964

Microchip Technology Inc. DSC2011FI1-F0033

Ordering Information

Industrial Temperature Range Shipping Package DSC2011FI1-F0033 -40°C to +85°C Tube 14-pin 3.2mm x 2.5mm QFN DSC2011FI1-F0033T -40°C to +85°C Tape and Reel 14-pin 3.2mm x 2.5mm QFN Devices are Green and RoHS compliant. Sample material may have only a partial top mark. Pin Configuration 14-pin 3.2mm x 2.5mm QFN OE NC O2S0 GND CLK2 O1S1 O1S0 CLK1 FS0 FS1 FS2 VDD2 VDD O2S1 Pin Description Pin Number Pin Name Pin Type Pin Function OE I Enables outputs when high and disables outputs when low NC Leave unconnected or connect to ground O2S0 I Least significant bit for drive strength selection for CLK2, see Table 1 for details GND PWR Ground FS0 I Least significant bit for frequency selection, see Table 2 for details FS1 I Middle bit for frequency selection, see Table 2 for details FS2 I Most significant bit for frequency selection, see Table 2 for details CLK1 O LVCMOS output O1S0 I Least significant bit for drive strength selection for CLK1, see Table 1 for details O1S1 I Most significant bit for drive strength selection for CLK1, see Table 1 for details CLK2 O LVCMOS output VDD2 PWR Power supply for LVCMOS output CLK2, 1.65V to 3.6V (VDD2 £ VDD) VDD PWR Power supply O2S1 I Most significant bit for drive strength selection for CLK2, see Table 1 for details June 23, 2016 Revision 1.0 tcghelp@microchip.com or (408) 955-1690 3964

the PLL for up to eight different frequency combinations. CLK1 is equal to the main supply voltage, VDD (pin 13). VDD2 (pin 12) sets the high voltage level of CLK2. insure proper operation. VDD2 can be as low as 1.65V. these control pins at VDD = 3.3V and room temperature. Table 1. Rise/Fall Times for Drive Strengths associated frequency highlighted in bold. Table 2. Pin-Selectable Output Frequencies

Microchip Technology Inc. DSC2011FI1-F0033 (Unless specified otherwise: T = 25°C, max LVCMOS drive strength) Specifications Parameter Symbol Condition Min. Typ. Max. Units Supply Voltage¹ VDD VDD2 VDD2 £ VDD 2.25 1.65 3.6 3.6 V Supply Current IDD OE pin low - outputs are disabled mA Supply Current² IDD OE pin high - outputs are enabled CL = 15pF, F01 = F02 = 125MHz mA Frequency Stability F Includes frequency variation due to initial tolerance, temp. and power supply voltage ±50 ppm Aging F First year (@ 25°C) ppm Startup Time³ tSU T = 25°C ms Input Logic Levels Input Logic High Input Logic Low VIH VIL 0.75 x VDD 0.25 x VDD V Output Disable Time tDA ns Output Enable Time tEN ns Pull-Up Resistor² Pull-up exists on all digital IO kOhms LVCMOS Outputs Output Logic Levels Output Logic High Output Logic Low VOH VOL I = ±6mA 0.9 x VDD 0.1 x VDD V Output Transition Time Rise Time Fall Time tR tF 20% to 80% CL = 15pF 1.1 1.4 ns Frequency CLK1 CLK2 MHz Output Duty Cycle SYM Period Jitter JPER F01 = F02 = 125MHz psRMS Integrated Phase Noise JPH 200kHz to 20MHz @ 125MHz 100kHz to 20MHz @ 125MHz 12kHz to 20MHz @ 125MHz 0.3 0.38 1.7 psRMS Notes: 1. Pin 12 VDD2, and pin 13 VDD should be filtered with 0.1uF capacitors. 2. Output is enabled if OE pin is floated or not connected. 3. tSU is time to 100ppm stable output frequency after VDD is applied and outputs are enabled. 4. Output Waveform and Test Circuit figures below define the parameters. 5. Period Jitter includes crosstalk from adjacent output. June 23, 2016 Revision 1.0 tcghelp@microchip.com or (408) 955-1690 3964

Microchip Technology Inc. DSC2011FI1-F0033 Solder Reflow Profile Figure 3. Solder Reflow Profile

Package Information

3.2mm x 2.5mm 14 Lead Plastic Package Notes: 6. Connect the exposed die paddle to ground. 7. Package information is correct as of the publication date. For updates and most current information, go to www.microchip.com. Microchip makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Microchip does not assume responsibility for its use. Microchip reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Microchip's terms and conditions of sale for such products, Microchip assumes no liability whatsoever, and Microchip disclaims any express or implied warranty relating to the sale and/or use of Microchip products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Microchip products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Microchip Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Microchip for any damages resulting from such use or sale. © 2016 Microchip Technology Inc. June 23, 2016 Revision 1.0 tcghelp@microchip.com or (408) 955-1690 3964