DSC1001AL2-075.0000

DSC1001_V01 MICROCHIP | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 31

Technical content

Features

• Frequency Range: 1 MHz to 150 MHz
• Exceptional Stability over Temperature - ±10 ppm, ±20 ppm, ±25 ppm, ±50 ppm
• Operating Voltage - 1.7 to 3.6V
• Operating Temperature Range - Ext. Industrial –40°C to 105°C - Industrial –40°C to 85°C - Commercial –20°C to 70°C
• Low Operating and Standby Current - 6 mA Operating (1 MHz) - 15 µA Standby (Max.)
• Ultra Miniature Footprint - 2.5 mm x 2.0 mm x 0.85 mm - 3.2 mm x 2.5 mm x 0.85 mm - 5.0 mm x 3.2 mm x 0.85 mm - 7.0 mm x 5.0 mm x 0.85 mm
• MIL-STD 883 Shock and Vibration Resistant
• Pb Free, RoHS, Reach SVHC Compliant
• For AEC-Q100 Qualified, Refer to DSA10xx Family

Applications

• Mobile Applications
• Consumer Electronics
• Portable Electronics
• DVR, CCTV, Surveillance Cameras
• Low Profile Applications
• Industrial Applications Benefits
• Pin for Pin “Drop-In” Replacement for Industry Standard Oscillators
• Semiconductor Level Reliability, Significantly Higher than Quartz
• Short Mass Production Lead Times
• Longer Battery Life/Reduced Power Consumption
• Compact Plastic Package
• Cost Effective General Description The DSC1001/3/4 is a silicon MEMS based CMOS family of oscillators that offers excellent jitter and stability performance over a wide range of supply voltages and temperatures. The device operates from 1 MHz to 150 MHz with supply voltages between 1.8 to 3.3 volts and temperature ranges up to –40°C to 105°C. The DSC1001/3/4 incorporate an all silicon resonator that is extremely robust and nearly immune to stress related fractures, common to crystal based oscillators. Without sacrificing the performance and stability required of today’s systems, a crystal-less design allows for a higher level of reliability, making the DSC1001/3/4 ideal for rugged, industrial, and portable applications where stress, shock, and vibration can damage quartz crystal based systems. Available in industry standard packages, the DSC1001/3/4 can be “dropped-in” to the same PCB footprint as standard crystal oscillators. The DSC1003 and DSC1004 have the same functionality and performance as the DSC1001, but feature higher output drives of 25 pF and 40 pF, respectively. Package Types DSC1001/3/4 4-Lead VDFN (Top View) STANDBY# 1 GND VDD OUT 1.8V-3.3V Low-Power Precision CMOS Oscillators

DS20005529D-page 2  2017 - 2025 Microchip Technology Inc. and its subsidiaries Block Diagram PFD VCO FRAC-N PLL OUTPUTVDD GND (PIN1) STANDBY# PFD VCO FRAC-N PFD VCO PLL RESONATOR VDD GND (PIN1)

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1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings † Recommended Operating Conditions † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS Electrical Characteristics: VDD = 1.8 to 3.3V; TA = +85°C unless otherwise specified. Parameters Sym. Min. Typ. Max. Units Conditions Frequency F0 1 — 150 MHz Single Frequency Frequency Tolerance Δf — — ±10 ppm Includes frequency variations due to initial tolerance, temperature and power supply voltage — — ±20 — — ±25 — — ±50 Aging Δf — — ±5 ppm 1 year @ +25°C Supply Current, Standby I DD — — 15 µA T = +25°C Output Startup Time (Note 1) tSU — 1.0 1.3 ms T = +25°C Output Disable Time t DA — 20 100 ns — Output Duty Cycle SYM 45 — 55 % — Input Logic Level High V IH 0.75 x VDD — — V — Input Logic Level Low V IL — — 0.25 x V DD V — VDD = 1.8V Supply Current, No Load I DD — 6.0 6.3 mA

1 MHz

CL = 0 pF, RL = ∞, T = +25°C — 6.5 7.1 27 MHz — 7.2 8.5 70 MHz — 8.3 11.9 150 MHz Output Logic Level High V OH 0.8 x VDD — — V –6 mA, DSC1004, CL = 40 pF 0.8 x VDD — — –6 mA, DSC1003, CL = 25 pF 0.8 x VDD — — –4 mA, DSC1001, CL = 15 pF Output Logic Level Low V OL — — 0.2 x V DD V 6 mA, DSC1004, CL = 40 pF — — 0.2 x V DD 6 mA, DSC1003, CL = 25 pF — — 0.2 x V DD 4 mA, DSC1001, CL = 15 pF Note 1: tSU is time to stable output frequency after VDD is applied. tSU and tEN (after EN is asserted) are identical values. 2: Measured over 50k clock cycles.

DS20005529D-page 4  2017 - 2025 Microchip Technology Inc. and its subsidiaries Output Transition Rise Time tR — 1.4 3.0 ns DSC1001, CL = 15 pF T = +25°C, 20% to 80%— 1.5 3.0 DSC1003, CL = 25 pF — 1.8 3.0 DSC1004, C2 = 40 pF Output Transition Fall Time tF — 1.0 3.0 ns DSC1001, CL = 15 pF T = +25°C, 20% to 80%— 1.1 3.0 DSC1003, CL = 25 pF — 1.2 3.0 DSC1004, C2 = 40 pF Jitter, Max. Cycle-to-Cycle JCC — 60 — ps f = 100 MHz ( Note 2) Period Jitter JP — 10 15 ps RMS f = 100 MHz (Note 2) VDD = 2.5V Supply Current, No Load I DD — 6.0 6.4 mA CL = 0 pF, RL = ∞, T = +25°C — 6.7 7.5 27 MHz — 7.7 9.4 70 MHz — 9.6 13.9 150 MHz Output Logic Level High V OH 0.9 x VDD — — V –6 mA, DSC1004, CL = 40 pF 0.8 x VDD — — –6 mA, DSC1003, CL = 25 pF 0.8 x VDD — — –4 mA, DSC1001, CL = 15 pF Output Logic Level Low V OL — — 0.1 x V DD V 6 mA, DSC1004, CL = 40 pF — — 0.2 x V DD 6 mA, DSC1003, CL = 25 pF — — 0.2 x V DD 4 mA, DSC1001, CL = 15 pF Output Transition Rise Time tR — 1.0 2.0 ns DSC1001, CL = 15 pF T = +25°C, 20% to 80%— 1.1 2.0 DSC1003, CL = 25 pF — 1.2 2.0 DSC1004, C2 = 40 pF Output Transition Fall Time tF — 0.9 2.0 ns DSC1001, CL = 15 pF T = +25°C, 20% to 80%— 1.0 2.0 DSC1003, CL = 25 pF — 1.1 2.0 DSC1004, C2 = 40 pF TABLE 1-1: DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: VDD = 1.8 to 3.3V; TA = +85°C unless otherwise specified. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: tSU is time to stable output frequency after VDD is applied. tSU and tEN (after EN is asserted) are identical values. 2: Measured over 50k clock cycles.

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 5 DSC1001/3/4 Jitter, Max. Cycle-to-Cycle JCC — 50 — ps f = 100 MHz ( Note 2) Period Jitter JP — 5 10 ps RMS f = 100 MHz (Note 2) VDD = 3.3V Supply Current, No Load I DD — 6.0 6.5 mA CL = 0 pF, RL = ∞, T = +25°C — 6.8 8.0 27 MHz — 8.2 10.5 70 MHz — 10.8 16.6 150 MHz Output Logic Level High V OH 0.9 x VDD — — V –8 mA, DSC1004, CL = 40 pF 0.9 x VDD — — –6 mA, DSC1003, CL = 25 pF 0.8 x VDD — — –4 mA, DSC1001, CL = 15 pF Output Logic Level Low V OL — — 0.1 x V DD V 8 mA, DSC1004, CL = 40 pF — — 0.1 x V DD 6 mA, DSC1003, CL = 25 pF — — 0.2 x V DD 4 mA, DSC1001, CL = 15 pF Output Transition Rise Time tR — 1.0 2.0 ns DSC1001, CL = 15 pF T = +25°C, 20% to 80%— 1.1 2.0 DSC1003, CL = 25 pF — 1.2 2.0 DSC1004, C2 = 40 pF Output Transition Fall Time tF — 0.9 2.0 ns DSC1001, CL = 15 pF T = +25°C, 20% to 80%— 1.0 2.0 DSC1003, CL = 25 pF — 1.1 2.0 DSC1004, C2 = 40 pF Jitter, Max. Cycle-to-Cycle JCC — 50 — ps f = 100 MHz ( Note 2) Period Jitter JP — 5 10 ps RMS f = 100 MHz (Note 2) TABLE 1-1: DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: VDD = 1.8 to 3.3V; TA = +85°C unless otherwise specified. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: tSU is time to stable output frequency after VDD is applied. tSU and tEN (after EN is asserted) are identical values. 2: Measured over 50k clock cycles.

DS20005529D-page 6  2017 - 2025 Microchip Technology Inc. and its subsidiaries TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Operating Temperature Range TA –40 — +105 °C Ordering Option L –40 — +85 °C Ordering Option I –20 — +70 °C Ordering Option E Junction Operating Temperature T J — — +150 °C — Storage Temperature Range TA –55 — +150 °C — Soldering Temperature Range TS — — +260 °C 40 sec. max Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 7 DSC1001/3/4

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1 and Table 2-2. TABLE 2-1: VDFN PACKAGE PIN FUNCTION TABLE Pin Number Symbol Description

1 STANDBY# Standby input (see the Standby Function section)

2 GND Power supply ground

3 OUT Oscillator output

4 VDD Positive power supply

TABLE 2-2: 7 MM X 5 MM VDFN PACKAGE PIN FUNCTION TABLE Pin Number Symbol Description Center Pad NC Tie to GND or do not connect.

DS20005529D-page 8  2017 - 2025 Microchip Technology Inc. and its subsidiaries

3.0 NOMINAL PERFORMANCE CHARACTERISTICS

FIGURE 3-1: Supply Current. FIGURE 3-2: Rise Time. FIGURE 3-3: Rise Time. FIGURE 3-4: Supply Current. FIGURE 3-5: Fall Time. FIGURE 3-6: Fall Time. Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

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4.0 OUTPUT WAVEFORM

FIGURE 4-1: Output Waveform.

4.1 Standby Function

Standby# (Pin 1) Output (Pin 3) High Level Output ON Open (no connect) Output ON Low Level High Impedance VIL 1/fo OUTPUT STANDBY# tEN tDA tFtR VIH VOH VOL

DS20005529D-page 10  2017 - 2025 Microchip Technology Inc. and its subsidiaries

5.0 TEST CIRCUIT

FIGURE 5-1: DSC1001/3/4 Test Circuit. 0.01μF VDD 15pF IDD *VSD 1 2 *VSD = Standby# Logic Level Input

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6.0 BOARD LAYOUT (RECOMMENDED)

FIGURE 6-1: Recommended Board Layout for DSC1001/3/4. VDD GNDStandby Output Via to GND Layer Via to GND Layer

DS20005529D-page 12  2017 - 2025 Microchip Technology Inc. and its subsidiaries

7.0 SOLDER REFLOW PROFILE

FIGURE 7-1: Solder Reflow Profile. 60-150 Sec 20-40 Sec 60-180 Sec 8 min max Pre heat ReŇow Cool Time Temperature (°C) 3C/Sec Max. 6C/Sec Max. 200°C 217°C 150°C 25°C 260°C 3C/Sec Max. 60-150 Sec 20-40 Sec 60-180 Sec 8 min max Pre heat ReŇow Cool Time Temperature (°C) 3C/Sec Max. 6C/Sec Max. 200°C 217°C 150°C 25°C 260°C 60-150 Sec 20-40 Sec 60-180 Sec 8 min max Pre heat ReŇow Cool Time Temperature (°C) 3C/Sec Max. 6C/Sec Max. 200°C 217°C 150°C 25°C 260°C 3C/Sec Max. MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/sec. max. Preheat Time 150°C to 200°C 60 to 180 sec. Time maintained above 217°C 60 to 150 sec. Peak Temperature 255°C to 260°C Time within 5°C of Actual Peak 20 to 40 sec. Ramp-Down Rate 6°C/sec. max. Time 25°C to Peak Temperature 8 minutes max.

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8.0 PACKAGING INFORMATION

8.1 Package Marking Information

Example4-Lead VDFN* XXXXXX 0SSS XXXYYWW 0400000 0BD2 DAP2319 Legend: XX...X Product code, customer-specific information, or frequency in MHz without printed decimal point Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) SSS Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package.

• , ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale.

DS20005529D-page 14  2017 - 2025 Microchip Technology Inc. and its subsidiaries 0.10 C 0.10 C TOP VIEW SIDE VIEW BOTTOM VIEW 0.10 C 0.08 C For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 4-Lead Very Thin Dual Flatpack, No Lead Package (JZA) - 7x5x0.9 mm Body [VDFN] With 2.2x3.5 mm Exposed Pad © 2024 Microchip Technology Inc. Sheet 1 of 2Microchip Technology Drawing C04-1025-JZA Rev B NOTE 1 D E BA (DATUM A) (DATUM B)

0.10 C A B

2.60 Ref

0.05 C

1.00 Ref

C0.25

1.50 Ref

A C SEATING PLANE (A3) e

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 15 DSC1001/3/4 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: © 2024 Microchip Technology Inc. 4-Lead Very Thin Dual Flatpack, No Lead Package (JZA) - 7x5x0.9 mm Body [VDFN] With 2.2x3.5 mm Exposed Pad REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the pin 1 area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M Number of Terminals Overall Height Terminal Width Overall Width Terminal Length Exposed Pad Width Terminal Thickness Pitch Standoff Units Dimension Limits A b e L E N

5.08 Ref

0.203 Ref

3.40 1.10 1.35 0.80 0.00 1.40 1.20 3.50 0.85 5.00 MILLIMETERS MIN NOM 004 3.60 1.30 1.45 0.90 0.05 MAX Overall Length Exposed Pad Length D D2 2.10 7.00 2.20 2.30 Sheet 2 of 2Microchip Technology Drawing C04-1025-JZA Rev B 4.90 5.10 6.90 7.10

DS20005529D-page 16  2017 - 2025 Microchip Technology Inc. and its subsidiaries RECOMMENDED LAND PATTERN Dimension Limits Units Optional Center Pad Width Contact Pad Spacing Optional Center Pad Length Y2 3.60 2.30 MILLIMETERS MIN MAX 3.90 Contact Pad Length (Xnn) Contact Pad Width (Xnn) 1.30 1.50 NOM SILK SCREEN C1Contact Pad Spacing 5.08 Thermal Via Diameter V Thermal Via Pitch EV 0.33 1.20 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Contact Pad to Center Pad (Xnn) G1 0.69 Microchip Technology Drawing C04-3025-JZA Rev B ØV EV EV 4-Lead Very Thin Dual Flatpack, No Lead Package [JZA] - 7x5x0.9 mm Body [VDFN] With 2.2x3.5 mm Exposed Pad 1 2 © 2024 Microchip Technology Inc.

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 17 DSC1001/3/4 BA 0.05 C 0.05 C

0.08 C A B

0.05 C (DATUM B) (DATUM A) C TOP VIEW SIDE VIEW BOTTOM VIEW 0.10 C 0.08 C Microchip Technology Drawing C04-1008-H6A Rev C Sheet 1 of 2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 4-Lead Very Thin Plastic Dual Flat, No Lead Package (H6A) - 5x3.2 mm Body [VDFN] (CH) 4X b e D E (A3) A NOTE 1 1 2 (L2) (b1) DETAIL A ALTERNATE PIN 1 CONFIGURATION NOTE 1 SEATING PLANE L (L1) (K)

DS20005529D-page 18  2017 - 2025 Microchip Technology Inc. and its subsidiaries For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M Number of Terminals Overall Height Terminal Width Overall Width Terminal Length Terminal Thickness Pitch Standoff Units Dimension Limits A b e L E N

2.54 BSC

0.20 REF

0.80 1.15 0.80 0.00 0.90 1.20 0.85 0.02

3.20 BSC

1.00 1.25 0.90 0.05 MAX K 1.20 REFTerminal Spacing Overall Length D 5.00 BSC Terminal 1 Tab L2 0.20 REF Terminal 1 Tab b1 0.10 REF Terminal 1 Chamfer CH 0.25 REF Terminal Pull Back L1 0.10 REF Microchip Technology Drawing C04-1008-H6A Rev C Sheet 2 of 2 4-Lead Very Thin Plastic Dual Flat, No Lead Package (H6A) - 5x3.2 mm Body [VDFN]

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 19 DSC1001/3/4 RECOMMENDED LAND PATTERN Dimension Limits Units Contact Pitch MILLIMETERS 0.30 MIN E MAX Contact Pad Length (X4) Y1 1.10 NOM C0 0 . 2g n i c a p S d a P t c a t n o C Contact Pad to Contact Pad (X2) G2 1.14 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Contact Pad to Center Pad (X2) G1 1.00 C E SILK SCREEN 0 4 . 11 X) 4 X ( h t d i W d a P t c a t n o C Microchip Technology Drawing C04-3008 Rev C 4-Lead Very Thin Plastic Dual Flat, No Lead Package (H6A) - 5x3.2 mm Body [VDFN] Terminal 1 Contact Pad Chamfer CH EDGE OF PACKAGE E 2.54

DS20005529D-page 20  2017 - 2025 Microchip Technology Inc. and its subsidiaries BA 0.05 C 0.05 C C TOP VIEW SIDE VIEW BOTTOM VIEW N 0.05 C 0.05 C For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 4-Lead Very Thin Plastic Dual Flatpack No-Lead (H4A) - 3.2x2.5 mm Body [VDFN] © 2024 Microchip Technology Inc. Sheet 1 of 2Microchip Technology Drawing C04-1006-H4A Rev C NOTE 1 SEATING PLANE (DATUM A) (DATUM B) NOTE 1 D E e 4X b (CH) L (A3) A

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 21 DSC1001/3/4 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: © 2024 Microchip Technology Inc. 4-Lead Very Thin Plastic Dual Flatpack No-Lead (H4A) - 3.2x2.5 mm Body [VDFN] REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M Sheet 2 of 2Microchip Technology Drawing C04-1006-H4A Rev C Number of Terminals Overall Height Overall Width Terminal Length Terminal Width Pitch Standoff Units Dimension Limits A b e L E N

2.10 BSC

0.85 0.70 0.80 0.00 0.80 0.90 0.85 0.02

2.50 BSC

0.95 0.90 0.90 0.05 MAX Overall Length D 3.20 BSC Terminal 1 Index Chamfer CH 0.25 REF

DS20005529D-page 22  2017 - 2025 Microchip Technology Inc. and its subsidiaries RECOMMENDED LAND PATTERN Dimension Limits Units Contact Pitch MILLIMETERS E MAX Contact Pad Length (X4) Contact Pad Width (X4) Y X 1.00 0.90 NOM CContact Pad Spacing 1.80 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: © 2024 Microchip Technology Inc. Microchip Technology Drawing C04-3006-H4A Rev C E C X Y (CH) Contact 1 Index Chamfer CH 0.20 REF REF: Reference Dimension, usually without tolerance, for information purposes only. SILK SCREEN 4-Lead Very Thin Plastic Dual Flatpack No-Lead (H4A) - 3.2x2.5 mm Body [VDFN]

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DS20005529D-page 24  2017 - 2025 Microchip Technology Inc. and its subsidiaries

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DS20005529D-page 26  2017 - 2025 Microchip Technology Inc. and its subsidiaries NOTES:

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 27 DSC1001/3/4 APPENDIX A: REVISION HISTORY Revision A (September 2017)

• Converted Micrel data sheet DSC1001 to Micro- chip format data sheet DS20005529A.
• Minor text changes throughout.
• Added Table 2-2 for DFN package.
• Combined Micrel data sheet DSC1003 and DSC1004 into this data sheet. - Updated Section 1.0 “Electrical Character- istics” to reflect this change. - Updated General Description and Features to reflect this change. Revision B (November 2017)
• Updated VOH and VOL values in Table 1-1. Revision C (July 2023)
• Updated the Package Marking Information draw- ing. Revision D (June 2025)
• Added DSA10xx reference to Features and the Product Identification System sections for cus- tomers seeking AEC-Q100 qualified parts.
• Updated all Package Outline Drawings with the most current versions.

DS20005529D-page 28  2017 - 2025 Microchip Technology Inc. and its subsidiaries NOTES:

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 29 DSC1001/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) DSC1001AE1-010.0000T: 1.8V - 3.3V Low-Power Precision CMOS Oscillator, 4-Lead 7.0 mm x 5.0 mm VDFN, Ext. Commercial Temperature Range, ±50 ppm, 10 MHz Output Frequency, 1,000/Reel b) DSC1003BL2-030.0000: 1.8V - 3.3V Low-Power Precision CMOS Oscillator, 4-Lead 5.0 mm x 3.2 mm VDFN, Ext. Industrial Temperature Range, ±25 ppm, 30 MHz Output Frequency, 110/Tube c) DSC1001DE5-150.0000: 1.8V - 3.3V Low-Power Precision CMOS Oscillator, 4-Lead 2.5 mm x 2.0 mm VDFN, Ext. Commercial Temperature Range, ±10 ppm, 150 MHz Output Frequency, 110/Tube d) DSC1004AI3-075.0000T: 1.8V - 3.3V Low-Power Precision CMOS Oscillator, 4-Lead 7.0 mm x 5.0 mm VDFN, Industrial Temperature Range, ±20 ppm, 75 MHz Output Frequency, 1,000/Reel PART NO. X X PackageStabilityDevice Device: DSC1001/3/4: 1.8V - 3.3V Low-Power Precision CMOS Oscillator (Note 1) Package: A = 4-Lead 7.0 mm x 5.0 mm VDFN B = 4-Lead 5.0 mm x 3.2 mm VDFN C = 4-Lead 3.2 mm x 2.5 mm VDFN D = 4-Lead 2.5 mm x 2.0 mm VDFN Temperature Range: E = –20 C to +70C (Extended Commercial) I = –40 C to +85C (Industrial) L = –40 C to +105C (Extended Industrial) Stability: 1 = ±50ppm 2 = ±25ppm 3 = ±20 ppm 5 = ±10 ppm Frequency: xxx.xxxx =1 MHz to 150 MHz (user-defined) Packing Option: <blank>= 110/Tube T = 1,000/Reel X Package X Temperature Range -XXX.XXXX Frequency Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option.Note 1: For AEC-Q100 qualified parts, please refer to the DSA10xx family.

DS20005529D-page 30  2017 - 2025 Microchip Technology Inc. and its subsidiaries NOTES:

 2017 - 2025 Microchip Technology Inc. and its subsidiaries DS20005529D-page 31 Microchip Information Trademarks The “Microchip” name and logo, the “M” logo, and other names, logos, and brands are registered and unregistered trademarks of Microchip Technology Incorporated or its affiliates and/or subsidiaries in the United States and/or other countries (“Microchip Trademarks”). Information regarding Microchip Trademarks can be found at https://www.microchip.com/en-us/about/legalinformation/microchip- trademarks. ISBN: 979-8-3371-1456-9 Legal Notice This publication and the information herein may be used only with Microchip products, including to design, test, and integrate Microchip products with your application. Use of this information in any other manner violates these terms. Information regarding device applications is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. Contact your local Microchip sales office for additional support or, obtain additional support at www.microchip.com/en-us/support/design-help/client-support-services. THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY , AND FITNESS FOR A PARTICULAR PURPOSE, OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL, OR CONSEQUENTIAL LOSS, DAMAGE, COST, OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Microchip Devices Code Protection Feature Note the following details of the code protection feature on Microchip products:

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