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- PDF pages: 26
Technical content
Features
- Automotive AEC-Q100 Qualified
- Wide Frequency Range: 2 kHz to 80 MHz
- Ultra-Low Power Consumption: 1.3 mA/1 μA (Active/Standby)
- Ultra-Small Footprints - 1.6 mm x 1.2 mm - 2.0 mm x 1.6 mm - 2.5 mm x 2.0 mm
- Frequency Select Input Supports Two Pre-Defined Frequencies
- High Stability: ±20 ppm, ±25 ppm, ±50 ppm
- Wide Temperature Range - Automotive Grade 1: –40°C to +125°C - Automotive Grade 2: –40°C to +105°C - Automotive Grade 3: –40°C to +85°C
- Excellent Shock and Vibration Immunity - Qualified to MIL-STD-883
- High Reliability - 20x Better MTF Than Quartz Oscillators
- Supply Range of 1.71V to 3.63V
- Short Sample Lead Time: <1 week
- Lead Free & RoHS Compliant
Applications
- Automotive Infotainment
- Automotive ADAS, Surround View Cameras
- In-Vehicle Networking, CAN bus, Ethernet General Description The DSA60xx family of MEMS oscillators combines industry-leading low-power consumption, ultra-small packages with exceptional frequency stability, and jitter performance over temperature. The single-output DSA60xx MEMS oscillators are excellent choices for use as clock references in automotive applications in which small size, low power consumption, and long-term reliability are paramount. The device family is Automotive Grade AEC-Q100 qualified. The DSA60xx family is available in ultra-small 1.6 mm x packages. These packages are “drop-in” replacements for standard 4-pin CMOS quartz crystal oscillators. Package Types DSA60XX 2.5 mm x 2.0 mm VLGA 2.0 mm x 1.6 mm VFLGA 1.6 mm x 1.2 mm VFLGA (Top View) OE/STDBY/FS 4 GND VDD OUT32 Ultra-Small, Low Power MEMS Oscillator for Automotive
DS20006221A-page 2 2019 Microchip Technology Inc. Block Diagram DSA60xx MEMS RESONATOR TEMP SENSOR CONTROL & COMPENSATION PLL VCO OUTPUT DIVIDER DRIVER SUPPLY REGULATION PIN 1 OE/STBY/FS PIN 2 GND PIN 4 VDD PIN 3 OUTPUT DIGITAL CONTROL
2019 Microchip Technology Inc. DS20006221A-page 3 DSA60XX
1.0 ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to +125°C. Parameters Sym. Min. Typ. Max. Units Conditions Supply Voltage Note 1 VDD 1.71 — 3.63 V — Active Supply Current IDD — 1.3 — mA FOUT = 24 MHz, VDD = 1.8V, No Load Power Supply Ramp tPU 0.1 — 100 ms Note 9 Standby Supply Current Note 2 ISTBY — 1.0 — μA VDD = 1.8/2.5V — 1.5 — VDD = 3.3V Frequency f0 0.002 — 80 MHz — Frequency Stability Note 3 Δf — — ±20 ±25 ±50 ppm All temp ranges Aging Δf — — ±5 ppm 1st year @25°C — — ±1 Per year after first year Startup Time tSU — — 1.5 ms From 90% VDD to valid clock output, T = 25°C Input Logic Levels Note 4 VIH 0.7 x VDD — — V Input Logic High VIL — — 0.3 x VDD V Input Logic Low Output Disable Time Note 5 tDA — — 200 +
2 Periods ns —
Note 6 tEN — — 1 μs — Enable Pull-Up Resistor Note 7 — — 300 — kΩ If configured Output Logic Levels, Low Drive VOH 0.8 x VDD — — V Output Logic High, I = 1 mA VOL — — 0.2 x VDD V Output Logic Low, I = –1 mA Note 1: Pin 4 VDD should be filtered with 0.1 μF capacitor. 2: Not including current through pull-up resistor on EN pin (if configured). 3: Includes frequency variations due to initial tolerance, temp. and power supply voltage. 4: Input waveform must be monotonic with rise/fall time < 10 ms 5: Output Disable time takes up to two periods of the output waveform + 200 ns. 6: For parts configured with OE, not Standby. 7: Output is enabled if pad is floated or not connected. 8: Output Duty Cycle will be 40% to 60% when output frequency is between 40 MHz to 60 MHz. 9: Time to reach 90% of target VDD. Power ramp rise must be monotonic. 10: Peak-to-peak period jitter is measured over 10,000 cycles.
DS20006221A-page 4 2019 Microchip Technology Inc. Output Transition Time Rise Time/Fall Time tRX/tFX — 2.5 3.5 ns DSC60x3B Low Drive, 20% to 80% CL = 5 pF VDD = 1.8V — 1.5 2.2 VDD = 2.5V/3.3V tRY/tFY — 1.2 2.0 ns DSC60x1B Std. Drive, 20% to 80% CL = 10 pF VDD = 1.8V — 0.6 1.2 VDD = 2.5V/3.3V Output Duty Cycle Note 8 SYM 45 — 55 % — Period Jitter, RMS JPER — 28 — ps DSC60x3B Low Drive, FOUT =
27 MHz
CL = 5 pF VDD = 1.8V — 23 — VDD = 2.5V/3.3V — 20 — DSC60x1B Std. Drive, FOUT = CL = 10 pF VDD = 1.8V — 18 — VDD = 2.5V/3.3V Cycle-to-Cycle Jitter, Peak JCy–Cy — 120 — ps DSC60x3B Low Drive, FOUT = CL = 5 pF VDD = 1.8V — 90 — VDD = 2.5V/3.3V — 115 — DSC60x1B Std. Drive, FOUT = CL = 10 pF VDD = 1.8V — 90 — VDD = 2.5V/3.3V ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to +125°C. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: Pin 4 VDD should be filtered with 0.1 μF capacitor. 2: Not including current through pull-up resistor on EN pin (if configured). 3: Includes frequency variations due to initial tolerance, temp. and power supply voltage. 4: Input waveform must be monotonic with rise/fall time < 10 m s 5: Output Disable time takes up to two periods of the output waveform + 200 ns. 6: For parts configured with OE, not Standby. 7: Output is enabled if pad is floated or not connected. 8: Output Duty Cycle will be 40% to 60% when output frequency is between 40 MHz to 60 MHz. 9: Time to reach 90% of target VDD. Power ramp rise must be monotonic. 10: Peak-to-peak period jitter is measured over 10,000 cycles.
2019 Microchip Technology Inc. DS20006221A-page 5 DSA60XX Period Jitter, Peak-to-Peak, Note 10 JPERPK-PK — 210 — ps DSC60x3B Low Drive, FOUT = CL = 5 pF VDD = 1.8V — 190 — VDD = 2.5V/3.3V — 160 — DSC60x1B Std. Drive, FOUT = CL = 10 pF VDD = 1.8V — 144 — VDD = 2.5V/3.3V ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to +125°C. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: Pin 4 VDD should be filtered with 0.1 μF capacitor. 2: Not including current through pull-up resistor on EN pin (if configured). 3: Includes frequency variations due to initial tolerance, temp. and power supply voltage. 4: Input waveform must be monotonic with rise/fall time < 10 m s 5: Output Disable time takes up to two periods of the output waveform + 200 ns. 6: For parts configured with OE, not Standby. 7: Output is enabled if pad is floated or not connected. 8: Output Duty Cycle will be 40% to 60% when output frequency is between 40 MHz to 60 MHz. 9: Time to reach 90% of target VDD. Power ramp rise must be monotonic. 10: Peak-to-peak period jitter is measured over 10,000 cycles.
TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Maximum Junction Temperature TJ — — +150 °C — Storage Ambient Temperature Range TS –55 — +150 °C — Soldering Temperature — — +260 — °C 40 sec. max. Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the max- imum allowable power dissipation will cause the device operating junction temperature to exceed the max- imum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability . DSA60XX DS20006221A-page 6 2019 Microchip Technology Inc.
2019 Microchip Technology Inc. DS20006221A-page 7 DSA60XX
2.0 PIN DESCRIPTIONS
The DSA60xx is a highly configurable device and can be factory programmed in many different ways to meet the customer’s needs. Microchip’s ClockWorks ® Configurator http://clockworks.microchip.com/Timing/ must be used to choose the necessary options, create the final part number, data sheet, and order samples. The descriptions of the pins are listed in Table 2-1. TABLE 2-1: DSA60XX PIN FUNCTION TABLE Pin Number Pin Name Description OE Output Enable: H = Active, L = Disabled (High Impedance). STDBY Standby: H = Device is active, L = Device is in standby (Low Power Mode). FS Frequency Select: H = Output Frequency 1, L = Output Frequency 2. 2 GND Ground.
3 OUTPUT Oscillator clock output
4 VDD Power Supply: 1.71V to 3.63V. An explanation of the different options listed in Table 2-1 follows.
2.1 Pin 1
This is a control pin and may be configured to fulfill one of six different functions. If not actively driven, a 10 kΩ pull-up resistor is recommended.
2.1.1 OUTPUT ENABLE (OE)
Pin 1 may be configured as OE. Oscillator output may be turned on and off according to the state of this pin.
2.1.2 STDBY
Pin 1 may be configured as Standby. When the pin is low, both output buffer and PLL will be off and the device will enter a low power mode.
2.1.3 FREQUENCY SELECT (FS)
Pin 1 may be configured as FS. The output may be set to one of two pre-programmed frequencies. The output clock frequencies can only be set to either kHz or MHz. A combination of kHz and MHz cannot be set.
2.2 Pins 2 through 4
Pins 2 and 4 are the supply terminals, GND and VDD respectively. Pin 3 is the clock output, programmable to Standard and Low Drive strength settings. Visit ClockWorks ® Configurator to customize your device.
DS20006221A-page 8 2019 Microchip Technology Inc.
3.0 DIAGRAMS
FIGURE 3-1: Output Waveform. VDD 0.1μF VDA IDD CL FIGURE 3-2: Test Circuit. VDD GNDEnable Output Via to GND Layer Via to GND Layer FIGURE 3-3: Recommended Board Layout.
2019 Microchip Technology Inc. DS20006221A-page 9 DSA60XX
4.0 SOLDER REFLOW PROFILE
Temperature (°C) 260°C 3°C/sec max. 217°C 200°C 150°C 25°C 8 minutes max. Pre-Heat 3°C/sec max. Reflow Cool Time 6°C/sec max. 60-150 Seconds 20-40 Seconds FIGURE 4-1: Solder Reflow Profile. MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/sec. max. Preheat Time 150°C to 200°C 60 to 180 sec. Time maintained above 217°C 60 to 150 sec. Peak Temperature 255°C to 260°C Time within 5°C of actual Peak 20 to 40 sec. Ramp-Down Rate 6°C/sec. max. Time 25°C to Peak Temperature 8 minutes max.
DS20006221A-page 1 0 2019 Microchip Technology Inc.
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
4-Lead VFLGA* 2.5 x 2.0 Example Example XXXXXXX XXXYYWW SSS 0400000 DCP1834 287 4-Lead VFLGA* XXXX SSS 011H 502 Legend: XX...X Product code or customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) SSS Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package.
- , ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of a vailable characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale.
2019 Microchip Technology Inc. DS20006221A-page 1 1 DSA60XX 4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline
0.07 C A B
0.03 C (DATUM B) (DATUM A) C SEATING PLANE NOTE 1 N TOP VIEW SIDE VIEW BOTTOM VIEW NOTE 1 N 0.10 C 0.08 C Microchip Technology Drawing C04-1199A Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] D E BA 0.05 C 0.05 C 4X L e CH CH A (A3) 3X b1
DS20006221A-page 1 2 2019 Microchip Technology Inc. 4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline Microchip Technology Drawing C04-1199A Sheet 2 of 2 REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Number of Terminals Overall Height Overall Width Terminal Length Substrate Thickness (with Terminals) Terminal Pitch Standoff Units Dimension Limits A e L E N
1.20 BSC
0.20 REF
0.325 0.30 0.79 0.00 0.35 0.375 0.84 0.02 0.425 0.40 0.89 0.05 MAX CH 0.125--Terminal 1 Index Chamfer Overall Length D 1.60 BSC Terminal Width b1 0.25 0.30 0.35Terminal Width Terminal Pitch e1 0.75 BSC
2019 Microchip Technology Inc. DS20006221A-page 1 3 DSA60XX 4-Lead VFLGA 1.6 mm x 1.2 mm Recommended Land Pattern RECOMMENDED LAND PATTERN Dimension Limits Units X2Contact Width Contact Pitch MILLIMETERS Space Between Contacts (X4) Contact Pad Length (X6) Y0 . 5 0 Microchip Technology Drawing C04-3199A NOM 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] SILK SCREEN X1Contact Width (X3) Space Between Contacts (X3) G2 0.25 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Y (CH) CContact Spacing 0.75 0.43 0.35 0.85 Contact 1 Index Chamfer CH 0.13 X 45° REF C Contact Pitch 1.16 BSCE2
DS20006221A-page 1 4 2019 Microchip Technology Inc. 4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline 0.03 C (DATUM B) (DATUM A) C SEATING PLANE NOTE 1 N TOP VIEW SIDE VIEW BOTTOM VIEW NOTE 1 N 0.10 C 0.08 C Microchip Technology Drawing C04-1200A Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] D E BA 0.05 C 0.05 C 4X L e CH CH A (A3) 3X b1
2019 Microchip Technology Inc. DS20006221A-page 1 5 DSA60XX 4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline (Continued) Microchip Technology Drawing C04-1200A Sheet 2 of 2 REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Number of Terminals Overall Height Overall Width Terminal Length Substrate Thickness (with Terminals) Terminal Pitch Standoff Units Dimension Limits A e L E N
1.55 BSC
0.40 0.50 0.79 0.00 0.55 0.45 0.84 0.02
1.60 BSC
0.50 0.60 0.89 0.05 MAX CH 0.15--Terminal 1 Index Chamfer Overall Length D 2.00 BSC Terminal Width b1 0.30 0.35 0.40Terminal Width Terminal Pitch e1 0.95 BSC
X2Contact Width (X2) Contact Pitch MILLIMETERS E MAX Space Between Contacts (X4) Contact Pad Length (X6) Y0 . 7 0 Microchip Technology Drawing C04-3200A NOM 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] SILK SCREEN X1Contact Width (X4) Space Between Contacts (X3) G2 0.25 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Y G2 E (CH) CContact Spacing 0.95 0.40 0.50 1.05 Contact 1 Index Chamfer CH 0.13 X 45° REF C DSA60XX DS20006221A-page 1 6 2019 Microchip Technology Inc. 4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline
2019 Microchip Technology Inc. DS20006221A-page 1 7 DSA60XX 4-Lead VLGA 2.5 mm x 2.0 mm Package Outline 0.03 C (DATUM B) (DATUM A) C SEATING PLANE NOTE 1 N TOP VIEW SIDE VIEW BOTTOM VIEW NOTE 1 N 0.10 C 0.08 C Microchip Technology Drawing C04-1202A Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] D E BA 0.05 C 0.05 C 4X L e CH CH A (A3) 4X b1
DS20006221A-page 1 8 2019 Microchip Technology Inc. 4-Lead VLGA 2.5 mm x 2.0 mm Package Outline (Continued) Microchip Technology Drawing C04-1202A Sheet 2 of 2 REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Pin 1 visual index feature may vary, but must be located within the hatched area. Package is saw singulated Dimensioning and tolerancing per ASME Y14.5M 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Number of Terminals Overall Height Overall Width Terminal Length Substrate Thickness (with Terminals) Terminal Pitch Standoff Units Dimension Limits A e L E N
1.65 BSC
0.60 0.79 0.00 0.65 0.84 0.02
2.00 BSC
0.70 0.89 0.05 MAX CH 0.225--Terminal 1 Index Chamfer Overall Length D 2.50 BSC b1 0.60 0.65 0.70Terminal Width Terminal Pitch e1 1.25 BSC
2019 Microchip Technology Inc. DS20006221A-page 1 9 DSA60XX 4-Lead VLGA 2.5 mm x 2.0 mm Recommended Land Pattern RECOMMENDED LAND PATTERN Dimension Limits Units Contact Pitch MILLIMETERS E MAX Space Between Contacts (X4) Contact Pad Length (X6) Y0 . 8 0 Microchip Technology Drawing C04-3202A NOM 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] SILK SCREEN XContact Width (X4) Space Between Contacts (X3) G2 0.45 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: X Y G2C E (CH) CContact Spacing 1.25 0.70 0.95 Contact 1 Index Chamfer CH 0.13 X 45° REF
DS20006221A-page 2 0 2019 Microchip Technology Inc. NOTES:
2019 Microchip Technology Inc. DS20006221A-page 2 1 DSA60XX APPENDIX A: REVISION HISTORY Revision A (June 2019)
- Initial creation of DSA60xx Microchip data sheet DS20006221A.
DS20006221A-page 2 2 2019 Microchip Technology Inc. NOTES:
2019 Microchip Technology Inc. DS20006221A-page 2 3 DSA60XX PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) DSA6013JI3B-080.0000VAO: Ultra-Small, Low Power MEMS Oscillator, Pin1 = STDBY with Internal Pull-Up, Low Drive Strength, 4-Lead 2.5 mm x 2.0 mm VLGA, Automotive Grade 3 Temperature, ±20 ppm Stability, Revision B, 80 MHz Frequency, 140/Tube b) DSA6001HL1B-016.0000TVAO: Ultra-Small, Low Power MEMS Oscillator, Pin1 = OE with Internal Pull–Up, Standard Drive Strength, 4-Lead 1.6 mm x 1.2 mm VFLGA, Automotive Grade 2 Temperature, ±50 ppm Stability, Revision B, 16 MHz Frequency, 1,000/Reel c) DSA6021MA2B-0157VAO: Ultra-Small, Low Power MEMS Oscillator, Pin1 = Freq. Select with Internal Pull-Up, Standard Drive Strength, 4-Lead 2.0 mm x 1.6 mm VFLGA, Automotive Grade 1 Temperature, ±25 ppm Stability, Revision B, Two Frequencies Configured through ClockWorks, 100/Bag Device: DSA60: Ultra-Small, Low Power MEMS Oscillator Pin 1 Definition: Selection Pin 1 Internal Pull-Up Register
0 OE Pull-up
2 FS Pull-up
4 OE None
5 STDBY None
6 FS None
Strength: Standard Low Package: J = 4-Lead 2.5 mm x 2.0 mm VLGA M = 4-Lead 2.0 mm x 1.6 mm VFLGA H = 4-Lead 1.6 mm x 1.2 mm VFLGA Temperature Range: A = –40 C to +125C (Automotive Grade 1) L = –40 C to +105C (Automotive Grade 2) I = –40 C to +85C (Automotive Grade 3) Frequency Stability: 1 = ± 50 ppm 2 = ± 25 ppm 3 = ± 20 ppm Revision: B = Revision B Frequency: xxx.xxxx = User-Defined Frequency between 001.0000 MHz and 80.0000 MHz xxxKxxx = User-Defined Frequency between 002.000 kHz and 999.999 kHz xxxx = Frequency configuration code when pin 1 = FS. Configure the part online through ClockWorks configurator. Media Type: <blank>= 140/Tube (J Package Option) <blank>= 100/Bag (M & H Package Options) T = 1,000/Reel B = 3,000/Reel Automotive Suffix: Vxx = The “xx” is assigned by Microchip. Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. PART NO. X X X X X X- XXX.XXXX X XXX Device Pin 1 Definition Output Drive Strength Package Temperature Range Frequency Stability Revision Frequency Media Type Automotive Suffix Note 1: Please visit Microchip ClockWorks® Configurator Website to configure the part number for customized fre- quency. http://clockworks.microchip.com/timing/.
DS20006221A-page 2 4 2019 Microchip Technology Inc. NOTES:
2019 Microchip Technology Inc. DS20006221A-page 2 5 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2019, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-4708-5 Note the following details of the code protection feature on Microchip devices:
- Microchip products meet the specification contained in their p articular Microchip Data Sheet.
- Microchip believes that its family of products is one of the m ost secure families of its kind on the market today, when used in the intended manner and under normal conditions.
- There are dishonest and possibly illegal methods used to breac h the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
- Microchip is willing to work with the customer who is concerne d about the integrity of their code.
- Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.
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