DSA557-03

DSA557-03 MICROCHIP | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 20

Technical content

Features

• Automotive AEC-Q100 Qualified
• Complies with PCIe Gen1/2/3/4 Common Clock Spec
• Integrated MEMS Resonator Eliminates the Need for External 25 MHz Crystal
• Wide Temperature Range: - Automotive Grade 2: –40°C to +105°C - Automotive Grade 3: –40°C to +85°C
• 100 MHz HCSL/LVDS/LVCMOS Options Available
• Dedicated Output Enable (OE) Pins for Clock Outputs
• Small Footprints: - 14-Lead QFN (DSA557-03, Two Outputs) - 20-Lead VQFN (DSA557-04, Three Outputs; DSA557-05, Four Outputs)
• Excellent Shock and Vibration Immunity - Qualified to MIL-STD-883
• High Reliability - 20x Better MTF than Quartz Oscillators
• Low Current Consumption: 30% Lower than Competing Devices
• Supply Range of 2.25V to 3.63V
• Lead-Free and RoHS Compliant

Applications

• Automotive Infotainment
• Automotive ADAS
• Autonomous Driving
• In-Vehicle Network General Description The DSA557 series of high performance PCI Express clock generators use a proven silicon MEMS technology to provide 100 MHz differential output clocks with excellent jitter and stability over a wide range of supply voltages and temperatures. By eliminating the need for quartz or SAW technology, MEMS oscillators significantly enhance reliability and accelerate product development, while meeting stringent clock performance criteria for a variety of communications, storage, and networking applications. The DSA557-03/04/05 have two, three, and four 100 MHz outputs, respectively. All have output enable/disable features. The DSA557-03 is available in a space-saving 14-lead QFN package. The DSA557-04 and DSA557-05 are available in a 20-lead VQFN. Additional LVDS and LVCMOS output formats are available in addition to the default HCSL output format. Multiple Output MEMS PCIe Gen1/2/3/4 Clocks for Automotive

DS20006175C-page 2  2019-2020 Microchip Technology Inc. Package Types DSA557-03 14-Lead QFN (Top View) DSA557-04 20-Lead VQFN (Top View) 5 6 7 8 9 10 181920 151617 OE2 NC VSS VSS VSS VSS OE1 NC CLK0- CLK0+ CLK1- CLK1+ VDD NC NC VDD NC NC CLK2+ CLK2- 5 6 7 8 9 10 181920 151617 OE2 NC VSS VSS VSS VSS OE1 NC CLK0- CLK0+ CLK1- CLK1+ VDD NC NC VDD CLK3+ CLK3- CLK2+ CLK2- DSA557-05 20-Lead VQFN (Top View) 5 6 7 121314 NC NC NC OE VSS NC CLK1+ CLK1- CLK0- CLK0+ VDD0NC NC VDD1 Block Diagrams DSA557-03 DSA557-04 DSA557-05 Note: CLK0+/–, CLK1+/–, CLK2+/–, and CLK3+/– are 100 MHz, per PCIe standards. Control Circuitry MEMS PLL Output Control and Divider CLK1+ CLK1- CLK0+ CLK0- OE Control Circuitry MEMS PLLs Output Control and Divider CLK2+ CLK2- CLK1+ CLK1- OE1 CLK0+ CLK0-OE2

 2019-2020 Microchip Technology Inc. DS20006175C-page 3 DSA557-03/04/05

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings † † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

Electrical Characteristics: Unless otherwise specified, T = +25°C, VDD = 3.3V. Parameter Symbol Min. Typ. Max. Units Conditions Supply Voltage VDD 2.25 — 3.63 V Note 1 Supply Current, DSA557-03 IDD — 21 23 mA HCSL output, EN pin low, output disabled — 60 — HCSL output, EN pin high, output enabled Supply Current, DSA557-04 IDD — 42 46 mA HCSL output, EN pin low, output disabled — 100 — HCSL output, EN pin high, output enabled Supply Current, DSA557-05 IDD — 42 46 mA HCSL output, EN pin low, output disabled — 120 — HCSL output, EN pin high, output enabled Frequency Stability (including frequency variations due to initial tolerance, temp., and power supply voltage) Δf — — ±100 ppm All temperature ranges— — ±50 Aging - 1st Year Δf — — ±5 ppm ±1 ppm each subsequent year Startup Time (Note 2) tSU — — 5 ms T = +25°C Input Logic Levels Input Logic High VIH 0.75 x VDD — — V — Input Logic Low VIL — — 0.25 x VDD V — Output Disable Time (Note 3) tDS — — 5 ns — Output Enable Time tEN — — 20 ns — Enable Pull-Up Resistor Note 4) — — 40 — kΩ Internally pulled up HCSL Outputs (Note 5) Output Logic High VOH 0.725 — — V RL = 50Ω Output Logic Low VOL — — 0.1 V RL = 50Ω Peak-to-Peak Output Swing — — 750 — mV Single-Ended Output Frequency fOUT — 100 — MHz —

DS20006175C-page 4  2019-2020 Microchip Technology Inc. Output Transition Time (Note 6) tr/tf 200 — 400 ps 20% to 80%, RL = 50Ω, CL = 2 pF Output Duty Cycle SYM 48 — 52 % Differential Period Jitter (Note 7) JPER — 2.5 — psRMS f01 = f02 = 100 MHz Jitter, Phase (Common Clock Architecture) TJ — 17 86 psPP PCIe Gen 1.1, (Note 8) TJ = DJ + 14.069 x RJ (BER 10-12) JRMS-CCHF — 1.46 3.1 psRMS PCIe Gen 2.1, 1.5 MHz to Nyquist, (Note 8) JRMS-CCLF — 0.08 3.0 psRMS PCIe Gen 2.1, 10 kHz to 1.5 MHz, (Note 8) JRMS-CC — 0.313 1.0 psRMS PCIe Gen 3.0, (Note 8) JRMS-CC — 0.313 0.5 psRMS PCIe Gen 4.0, 16 GHz, (Note 8) Integrated Phase Noise (Data Clock Architecture) JRMS-DCHF — 2.15 4.0 psRMS PCIe Gen 2.1, 1.5 MHz to Nyquist, (Note 8) JRMS-DCLF — 0.06 7.5 psRMS PCIe Gen 2.1, 10 kHz to 1.5 MHz, (Note 8) JRMS-DC — 0.32 1.0 psRMS PCIe Gen 3.0, (Note 8) LVDS Output VOS Magnitude Change ΔVOS — — 50 mV — Output High Voltage VOH 0.9xVDD — — V — Output Low Voltage VOL — — 0.1xVDD V — Output Frequency fOUT — 100 — MHz — Differential Output Voltage VOD 275 350 475 mVPP — VOD Magnitude Change ΔVOD — — 40 mV — LVDS Output Rise/Fall Time tr/tf — 200 — ps 20% – 80% Output Duty Cycle ODC 48 50 52 % 20% – 80%, RL = 50Ω, CL = 2 pF Period Jitter, Peak to Peak JPTP — 2.5 — ps fOUT = 100 MHz, Standard Drive Integrated Phase Noise JPH — 0.28 — psRMS 200 kHz to 20 MHz @ 100 MHz, TA = +105°C — 0.4 — 100 kHz to 80 MHz @ 100 MHz — 1.7 2.0 12 kHz to 10 MHz @ 100 MHz ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise specified, T = +25°C, VDD = 3.3V. Parameter Symbol Min. Typ. Max. Units Conditions

 2019-2020 Microchip Technology Inc. DS20006175C-page 5 DSA557-03/04/05 LVCMOS Output Output High Voltage VOH 0.8xVDD — — V ±10 mA drive current Output Low Voltage VOL — — 0.2xVDD V ±10 mA drive current Output Frequency fOUT — 100 — MHz — Output Rise/Fall Time tr/tf — 1.2 — ns 20% – 80%, CL = 15 pF Output Duty Cycle ODC 48 50 52 % fOUT = 100 MHz, Standard Drive Period Jitter JPTP — 3 — psRMS fOUT = 100 MHz, Standard Drive Integrated Phase Noise JPH — 0.3 — psRMS 200 kHz to 20 MHz @ 100 MHz — 0.38 — 100 kHz to 20 MHz @ 100 MHz — 1.7 2.0 12 kHz to 20 MHz @ 100 MHz Note 1: Each pin VDD should be filtered with a 0.1 μF capacitor . 2: tSU is time to 100 ppm of output frequency after VDD is applied and outputs are enabled. 3: Output W aveform and Test Circuit figures define the parameters. 4: Output is enabled if pad is floated or not connected. 5: Contact Microchip for alternate output options (L VDS, LVCMOS). 6: Output W aveform and Connection Diagram define the parameters. 7: Period Jitter includes crosstalk from adjacent output. TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Operating Temperature Range TA –40 — +85 °C Ordering Option I –40 — +105 °C Ordering Option L Junction Operating Temperature TJ — — +150 °C — Storage Temperature Range TS –55 — +150 °C — Lead Temperature — — +260 — °C Soldering, 40s ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise specified, T = +25°C, VDD = 3.3V. Parameter Symbol Min. Typ. Max. Units Conditions

DS20006175C-page 6  2019-2020 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS AND CONNECTION DIAGRAMS

The descriptions of the pins are listed in Table 2-1, Table 2-2, and Table 2-3. TABLE 2-1: DSA557-03 QFN-14 PIN FUNCTION TABLE Pin Number Pin Name Pin Type Description 1 OE I Output enable, active-high. 2 NC N/A Ground recommended or leave as a NC. 3 NC N/A Ground recommended or leave as a NC. 4 VSS P Ground. 5 NC N/A Ground recommended or leave as a NC. 6 NC N/A Ground recommended or leave as a NC. 7 NC N/A Ground recommended or leave as a NC. 8 CLK1+ O True output of differential pair. 9 CLK1– O Complement output of differential pair. 10 CLK0– O Complement output of differential pair. 11 CLK0+ O True output of differential pair.

12 VDD1 P Power supply for core and output 1 (CLK1+/CLK1–)

13 VDD0 P Power supply for output 0 (CLK0+/CLK0–)

14 NC N/A Ground recommended or leave as a NC. VDD Enable 0.1μF 5ȍ 5ȍ 5ȍ 5ȍ CLK1+ CLK1- CLK0+ CLK0- 5 6 7 121314 Ropt Ropt 22Ω – 33Ω optional FIGURE 2-1: 14-Lead QFN Connection Diagram with Two HCSL Outputs. Receiver CLK0+ CLK0- Z0 = 50Ω CLK1- CLK1+ Z0 = 50Ω 100Ω 100Ω DSA557-03 4 5 67 14 13 12 FIGURE 2-2: LVDS Outputs. Z0 = 50ё Receiver CLK0 CLK1 DSA557-03 RS Z0 = 50ё RS 4 5 67 14 13 12 FIGURE 2-3: LVCMOS Outputs.

 2019-2020 Microchip Technology Inc. DS20006175C-page 9 DSA557-03/04/05

3.0 OUTPUT WAVEFORM

50% 20% 80% Output Output voltage swing. Refer to table below. FIGURE 3-1: DSA557-03/04/05 Output Waveform. TABLE 3-1: OUTPUT VOLTAGE SWING Specification VCM VSWING_SE (typ.) LVDS 1.2V 350 mV HCSL 350 mV 675 mV

DS20006175C-page 10  2019-2020 Microchip Technology Inc.

4.0 SOLDER REFLOW PROFILE

FIGURE 4-1: Solder Reflow Profile. TABLE 4-1: SOLDER REFLOW QFN-14 MSL 1 @ 260°C Refer to JSTD-020C TSSOP-16 MSL 3 @ 260°C Refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp.) 3°C/sec. max. Preheat Time 150°C to 200°C 60 to 180 sec. Time Maintained above 217°C 60 to 150 sec. Peak Temperature 255°C to 260°C Time within 5°C of Actual Peak 20 to 40 sec. Ramp-Down Rate 6°C/sec. max. Time 25°C to Peak Temperature 8 minutes max.

 2019-2020 Microchip Technology Inc. DS20006175C-page 11 DSA557-03/04/05

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

Example14-Lead QFN* XXXXXX-XX DCPYYWW 0SSS DSA557-03 DCP1936 0943 Example20-Lead QFN* XXXXXX-XX DCPYYWW 0SSS DSA557-05 DCP1918 0235 Legend: XX...X Product code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) SSS Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package.

• , ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging. DSA557-03/04/05 DS20006175C-page 12  2019-2020 Microchip Technology Inc.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging.  2019-2020 Microchip Technology Inc. DS20006175C-page 13 DSA557-03/04/05

DS20006175C-page 14  2019-2020 Microchip Technology Inc. NOTES:

 2019-2020 Microchip Technology Inc. DS20006175C-page 15 DSA557-03/04/05 APPENDIX A: REVISION HISTORY Revision A (April 2019)

• Initial release of DSA557-03/04/05 as Microchip data sheet DS20006175A. Revision B (May 2020)
• Updated Product Identification System section to add the Automotive Suffix to the full part number.
• Removed LVPECL option throughout data sheet.
• Added LVDS and LVCMOS information to Electri- cal Characteristics section.
• Added Figure 2-2, Figure 2-3, Figure 2-5, Figure 2-6, Figure 2-8, and Figure 2-9. Revision C (June 2020)
• Updated Phase Jitter values in the Electrical Characteristics table.

DS20006175C-page 16  2019-2020 Microchip Technology Inc. NOTES:

 2019-2020 Microchip Technology Inc. DS20006175C-page 17 DSA557-03/04/05 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) DSA557-0344FL0VAO: Two HCSL Outputs PCIe Clock Generator for Automotive, 14-Lead QFN, –40°C to +105°C Temperature Range, ±100 ppm Stability, 96/Tube, Standard Automotive b) DSA557-04111KI1TVAO: Three LVCMOS Outputs PCIe Clock Generator for Automotive, 20-Lead QFN, –40°C to +85°C Temperature Range, ±50 ppm Stability, 1000/Reel, Standard Automotive c) DSA557-053344KL0VAO: Four Output PCIe Clock Generator for Automotive, (CLK3/CLK2: LVDS, CLK1/ CLK0: HCSL), 20-Lead QFN, –40°C to +105°C Temperature Range, ±100 ppm Stability, 96/Tube, Standard Automotive Device: DSA557-03: Two Output PCIe Clock Generator for Automotive DSA557-04: Three Output PCIe Clock Generator for Automotive DSA557-05: Four Output PCIe Clock Generator for Automotive Output Format: (Note 1 ) 1 = LVCMOS 3 = LVDS 4 = HCSL K = 20-Lead QFN (DSA557-04/05 Only) Temperature Range: L = –40C to +105C (Automotive Grade 2) I = –40 C to +85C (Automotive Grade 3) Stability: 0 = ±100 ppm 1 = ±50 ppm Packing Option: <blank>= 72/Tube (DSA557-04/05) <blank>= 96/Tube (DSA557-03) T = 1000/Reel (All Package Options) Automotive Suffix: Vxx = Automotive suffix in which “xx” is assigned by Microchip. Default value is “AO” for standard automotive part. Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. Note 1: The Output Format’s arrangement is CLK3 to CLK0 (left-to-right) and may only have as many digits as that particular part allows. For example, DSA557-03 has two outputs; the part number example can only have two digits in that location. DSA557-04 can only have three and DSA557-05 can only have four. PART No. XXXX X X X X XXX Device Output Format Package Temp. Range Stability Packing Option Automotive Suffix

DS20006175C-page 18  2019-2020 Microchip Technology Inc. NOTES:

 2019-2020 Microchip Technology Inc. DS20006175C-page 19 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2019-2020, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-6319-1 Note the following details of the code protection feature on Microchip devices:

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• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.

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