DS92LV010AEP NSC | Alldatasheet
Document overview
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Technical content
Features
■ Bus LVDS Signaling (BLVDS) ■ Designed for Double Termination Applications ■ Balanced Output Impedance ■ Lite Bus Loading 5pF typical ■ Glitch free power up/down (Driver disabled) ■ 3.3V or 5.0V Operation ■ ±1V Common Mode Range ■ ±100mV Receiver Sensitivity ■ High Signaling Rate Capability (above 100 Mbps) ■ Low Power CMOS design ■ Product offered in 8 lead SOIC package
Applications
Selected Military Applications Selected Avionics Applications
Ordering Information
PART NUMBER VID PART NUMBER NS PACKAGE NUMBER (Note 3) DS92LV010ATMEP V62/04740-01 M08A (Notes 1, 2) TBD TBD Note 1: For the following (Enhanced Plastic) version, check for availability: - DS92LV010ATMXEP Parts listed with an "X" are provided in Tape & Reel and parts without an "X" are in Rails. Note 2: FOR ADDITIONAL ORDERING AND PRODUCT INFORMATION, PLEASE VISIT THE ENHANCED PLASTIC WEB SITE AT: www.national.com/ mil Note 3: Refer to package details under Physical Dimensions Connection Diagram 20119301 See NS Package Number M08A TRI-STATE® is a registered trademark of National Semiconductor Corporation. © 2009 National Semiconductor Corporation 201193 www.national.com
201193 Version 3 Revision 1 Print Date/Time: 2009/06/15 11:42:19
DS92LV010AEP Bus LVDS 3.3/5.0V Single Transceiver
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Absolute Maximum Ratings (Notes 4, 5) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) 6.0V Enable Input Voltage (DE, RE) −0.3V to (VCC + 0.3V) Driver Input Voltage (DIN) −0.3V to (VCC + 0.3V) Receiver Output Voltage (R OUT) −0.3V to (VCC + 0.3V) Bus Pin Voltage (DO/RI±) −0.3V to + 3.9V Driver Short Circuit Current Continuous ESD (HBM 1.5 kΩ, 100 pF) >2.0 kV Maximum Package Power Dissipation at 25°C SOIC 1025 mW Derate SOIC Package 8.2 mW/°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 4 sec.) 260°C Recommended Operating Conditions Min Max Units Supply Voltage (VCC), or 3.0 3.6 V Supply Voltage (VCC) 4.5 5.5 V Receiver Input Voltage 0.0 2.9 V Operating Free Air Temperature −40 +85 °C TA = −40°C to +85°C unless otherwise noted, VCC = 3.3V ± 0.3V Symbol Parameter Conditions Pin Min Typ Max Units VOD Output Differential Voltage RL = 27Ω, Figure 1 DO+/RI+, DO−/RI− 140 250 360 mV ΔVOD VOD Magnitude Change 3 30 mV VOS Offset Voltage 1 1.25 1.65 V ΔVOS Offset Magnitude Change 5 50 mV IOSD Output Short Circuit Current VO = 0V, DE = VCC −12 −20 mA VOH Voltage Output High VID = +100 mV I OH = −400 µA R OUT 2.8 3 V Inputs Open 2.8 3 V Inputs Shorted 2.8 3 V Inputs Terminated, RL = 27Ω 2.8 3 V VOL Voltage Output Low IOL = 2.0 mA, VID = −100 mV 0.1 0.4 V IOS Output Short Circuit Current VOUT = 0V, VID = +100 mV −5 −35 −85 mA VTH Input Threshold High DE = 0V DO+/RI+, DO−/RI− +100 mV VTL Input Threshold Low −100 mV IIN Input Current DE = 0V, VIN = +2.4V, or 0V −20 ±1 +20 µA VCC = 0V, VIN = +2.4V, or 0V −20 ±1 +20 µA VIH Minimum Input High Voltage DIN, DE, RE
2.0 VCC V
VIL Maximum Input Low Voltage GND 0.8 V IIH Input High Current VIN = VCC or 2.4V ±1 ±10 µA IIL Input Low Current VIN = GND or 0.4V ±1 ±10 µA VCL Input Diode Clamp Voltage ICLAMP = −18 mA −1.5 −0.8 V ICCD Power Supply Current DE = RE = VCC , RL = 27Ω V CC 13 20 mA ICCR DE = RE = 0V 5 8 mA ICCZ DE = 0V, RE = VCC 3 7.5 mA ICC DE = VCC, RE = 0V, RL = 27Ω 16 22 mA Coutput Capacitance @ BUS Pins DO+/RI+, DO−/RI− 5 pF 3 www.national.com
TA = −40°C to +85°C unless otherwise noted, VCC = 5.0V ± 0.5V Symbol Parameter Conditions Pin Min Typ Max Units VOD Output Differential Voltage RL = 27Ω, Figure 1 DO+/RI+, DO−/RI− 145 270 390 mV ΔVOD VOD Magnitude Change 3 30 mV VOS Offset Voltage 1 1.35 1.65 V ΔVOS Offset Magnitude Change 5 50 mV IOSD Output Short Circuit Current VO = 0V, DE = VCC −12 −20 mA VOH Voltage Output High VID = +100 mV IOH = −400 µA ROUT 4.3 5.0 V Inputs Open 4.3 5.0 V Inputs Shorted 4.3 5.0 V Inputs Terminated, RL = 27Ω 4.3 5.0 V VOL Voltage Output Low IOL = 2.0 mA, VID = −100 mV 0.1 0.4 V IOS Output Short Circuit Current VOUT = 0V, VID = +100 mV −35 −90 −130 mA VTH Input Threshold High DE = 0V DO+/RI+, DO−/RI− +100 mV VTL Input Threshold Low −100 mV IIN Input Current DE = 0V, VIN = +2.4V, or 0V −20 ±1 +20 µA VCC = 0V, VIN = +2.4V, or 0V −20 ±1 +20 µA VIH Minimum Input High Voltage DIN, DE, RE VIL Maximum Input Low Voltage GND 0.8 V IIH Input High Current VIN = VCC or 2.4V ±1 ±10 µA IIL Input Low Current VIN = GND or 0.4V ±1 ±10 µA VCL Input Diode Clamp Voltage ICLAMP = −18 mA −1.5 −0.8 V ICCD Power Supply Current DE = RE = VCC, RL = 27Ω V CC 17 25 mA ICCR DE = RE = 0V 6 10 mA ICCZ DE = 0V, RE = VCC 3 8 mA ICC DE = VCC, RE = 0V, RL = 27Ω 20 25 mA Coutput Capacitance @ BUS Pins DO+/RI+, DO−/RI− 5 pF TA = −40°C to +85°C, VCC = 3.3V ± 0.3V Symbol Parameter Conditions Min Typ Max Units DIFFERENTIAL DRIVER TIMING REQUIREMENTS tPHLD Differential Prop. Delay High to Low RL = 27Ω, Figures 2, 3 CL = 10 pF 1.0 3.0 5.0 ns tPLHD Differential Prop. Delay Low to High 1.0 2.8 5.0 ns tSKD Differential SKEW |t PHLD - tPLHD| 0.2 1.0 ns tTLH Transition Time Low to High 0.3 2.0 ns tTHL Transition Time High to Low 0.3 2.0 ns tPHZ Disable Time High to Z RL = 27Ω, Figures 4, 5 CL = 10 pF 0.5 4.5 9.0 ns tPLZ Disable Time Low to Z 0.5 5.0 10.0 ns tPZH Enable Time Z to High 2.0 5.0 7.0 ns tPZL Enable Time Z to Low 1.0 4.5 9.0 ns DIFFERENTIAL RECEIVER TIMING REQUIREMENTS www.national.com 4
Symbol Parameter Conditions Min Typ Max Units tPHLD Differential Prop. Delay High to Low Figures 6, 7 CL = 10 pF 2.5 5.0 12.0 ns tPLHD Differential Prop. Delay Low to High 2.5 5.5 10.0 ns tSKD Differential SKEW |t PHLD - tPLHD| 0.5 2.0 ns tr Rise Time 1.5 4.0 ns tf Fall Time 1.5 4.0 ns tPHZ Disable Time High to Z RL = 500Ω, Figures 8, 9 CL = 10 pF (Note 11) 2.0 4.0 6.0 ns tPLZ Disable Time Low to Z 2.0 5.0 7.0 ns tPZH Enable Time Z to High 2.0 7.0 13.0 ns tPZL Enable Time Z to Low 2.0 6.0 10.0 ns TA = −40°C to +85°C, VCC = 5.0V ± 0.5V Symbol Parameter Conditions Min Typ Max Units DIFFERENTIAL DRIVER TIMING REQUIREMENTS tPHLD Differential Prop. Delay High to Low RL = 27Ω, Figures 2, 3 CL = 10 pF 0.5 2.7 4.5 ns tPLHD Differential Prop. Delay Low to High 0.5 2.5 4.5 ns tSKD Differential SKEW |t PHLD - tPLHD| 0.2 1.0 ns tTLH Transition Time Low to High 0.3 2.0 ns tTHL Transition Time High to Low 0.3 2.0 ns tPHZ Disable Time High to Z RL = 27Ω, Figures 4, 5 CL = 10 pF 0.5 3.0 7.0 ns tPLZ Disable Time Low to Z 0.5 5.0 10.0 ns tPZH Enable Time Z to High 2.0 4.0 7.0 ns tPZL Enable Time Z to Low 1.0 4.0 9.0 ns DIFFERENTIAL RECEIVER TIMING REQUIREMENTS tPHLD Differential Prop. Delay High to Low Figures 6, 7 CL = 10 pF 2.5 5.0 12.0 ns tPLHD Differential Prop. Delay Low to High 2.5 4.6 10.0 ns tSKD Differential SKEW |t PHLD - tPLHD| 0.4 2.0 ns tr Rise Time 1.2 2.5 ns tf Fall Time 1.2 2.5 ns tPHZ Disable Time High to Z RL = 500Ω, Figures 8, 9 CL = 10 pF (Note 11) 2.0 4.0 6.0 ns tPLZ Disable Time Low to Z 2.0 4.0 6.0 ns tPZH Enable Time Z to High 2.0 5.0 9.0 ns tPZL Enable Time Z to Low 2.0 5.0 7.0 ns 5 www.national.com
Electrical Characteristics
Note 4: “Absolute Maximum Ratings” are these beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Note 5: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground except VOD, VID, VTH and VTL unless otherwise specified. Note 6: All typicals are given for VCC = +3.3V or 5.0 V and TA = +25°C, unless otherwise stated. Note 7: ESD Rating: HBM (1.5 kΩ, 100 pF) > 2.0 kV EAT (0Ω, 200 pF) > 300V. Note 8: CL includes probe and fixture capacitance. Note 9: Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50Ω, tr, tf ≤ 6.0ns (0%–100%) on control pins and ≤ 1.0ns for RI inputs. Note 10: The DS92LV010AEP is a current mode device and only function with datasheet specification when a resistive load is applied between the driver outputs. Note 11: For receiver TRI-STATE® delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH, and tPHZ. Note 12: "Testing and other quality control techniques are used to the extent deemed necessary to ensure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific PARAMETRIC testing, product performance is assured by characterization and/or design." Test Circuits and Timing Waveforms 20119303 FIGURE 1. Differential Driver DC Test Circuit FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit FIGURE 3. Differential Driver Propagation Delay and Transition Time Waveforms
FIGURE 4. Driver TRI-STATE Delay Test Circuit FIGURE 5. Driver TRI-STATE Delay Waveforms FIGURE 6. Receiver Propagation Delay and Transition Time Test Circuit FIGURE 7. Receiver Propagation Delay and Transition Time Waveforms
FIGURE 8. Receiver TRI-STATE Delay Test Circuit FIGURE 9. Receiver TRI-STATE Delay Waveforms TRI-STATE Delay Waveforms
Application Information
There are a few common practices which should be implied when designing PCB for BLVDS signaling. Recommended practices are:
- Use at least 4 layer PCB board (BLVDS signals, ground, power and TTL signals).
- Keep drivers and receivers as close to the (BLVDS port side) connector as possible.
- Bypass each BLVDS device and also use distributed bulk capacitance. Surface mount capacitors placed close to power and ground pins work best. Two or three multi-layer ceramic (MLC) surface mount capacitors (0.1 µF, and 0.01 µF in parallel should be used between each VCC and ground. The capacitors should be as close as possible to the VCC pin.
- Use the termination resistor which best matches the differential impedance of your transmission line.
- Leave unused LVDS receiver inputs open (floating)
TABLE 1. Functional Table TABLE 2. Transmitter Mode TABLE 3. Receiver Mode TABLE 4. Device Pin Description
Physical Dimensions inches (millimeters) unless otherwise noted See NS Package Number M08A www.national.com 10
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