DS91C176TMAX-NOPB TI | Alldatasheet
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CLK1A (8 KHz) CLK1B (8 KHz) CLK2A (19.44 MHz) CLK2B (19.44 MHz) CLK3A (User Defined up to 100 MHz) CLK3B (User Defined up to 100 MHz) 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T 80:R T ATCA Backplane Slot Card N Slot Card N+1 MLVDS TransceiversMLVDS Transceivers DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013 DS91D176/DS91C176100MHzSingleChannelM-LVDSTransceivers Check forSamples: DS91C176 ,DS91D176 1FEATURES DESCRIPTION The DS91C176 and DS91D176 are 100 MHz single 2• DC to100+ MHz /200+ Mbps Low Power, Low channelM-LVDS (MultipointLow VoltageDifferentialEMI Operation Signaling)transceiversdesignedforapplicationsthat• OptimalforATCA, uTCA Clock Distribution utilizemultipointnetworks(e.g.clockdistributionin Networks ATCA and uTCA based systems).M-LVDS isa new bus interfacestandard(TIA/EIA-899)optimizedfor• Meets or Exceeds TIA/EIA-899M-LVDS multidropnetworks.Controllededge rates,tightinputStandard receiverthresholdsand increaseddrivestrengthare• Wide InputCommon Mode Voltagefor sone of the key enhancements thatmake M-LVDSIncreasedNoise Immunity devicesan idealchoicefordistributingsignalsvia
- DS91D176 has Type 1 ReceiverInput multipointnetworks.
- DS91C176 has Type 2 ReceiverwithFail-safe The DS91C176/DS91D176 are half-duplex
- IndustrialTemperature Range transceiversthatacceptLVTTL/LVCMOS signalsat the driverinputsand convertthem to differentialM-• Space Saving SOIC-8 Package LVDS signals.The receiverinputsacceptlow voltage differentialsignals(LVDS, B-LVDS, M-LVDS, LV- PECL and CML) and convertthem to 3V LVCMOS signals.The DS91D176 has a M-LVDS type 1 receiverinputwithno offset.The DS91C176 has an M-LVDS type 2 receiverwhich enable failsafe functionality. TypicalApplicationinan ATCA Clock DistributionNetwork Figure1. System Diagram Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2006–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
2.4 V -2.4 V 50 mV -50 mV 150 mV Transition Region Type 1 Type 2 VID DS91C176,DS91D176 SNLS146L –MARCH 2006–REVISED APRIL 2013 www.ti.com Connection and Logic Diagram Top View Figure2. SOIC Package See Package Number D0008A M-LVDS ReceiverTypes The EIA/TIA-899M-LVDS standardspecifiestwo differenttypesofreceiverinputstages.A type1 receiverhas a conventionalthresholdthatiscenteredatthemidpointoftheinputamplitude,VID/2.A type2 receiverhas a built inoffsetthatis100mV greaterthanVID/2.The type2 receiveroffsetactsas a failsafecircuitwhere open orshort circuitsattheinputwillalwaysresultintheoutputstagebeingdriventoa lowlogicstate. Figure3. M-LVDS ReceiverInputThresholds These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.
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DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013 AbsoluteMaximum Ratings (1)(2) SupplyVoltage,VCC −0.3Vto+4V ControlInputVoltages −0.3Vto(VCC + 0.3V) DriverInputVoltage −0.3Vto(VCC + 0.3V) DriverOutputVoltages −1.8Vto+4.1V ReceiverInputVoltages −1.8Vto+4.1V ReceiverOutputVoltage −0.3Vto(VCC + 0.3V) Maximum Package Power Dissipationat+25°C DerateSOIC Package 6.67mW/ °C above +25°C ThermalResistance(4-Layer,2 oz.Cu, JEDEC) θJA 150°C/W θJC 63°C/W Maximum JunctionTemperature 150°C StorageTemperatureRange −65°C to+150°C Lead Temperature (Soldering,4 seconds) 260°C ESD Ratings: (HBM 1.5kΩ,100pF) ≥ 8 kV (EIAJ0Ω,200pF) ≥ 250 V (CDM 0Ω,0pF) ≥ 1000 V (1) “AbsoluteMaximum Ratings”arethosebeyond whichthesafetyofthedevicecannotbe verified.They arenotmeant toimplythatthe deviceshouldbe operatedattheselimits.The tablesof“ElectricalCharacteristics”provideconditionsforactualdeviceoperation. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. Recommended OperatingConditions Min Typ Max Units SupplyVoltage,VCC 3.0 3.3 3.6 V VoltageatAny Bus Terminal(SeparateorCommon-Mode) −1.4 +3.8 V DifferentialInputVoltageVID 2.4 V LVTTL InputVoltageHighVIH 2.0 VCC V LVTTL InputVoltageLow VIL 0 0.8 V OperatingFreeAirTemperatureTA −40 +25 +85 °C ElectricalCharacteristics Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3)(4) Parameter TestConditions Min Typ Max Units M-LVDS Driver |VAB | Differentialoutputvoltagemagnitude R L = 50Ω,C L = 5pF 480 650 mV See Figure4 and Figure6ΔVAB Change indifferentialoutputvoltagemagnitude −50 0 +50 mVbetween logicstates VOS(SS) Steady-statecommon-mode outputvoltage R L = 50Ω,C L = 5pF 0.3 1.8 2.1 V See Figure4 and Figure5|ΔVOS(SS)| Change insteady-statecommon-mode output 0 +50 mV(VOS(PP) @ 500KHz clock)voltagebetween logicstates VOS(PP) Peak-to-peakcommon-mode outputvoltage 135 mV VA(OC) Maximum steady-stateopen-circuitoutputvoltage See Figure7 0 2.4 V VB(OC) Maximum steady-stateopen-circuitoutputvoltage 0 2.4 V (1) Allcurrentsintodevicepinsarepositive;allcurrentsoutofdevicepinsarenegative.Allvoltagesarereferencedtodevicegroundunless otherwisespecified. (2) AlltypicalsaregivenforVCC = 3.3Vand TA = 25°C. (3) The algebraicconvention,inwhichtheleastpositive(mostnegative)limitisdesignatedas minimum, isused inthisdatasheet. (4) C L includesfixturecapacitanceand C D includesprobecapacitance. Copyright© 2006–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS91C176 DS91D176
DS91C176,DS91D176 SNLS146L –MARCH 2006–REVISED APRIL 2013 www.ti.com ElectricalCharacteristics(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3)(4) Parameter TestConditions Min Typ Max Units VP(H) Voltageovershoot,low-to-highleveloutput R L = 50Ω,C L = 5pF,CD = 0.5pF 1.2VSS V See Figure9 and Figure10 (5) VP(L) Voltageovershoot,high-to-lowleveloutput −0.2V V SS IIH High-levelinputcurrent(LVTTL inputs) VIH = 2.0V -15 15 μA IIL Low-levelinputcurrent(LVTTL inputs) VIL= 0.8V -15 15 μA VIKL InputClamp Voltage(LVTTL inputs) IIN = -18mA -1.5 V IOS Differentialshort-circuitoutputcurrent See Figure8 -43 43 mA M-LVDS Receiver VIT+ Positive-goingdifferentialinputvoltagethreshold See FUNCTION TABLES Type 1 20 50 mV Type 2 94 150 mV VIT− Negative-goingdifferentialinputvoltagethreshold See FUNCTION TABLES Type 1 −50 20 mV Type 2 50 94 mV VOH High-leveloutputvoltage(LVTTL output) IOH = −8mA 2.4 2.7 V VOL Low-leveloutputvoltage(LVTTL output) IOL = 8mA 0.28 0.4 V IOZ TRI-STATE outputcurrent VO = 0V or3.6V −10 10 μA IOSR Short-circuitreceiveroutputcurrent(LVTTL output) VO = 0V -48 -90 mA M-LVDS Bus (Inputand Output)Pins IA Transceiverinput/outputcurrent VA = 3.8V,VB = 1.2V 32 µA VA = 0V or2.4V,VB = 1.2V −20 +20 µA VA = −1.4V,VB = 1.2V −32 µA IB Transceiverinput/outputcurrent VB = 3.8V,VA = 1.2V 32 µA VB = 0V or2.4V,VA = 1.2V −20 +20 µA VB = −1.4V,VA = 1.2V −32 µA IAB Transceiverinput/outputdifferentialcurrent(IA − IB) VA = VB,−1.4V≤ V ≤ 3.8V −4 +4 µA IA(OFF) Transceiverinput/outputpower-offcurrent VA = 3.8V,VB = 1.2V, DE = VCC 32 µA 0V ≤ VCC ≤ 1.5V VA = 0V or2.4V,VB = 1.2V, DE = VCC −20 +20 µA 0V ≤ VCC ≤ 1.5V VA = −1.4V,VB = 1.2V, DE =VCC −32 µA 0V ≤ VCC ≤ 1.5V IB(OFF) Transceiverinput/outputpower-offcurrent VB = 3.8V,VA = 1.2V, DE = VCC 32 µA 0V ≤ VCC ≤ 1.5V VB = 0V or2.4V,VA = 1.2V, DE = VCC −20 +20 µA 0V ≤ VCC ≤ 1.5V VB = −1.4V,VA = 1.2V, DE = VCC −32 µA 0V ≤ VCC ≤ 1.5V IAB(OFF) Transceiverinput/outputpower-offdifferential VA = VB,−1.4V≤ V ≤ 3.8V, current(IA(OFF) − IB(OFF)) DE = VCC −4 +4 µA 0V ≤ VCC ≤ 1.5V C A Transceiverinput/outputcapacitance VCC = OPEN 9 pF C B Transceiverinput/outputcapacitance 9 pF C AB Transceiverinput/outputdifferentialcapacitance 5.7 pF C A/B Transceiverinput/outputcapacitancebalance 1.0(CA/CB) (5) Not productiontested.Specifiedby a statisticalanalysison a sample basisatthetimeofcharacterization.
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DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013 ElectricalCharacteristics(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3)(4) Parameter TestConditions Min Typ Max Units SUPPLY CURRENT (VCC ) ICCD DriverSupplyCurrent R L = 50Ω,DE = VCC ,RE = VCC 20 29.5 mA ICCZ TRI-STATE SupplyCurrent DE = GND, RE = VCC 6 9.0 mA ICCR ReceiverSupplyCurrent DE = GND, RE = GND 14 18.5 mA SwitchingCharacteristics Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2) Parameter TestConditions Min Typ Max Units DRIVER AC SPECIFICATION tPLH DifferentialPropagationDelayLow toHigh R L = 50Ω,C L = 5 pF, 1.3 3.4 5.0 ns C D = 0.5pFtPHL DifferentialPropagationDelayHightoLow 1.3 3.1 5.0 nsFigure9 and Figure10 tSKD1 (tsk(p)) PulseSkew |tPLHD − tPHLD |(3)(4) 300 420 ps tSKD3 Part-to-PartSkew (5)(5) 1.3 ns tTLH (tr) RiseTime (4) 1.0 1.8 3.0 ns tTHL (tf) FallTime (4) 1.0 1.8 3.0 ns tPZH EnableTime (ZtoActiveHigh) R L = 50Ω,C L = 5 pF, 8 ns C D = 0.5pFtPZL EnableTime (ZtoActiveLow ) 8 nsSee Figure11 and Figure12 tPLZ DisableTime (ActiveLow toZ) 8 ns tPHZ DisableTime (ActiveHightoZ) 8 ns tJIT Random Jitter,RJ (4) 100 MHz ClockPattern(6) 2.5 5.5 psrms fMAX Maximum Data Rate 200 Mbps RECEIVER AC SPECIFICATION tPLH PropagationDelayLow toHigh C L = 15 pF 2.0 4.7 7.5 ns See Figure13,Figure14 and Figure15tPHL PropagationDelayHightoLow 2.0 5.3 7.5 ns tSKD1 (tsk(p)) PulseSkew |tPLHD − tPHLD |(3)(4) 0.6 1.7 ns tSKD3 Part-to-PartSkew (5)(4) 1.3 ns tTLH (tr) RiseTime (4) 0.5 1.2 2.5 ns tTHL (tf) FallTime (4) 0.5 1.2 2.5 ns tPZH EnableTime (ZtoActiveHigh) R L = 500Ω,C L = 15 pF 10 ns See Figure16 and Figure17tPZL EnableTime (ZtoActiveLow) 10 ns tPLZ DisableTime (ActiveLow toZ) 10 ns tPHZ DisableTime (ActiveHightoZ) 10 ns fMAX Maximum Data Rate 200 Mbps (1) AlltypicalsaregivenforVCC = 3.3Vand TA = 25°C. (2) C L includesfixturecapacitanceand C D includesprobecapacitance. (3) tSKD1 ,|tPLHD − tPHLD |,isthemagnitudedifferenceindifferentialpropagationdelaytimebetween thepositivegoingedge and thenegative goingedge ofthesame channel. (4) Not productiontested.Specifiedby a statisticalanalysison a sample basisatthetimeofcharacterization. (5) tSKD3 ,Part-to-PartSkew, isdefinedas thedifferencebetween theminimum and maximum specifieddifferentialpropagationdelays.This specificationappliestodevicesatthesame VCC and within5°C ofeach otherwithintheoperatingtemperaturerange. (6) Stimulusand fixtureJitterhas been subtracted. Copyright© 2006–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS91C176 DS91D176
A B ~ 2.1V ~ 1.5V 'VOS(SS) VOS(PP)VOS DS91C176,DS91D176 SNLS146L –MARCH 2006–REVISED APRIL 2013 www.ti.com TestCircuitsand Waveforms Figure4. DifferentialDriverTestCircuit Figure5. DifferentialDriverWaveforms Figure6. DifferentialDriverFullLoad TestCircuit Figure7. DifferentialDriverDC Open TestCircuit
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DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013 Figure8. DifferentialDriverShort-CircuitTestCircuit Figure9. DriverPropagationDelay and TransitionTime TestCircuit Figure10. DriverPropagationDelays and TransitionTime Waveforms Figure11. DriverTRI-STATE Delay TestCircuit Copyright© 2006–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS91C176 DS91D176
DS91C176,DS91D176 SNLS146L –MARCH 2006–REVISED APRIL 2013 www.ti.com Figure12. DriverTRI-STATE Delay Waveforms Figure13. ReceiverPropagationDelay and TransitionTime TestCircuit Figure14. Type 1 ReceiverPropagationDelay and TransitionTime Waveforms
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DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013 Figure15. Type 2 ReceiverPropagationDelay and TransitionTime Waveforms Figure16. ReceiverTRI-STATE Delay TestCircuit Figure17. ReceiverTRI-STATE Delay Waveforms FUNCTION TABLES Table1.DS91D176/DS91C176 Transmitting(1) Inputs Outputs RE DE D B A X 2.0V 2.0V L H X 2.0V 0.8V H L X 0.8V X Z Z (1) X — Don 'tcarecondition Z — Highimpedance state Copyright© 2006–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS91C176 DS91D176
DS91C176,DS91D176 SNLS146L –MARCH 2006–REVISED APRIL 2013 www.ti.com Table2.DS91D176 Receiving(1) Inputs Output RE DE A − B R 0.8V 0.8V ≥ +0.05V H 0.8V 0.8V ≤ −0.05V L 0.8V 0.8V 0V X 2.0V 0.8V X Z (1) X — Don 'tcarecondition Z — Highimpedance state Table3.DS91C176 Receiving(1) Inputs Output RE DE A − B R 0.8V 0.8V ≥ +0.15V H 0.8V 0.8V ≤ +0.05V L 0.8V 0.8V 0V L 2.0V 0.8V X Z (1) X — Don 'tcarecondition Z — Highimpedance state Table4.DS91D176 ReceiverInputThresholdTestVoltages(1) ResultingDifferential ResultingCommon-ModeAppliedVoltages ReceiverOutputInputVoltage InputVoltage VIA VIB VID VIC R 2.400V 0.000V 2.400V 1.200V H 0.000V 2.400V −2.400V 1.200V L 3.800V 3.750V 0.050V 3.775V H 3.750V 3.800V −0.050V 3.775V L −1.400V −1.350V −0.050V −1.375V H −1.350V −1.400V 0.050V −1.375V L (1) H — HighLevel L — Low Level Outputstateassumes thatthereceiverisenabled(RE = L) Table5.DS91C176 ReceiverInputThresholdTestVoltages(1) ResultingDifferential ResultingCommon-ModeAppliedVoltages ReceiverOutputInputVoltage InputVoltage VIA VIB VID VIC R 2.400V 0.000V 2.400V 1.200V H 0.000V 2.400V −2.400V 1.200V L 3.800V 3.650V 0.150V 3.725V H 3.800V 3.750V 0.050V 3.775V L −1.250V −1.400V 0.150V −1.325V H −1.350V −1.400V 0.050V −1.375V L (1) H — HighLevel L — Low Level Outputstateassumes thatthereceiverisenabled(RE = L)
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DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013 PIN DESCRIPTONS Pin No. Name Description
1 R Receiveroutputpin
2 RE Receiverenablepin:When RE ishigh,thereceiverisdisabled.When RE isloworopen,the receiverisenabled. 3 DE Driverenablepin:When DE islow,thedriverisdisabled.When DE ishigh,thedriverisenabled.
4 D Driverinputpin
5 GND Ground pin
6 A Non-invertingdriveroutputpin/Non-invertingreceiverinputpin
7 B Invertingdriveroutputpin/Invertingreceiverinputpin
8 VCC Power supplypin,+3.3V ± 0.3V Copyright© 2006–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS91C176 DS91D176
DS91C176,DS91D176 SNLS146L –MARCH 2006–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics– DS91D176/DS91C176 Supply Current Output VOD vs. vs. Frequency Load Resistance SupplyCurrentmeasured usinga clockpatternwithdriverterminatedVCC = 3.3V,TA = +25°C to50ohms .VCC = 3.3V,TA = +25°C. Figure18. Figure19.
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DS91C176,DS91D176 www.ti.com SNLS146L –MARCH 2006–REVISED APRIL 2013
REVISION HISTORY
Changes from RevisionK (April2013)toRevisionL Page Copyright© 2006–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:DS91C176 DS91D176
www.ti.com 16-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples DS91C176TMA ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 85 DS91C 176MA DS91C176TMA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91C 176MA DS91C176TMAX ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 85 DS91C 176MA DS91C176TMAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91C 176MA DS91D176TMA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91D 176MA DS91D176TMAX ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 85 DS91D 176MA DS91D176TMAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91D 176MA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
www.ti.com 16-Apr-2013 Addendum-Page 2 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS91C176TMAX SOIC D 8 2500 349.0 337.0 45.0 DS91C176TMAX/NOPB SOIC D 8 2500 349.0 337.0 45.0 DS91D176TMAX SOIC D 8 2500 349.0 337.0 45.0 DS91D176TMAX/NOPB SOIC D 8 2500 349.0 337.0 45.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 Pack Materials-Page 2
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