DS9101

DS1904 AD | Alldatasheet

Document overview

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Technical content

19-4864; Rev 11/23

1 Analog Devices

• Real-time clock/calendar in binary format
• Uses the same binary time/date r epresentation as the DS1994 but with 1 s econd resolution
• Clock accuracy is better than ±2 minutes per month at +25°C
• Operating temperature range from -40°C to +85°C
• Over 10 years of operation Common iButton Features
• Unique, factory-lasered and tested 64-bit r egistration number (8-bit family code + -bit serial number + 8-bit CRC tester) assures absolute traceability because no two parts are alike
• Multidrop controller for MicroLAN
• Digital identification and information by momentary contact
• Chip-based data carrier compactly stores information
• Data can be accessed while affixed to object
• Economically communicates to host with a single digital signal at 16.3kbps
• Standard 16mm diameter and 1-Wire® pr otocol ensure compatibility with iButton® device family
• Button shape is self-aligning with cup-shaped probes
• Durable stainless steel case engraved with registration number withstands hars h env ironments
• Easily affixed with self-stick adhesive backing, l atched by its flange, or locked with a ring pr essed onto its rim
• Presence detector acknowledges when r eader first applies voltage 1-Wire and iButton are registered trademarks of Maxim Integrated Products, Inc. F5 MicroCan A ll dimensions are shown in millimeters.

Ordering Information

DS1904L-F5# F5 MicroCan DS1904L-F5+ F5 MicroCan #Denotes a RoHS-compliant device that may include lead(Pb) that is exempt under the RoHS requirements. +Denotes a lead(Pb)-free/RoHS-compliant package. Examples of Accessories DS9096P Self-Stick Adhesive Pad DS9101 Multi-Purpose Clip DS9093RA Mounting Lock Ring DS9093A Snap-In Fob DS9092 iButton Probe

2 Analog Devices

The DS1904 RTC i Button is a rugged real -time clock module that can be accessed with minimal hardware. Data is transferred serially via the 1-Wire protocol, which requires only a single data lead and a ground return. The DS1904 contains a unique 64-bit factory -lasered ROM and a real -time clock/calendar implemented as a binary counter. The durable MicroCan package is highly resistant to environmental hazards such as dirt, moisture, and shock. Accessories permit the DS1904 to be mounted on almost any surface including printed circuit boards and plastic key fobs. The DS1904 adds functions such as calendar, time and date stamp, stopwatch, hour meter, interval timer, and logbook to any type of electronic device or embedded application that uses a microcontroller. Overview The DS1904 has two main data components: 1) 64-bit lasered ROM, and 2) real -time clock counter (Figure 1). The real-time clock utilizes an on-chip oscillator that is connected to a 32.768kHz crystal. The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus controller must first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM. The protocol for these ROM functions is described in Figure 7. After a ROM function command is successfully executed, the real-time clock functions become accessible, and the controller may then provide one of the real-time clock function commands. The protocol for these commands is described in Figure 5. All data is read and written least significant bit first. Block Diagram Figure 1 64-Bit Lasered ROM Each DS1904 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits (see Figure 3). The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information about the Analog Devices 1-Wire Cyclic Redundancy Check is available in the Book of iButton ® Standards. The RO M FU NC TION CO NTR OL 64-BIT LAS ERED R OM C LOCK FUN CTION CO NTR OL OSCILLATOR CO NTR OL DS1904 3V LITHIUM D ATALID CO NTAC T 32 .768kHz OSCILLATOR READ/WRITE BUFFER RT C C OUN TER ( 32-BIT) DIVIDE R 1Hz

3 Analog Devices

shift register bits are initialized to zero. Then starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the eight bits of CRC should return the shift register to all zeros. The 64-bit ROM and ROM Function Control sections allow the DS1904 to operate as a 1-Wire device and follow the 1-Wire protocol detailed in Chapter 5 of the Book of iButton® Standards. Hierarchical Structure for 1-Wire Protocol Figure 2 64-Bit Lasered ROM Figure 3 1-Wire CRC Generator Figure 4 8-BIT CR C C ODE 48-BIT SERIAL NUMBER 8-BIT FAMILY CODE [01h] MSB LSB MSB LSB MSB LSB MSB LSB BUS CO NTR OLLER OTHER DEVICES 1-Wire BUS CO MMAND LEVE L: DS1904 AVAILABLE COMMANDS: DATA FIELD AFFE CTED: READ ROM MATCH ROM SEARCH ROM SKIP ROM 1-Wire ROM FUN CTION COMMANDS (SEE FIGURE 7) DS1904-SPECIFIC FUN CTION COMMANDS (SEE FIGURE 5) WR ITE CL OCK READ CLOCK 64-BIT ROM 64-BIT ROM 64-BIT ROM N/A RT C C OUN TER, D EVIC E C ONT ROL RT C C OUN TER, D EVIC E C ONT ROL INPUT DATA 1st STAGE 2nd STAGE 3rd STAGE 4th STAGE 5th STAGE 6th STAGE 7th STAGE 8th STAGE X1 X2 X3 X4 X5 X6 X7 X8 POLYNOMIAL = X8 + X5 + X4 + 1

4 Analog Devices

A 32.768kHz crystal oscillator is used as the time base for the real-time clock counter. The oscillator can be turned on or off under software control. The oscillator must be on for the real -time clock to function. The real-time clock counter is double buffered. This allows the controller to read time without the data changing while it is being read. To accomplish this, a snapshot of the counter data is transferred to a read/write buffer, which the user accesses. Device Control Byte The on/off control of the 32.768kHz crystal oscillator is done through the device control byte. This byte can be read and written through the Clock Function commands. Device Control Byte 7 6 5 4 3 2 1 0 U4 U3 U2 U1 OSC OSC 0 0 Bit 0 - 1 0 No function Bits 0 and 1 are hard-wired to read all 0’s. Bit 2 - 3 OSC Oscillator Enable/Disable These bits control/report whether the 32.768 kHz crystal oscillator is running. If the oscillator is running, both OSC bits will read 1. If the oscillator is turned off these bits will all read 0. When writing the device control byte both occurrences of the OSC bit should have identical data. Otherwise, the value in bit address 3 (bold) takes precedence. Bit 4 - 7 Un General-purpose user flags These nonvolatile bits have no particular function within the chip. They can be read and written under the control of the application software. Real-Time Clock The real-time clock is a 32-bit binary counter. It is incremented once per second. The real-time clock can accumulate 136 years of seconds before rolling over. Time/date is represented by the number of seconds since a reference point, which is determined by the user. For example, 12:00 a.m., January 1, 1970 could be a reference point. Clock Function Commands The “Clock Function Flow Chart” (Figure 5) describes the protocols necessary for accessing the real-time clock. With only four bytes of real-time clock and one control byte the DS1904 does not provide random access. Reading and writing always starts with the device c ontrol byte followed by the least significant byte of the time data.

5 Analog Devices

Clock Function Command Flow Chart Figure 5 Read Clock [66h] The read clock command is used to read the device control byte and the contents of the real -time clock counter. After having received the most significant bit of the command code the device copies the actual contents of the real -time clock counter to the read/write buffer. Now the bus controller reads data beginning with the device control byte followed by the least significant byte through the most significant byte of the real-time clock. After this the bus controller may continue reading from the DS1904. The data received will be the same as in the first pass through the command flow. The read clock command can be ended at any point by issuing a Reset Pulse. C ON TROLL ER Tx CO NTR OL FUN CTION COM MAN D 66 h READ CLOCK? BU S CON TROLL ER Rx DEVICE CONTROL BYTE DS1904 COPIE S RTC CO UNT ER TO R /W BU FFER BUS C ON TROLL ER Tx RESET? Y N Y N 99 h WR ITE CL OCK? BU S CON TROLL ER Tx DEVICE CONTROL BYTE BU S CON TROLL ER Tx LS B YTE (7: 0) BU S CON TROLL ER Tx NEXT BYTE (15:8) BU S CON TROLL ER Tx NEXT BYTE (23:16) BUS C ON TROLL ER Tx RESET? N Y DS1904 COPIE S R/W BUF FER T O RTC CO UNT ER DS1904 Tx PRESENCE PULSE N Y N BU S CON TROLL ER Tx NEXT BYTE (31:24) BU S CON TROLL ER Rx LS B YTE (7: 0) BU S CON TROLL ER Rx NEXT BYTE (23:16) BU S CON TROLL ER Rx NEXT BYTE (15:8) BU S CON TROLL ER Rx NEXT BYTE (31:24) BUS C ON TROLL ER Tx RESET? N Y N

6 Analog Devices

Write Clock [99h] The write clock command is used to set the real -time clock counter and to write the device control byte. After issuing the command, the bus controller writes first the device control byte, which becomes immediately effective. After this the bus controller sends the least significant byte through the most significant byte to be written to the real -time clock c ounter. The new time data is copied from the read/write buffer to the real-time clock counter and becomes effective as the bus controller generates a reset pulse. If the oscillator is intentionally stopped, the real -time clock counter behaves as a four -byte nonvolatile memory. 1-Wire Bus System The 1-Wire bus is a system, which has a single bus controller and one or more peripherals. In all instances the DS1904 is a peripheral device. The bus controller is typically a microcontroller. The discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state during specified time slots that are initiated on the falling edge of sync pulses from the bus controller. For a more detailed protocol description, refer to Chapter 4 of the Book of iButton® Standards. Hardware Configuration Figure 6 Hardware Configuration The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open- drain or three-st ate outputs. The 1 -Wire input of the DS1904 is open drain with an internal circuit equivalent to that shown in Figure 6. A multidrop bus consists of a 1- Wire bus with multiple peripherals attached. The 1-Wire bus has a maximum data rate of 16.3kbits per second and requires a pull-up resistor of approximately 5kΩ. The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 120μs, one or more of the devices on the bus may be reset. Since the DS1904 gets all its energy for operation through its VDD pin it will not perform a power -on reset if the 1-Wire bus is low for an extended time period. Transaction Sequence The protocol for accessing the DS1904 via the 1-Wire port is as follows:

• Initialization
• ROM Function Command
• Clock Function Command BUS CONTROLLER DS1904 1-Wire PORT OPEN-DR AIN PORT PIN Rx = RECEIV E Tx = TRA NSM IT Rx Tx VPUP Rx Tx 5µA, TYP 10 0Ω MOSFET D ATA

7 Analog Devices

All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus controller followed by presence pulse(s) transmitted by the peripheral(s). The presence pulse lets the bus controller know that the DS1904 is on the bus and is ready to operate. For more details, see the 1-Wire Signaling section. ROM Function Commands Once the bus controller has detected a presence, it can issue one of the four ROM function commands that the DS1904 supports. All ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in Figure 7): Read ROM [33h] This command allows the bus controller to read the DS1904’s 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command should only be used if there is a single peripheral on the bus. If more than one peripheral is present on the bus, a data collision will occur when all peripherals try to transmit at the same time (open drain will produce a wired -AND result). The resultant family code and 48-bit serial number read by the controller will be invalid. Match ROM [55h] The match ROM command, followed by a 64-bit ROM sequence, allows the bus controller to address a specific DS1904 on a multidrop bus. Only the DS1904 that exactly matches the 64-bit ROM sequence will respond to the following clock function command. All peri pherals that do not match the 64-bit ROM sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the bus. Search ROM [F0h] When a system is initially brought up, the bus controller might not know the number of devices on the 1- Wire bus or their 64-bit ROM codes. The search ROM command allows the bus controller to use a process of elimination to identify the 64-bit ROM codes of all peripheral devices on the bus. The search ROM process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus controller performs this 3-step routine on each bit of the ROM. After one complete pass, the bus controller knows the 64-bit ROM code of one device. Additional passes will identify the ROM codes of the remaining devices. See Chapter 5 of the Book of i Button® Standards for a comprehensive discussion of a search ROM, including an actual example.

8 Analog Devices

ROM Functions Flow Chart Figure 7 33h READ ROM CO MMAND ? C ON TROLL ER Tx R OM FUN CTION COM MAN D Y N 55h MATCH ROM CO MMAND ? Y N F0h SEARCH ROM CO MMAND ? Y N CCh SKIP ROM CO MMAND ? Y N DS1904 Tx PRESENCE PULSE C ON TROLL ER Tx RESET PULSE DS1904 Tx BIT 0 DS1904 Tx BIT 0 C ON TROLL ER Tx BIT 0 C ON TROLL ER Tx BIT 0DS1904 Tx FAMIL Y CODE (1 BYTE) BIT 0 MATC H? N Y BIT 0 MATC H? Y N DS1904 Tx BIT 1 DS1904 Tx BIT 1 C ON TROLL ER Tx BIT 1 BIT 1 MATC H? N Y DS1904 Tx BIT 63 DS1904 Tx BIT 63 C ON TROLL ER Tx BIT 63 BIT 63 MATC H? N Y C ON TROLL ER Tx BIT 1 BIT 1 MATC H? Y N C ON TROLL ER Tx BIT 63 BIT 63 MATC H? N Y DS1904 Tx SERIAL NUMB ER (6 BYTES) DS1904 Tx CRC BYTE CO NTR OLLER TX CON TRO L FUN CTION COM MAN D (SEE FIGURE 5)

9 Analog Devices

Skip ROM [CCh] This command can save time in a single drop bus system by allowing the bus controller to access the clock functions without providing the 64-bit ROM code. If more than one peripheral is present on the bus and, for example, a read command is issued following the Skip ROM command, data collision will occur on the bus as multiple peripherals transmit simultaneously (open drain pull-downs will produce a wired- AND result). 1-Wire Signaling The DS1904 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, and Read Data. Except for the presence pulse, the bus controller initiates all of these signals. The initialization sequence required to begin any communication with the DS1904 is shown in Figure 8. A reset pulse followed by a presence pulse indicates the DS1904 is ready to send or receive data. The bus controller transmits (Tx) a reset pulse (tRSTL, minimum 480μs). The bus peripheral then releases the line and goes into receive mode (R x). The 1-Wire bus is pulled to a high state via the pull -up resistor. After detecting the rising edge on the data line, the DS1904 waits (tPDH, 15-60μs) and then transmits the presence pulse (tPDL, 60-240μs). Initialization Procedure “Reset and Presence Pulses” Figure 8 Read/Write Time Slots The definitions of write and read time slots are illustrated in Figure 9. The controller initiates all time slots by driving the data line low. The falling edge of the data line synchronizes the DS1904 to the controller by triggering an internal delay circ uit. During write time slots, the delay circuit determines when the DS1904 will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit determines how long the DS1904 will hold the data line low. If the data bit is a “1”, the DS1904 will not hold the data line low at all. VPULLUPMIN CONTROLLER RX “PRESENCE PULSE ” VPUL LUP VI HM IN VILM AX CONTROLLER TX “RESET PULSE ” tRSTL tRSTH 48 0µs < tRSTL < ∞* 15 µs < tPDH < 60µs 60 µs < tPDL < 240µs CO NTR OLLER DS1904 RESISTOR tPDHtR tPDL * IN ORDER NOT TO MAS K INTERRUPT SIGNALING B Y OTHER DEVI CES ON THE 1-Wire BUS , tRSTL + tR SH OULD ALWAYS BE LESS THAN 960µs. ** INCLUDES RE COVERY TIME

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Read/Write Timing Diagram Figure 9 VPUL LUP VIH MIN VIL MA X VPULLUP MIN WRITE-ONE TIME SLOT CO NTR OLLER RESISTOR 60 µs ≤ tSLOT < 120µs 1µ s ≤ tLOW1 < 15µs 1µ s < tREC < ∞ tSLOT tREC DS1904 SAMPLING WINDOW 60 µs 15 µs tLOW1 VIH MIN VIL MA X VPULLUP MIN WRITE-ZERO TIME SLOT VPUL LUP CO NTR OLLER RESISTOR 60 µs ≤ tLOW0 < tSLOT < 120µs 1µ s < tREC < ∞ tSLOT tREC DS1904 SAMPLING WINDOW tLOW0 15 µs 60 µs VPUL LUP VIH MIN VIL MA X VPULLUP MIN READ-DATA TIME SLOT CO NTR OLLER DS1904 RESISTOR 60 µs ≤ tSLOT < 120µs 1µ s ≤ tLOWR < 15µs 0 ≤ tRELE ASE < 45µs tLOWR tSLOT tSU tRELE ASE CO NTR OLLER SAMPLING WINDOW tREC tR DV 1µ s ≤ tREC < ∞ tR DV = 15µs tSU < 1µs

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Size See mechanical drawing Weight 3.3g Expected Service Life See Lifetime Graph Absolute Maximum Ratings *Storage or operation above +50°C significantly reduces battery life. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. (TA = -40°C to +85°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES 1-Wire Pull-up Voltage VPUP 2.8 6.0 V 1, 2 Logic 1 VIH 2.2 6.0 V 1 Logic 0 VIL -0.3 0.8 V 1, 3 Output Logic Low at 4mA VOL 0.4 V 1 Input Load Current IL 5 µA 4 Capacitance (TA = +25°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Capacitance 1-Wire CIN 50 pF 5 (VPUP = 2.8V to 6.0V, TA = -40°C to +85°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Time Slot tSLOT 60 120 µs Write 1 Low Time tLOW1 1 15 µs Write 0 Low Time tLOW0 60 120 µs Read Low Time tLOWR 1 15 µs Read Data Valid tRDV exactly 15 µs 6 Release Time tRELEASE 0 15 45 µs Read Data Setup tSU 1 µs 7 Recovery Time tREC 1 µs Reset High Time tRSTH 480 µs Reset Low Time tRSTL 480 960 µs 8 Presence Detect High tPDH 15 60 µs Presence Detect Low tPDL 60 240 µs RTC Accuracy at +25°C -2 +2 min/mth 9 Note 1: All voltages are referenced to ground.

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Note 2: VPUP = external pull-up voltage; see Figure 6. Note 3: Under certain low voltage conditions VIL1MAX may have to be reduced to as much as 0.5V to always guarantee a presence pulse. Note 4: Input load is to ground. Note 5: Guaranteed by design; not production tested. Note 6: The controller must read while the data is valid. Note 7: Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is guaranteed to be valid within 1μs of this falling edge. Note 8: The reset low time (tRSTL) should be restricted to a maximum of 960µs to allow interrupt signaling, otherwise it could mask or conceal interrupt pulses. Note 9: This specification applies if the 1-Wire is idle (high or low). Communication on the 1-Wire may adversely affect the accuracy of the device. For highest accuracy, connect the DS1904 to a separate 1-Wire port and limit the access to the minimum acceptable by the application. Product Lifetime vs. Temperature

Package Information

For the latest package outline information and land patterns (footprints), go to the Package Index on the Analog Devices website. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. F5 iButton IB#5CB 21-0266 — F5 iButton IB+5CB 21-0266 —

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Revision History

2/00 Initial release — 8/09 Added # to the Ordering Information to reflect the conversion to an RoHS-compliant product. 1 Updated the UL certificate reference in the Common iButton Features and Physical Specification sections; relocated VPUP from the DC Electrical Characteristics global header to the table and deleted the VOH parameter; added reference to Figure 6 to the EC table note 2; added the Package Information section. 1, 11, 12 6/12 Changed the upper temperature limit from +70°C to +85°C; added lifetime graph; renumbered Electrical Characteristics table notes. 1, 11, 12 6/13 Deleted UL certificate references 1, 11 11/23 Added lead-free part number; updated hyperlinks 1, 2, 12 © 2023 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.