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The DS89C450 evaluation kit (EV kit) is a proven platform to conveniently evaluate the capabilities of the ultra-high-speed flash microcontroller family. The kit contains the DS89C450 in a DIP-40 socket, 128kB of SRAM mapped through a preprogrammed CPLD, a power-supply regulator, two DB9 serial connectors, and switches and LEDs to control and display board operation. With the addition of a power supply and an RS-232 cable connected to a personal computer, the EV kit provides a completely functional system ideal for application development and debug. The DS89C450 EV kit can also be used as a programming and development platform for the DS5000(T). Quick-start instructions and sample programs for the DS5000(T) can be obtained from the DS5000 directory on the software tool disk, or from Maxim technical support at https://support.maxim-ic.com/micro EVALUATION KIT CONTENTS DS89C450 Evaluation Kit Board with Processor and 16.384MHz Crystal Installed 8051-Based Microcontroller Software Eval Disk
FEATURES
Easily Load Code Using Bootstrap Loader and Serial 0 Port (DB9, J2) Two DB9 RS-232 Serial Connectors DB9 Serial Cable Two Internal Serial Ports On-Board Power Supply Regulator 128kB of On-Board Program + Data RAM Preprogrammed Xilinx CPLD Handles Address Multiplexing and RAM Mapping LED Display of Port 0 Levels Pushbutton Switches for Reset and Interrupt Generation Prototyping Area Board Schematics Included to Provide a Convenient Reference Design
ORDERING INFORMATION
DS89C450-KIT# Room Approx. 16cm x 10cm #Denotes a RoHS-compliant device that may include lead(Pb) that is exempt under the RoHS requirements. Figure 1. DS89C450 Evaluation Kit Board
DESIGNATION QTY DESCRIPTION SUPPLIER PART C1, C6 2 100F, 25V radial capacitors Panasonic ECA-1EM101 C2, C7 2 22F, 10V tantalum capacitors Panasonic ECS-T1AX226R C3, C4, C5, C8–C15 11 0.1F capacitors (0805) Generic — C16, C17 2 22pF capacitors Panasonic ECJ-2VC1H220J J1 1 2mm male power-barrel connector CUI Inc. PJ-002A J2, J3 2 DB9 RS-232 female connectors Amp/Tyco 745781-4 J4 1 Micro header pins (unpopulated) — — J5 1 Spare input header pins (unpopulated) — — JP1, JP2 2 Solder pad jumpers (closed) — — R1, R4 2 1.1k resistors (0805) Generic — R2, R3 2 10k resistors (0805) Generic — R5 1 680 resistor (0805) Generic — RN1, RN3, RN4 3 330 resistor pack (8) CTS 770101331 RN2 1 3.3k resistor pack (8) CTS 770101332 SW1, SW4, SW5 3 DIP swit ches x8 C&K SDA08H1BD SW2, SW3 2 SPST pushbu tton Panasonic EVQ-PAC04M U1 1 350mA linear regulator (5V) Maxim MAX1659ESA+ U2 1 350mA linear regulator (3.3V) Maxim MAX1658ESA+ U3 1 DS89C450 microcontroller (40-pin PDIP) Maxim DS89C450-MNL+ U4 1 Quad buffer Fairchild 74AC125 U5 1 Preprogrammed 44-pin CPLD Xilinx XC9536XL- 10PCG44C U6 1 128k x 8 asynchronous cache SRAM Cypress CY7C1009D-10VXI U7 — Unpopulated — — U8 1 RS-232 transceiver (2 Tx, 2 Rx) Maxim MAX233ACWP+ U9 1 Inverting octal buffer Fairchild 74AC540 U10 1 LED x10 display (Port 1 + power) Lumex SSA-LXB10IW-GF/LP Y1 1 16.384MHz crystal (socke ted) Citizen HC49US16.384MABJ
Figure 2. DS89C450 Evaluation Kit Board Layout Microcontroller User’s Guide. documentation disk. However, a short description of the major components of the board follows. and MAX1659 regulators produce fixed 5V and 3.3V for use by the kit circuitry. level much higher than their labeled output value if they are lightly loaded.
Both serial ports of the DS89C450 (Serial Port 0 and Serial Port 1) are translated to RS-232 levels and brought out to DB9 connectors at J2 and J3. Serial Port 0 (J2) must always be used when communicating with the bootloader. Memory The external memory of the DS89C450 on this EV kit is designed to operate with the address and data bus multiplexed on P0 and P2. A 128kB x 8 SRAM is installed, which is accessed as both program and data memory by this multiplexed bus. Note that as the total memory space of the DS89C450 is only 64kB of program memory and 64K of data memory, port pin memory banking must be used to access the entire 128kB-memory space. CPLD The CPLD device on the EV kit board is preprogrammed to perform several functions. Address latching of the low 8 bits of the external memory address from port P0. Mapping together program and data memory. Performing port pin memory banking (optional). The RTL code preprogrammed into the CPLD is as follows. module Eval(AD, nRD, ALE, nPSEN, CFG0, CFG1, SW_IN, P1, A, A16, A17, nOE, SW_OUT); input [7:0] AD; // Multiplexed low-order address and data from micro input nRD; // Data memory read enable from micro input ALE; // Address latch enable from micro input nPSEN; // Program memory read enable from micro input CFG0; // Configuration input zero (from DIP switch) input CFG1; // Configuration input one (from DIP switch) input SW_IN; // Interrupt switch input (from pushbutton) inout [7:0] P1; // Port 1 from micro output [7:0] A; // Demultiplexed low-order address to RAM output A16; // Address line to RAM output A17; // Address line to RAM output nOE; // Output enable to RAM output SW_OUT; // Interrupt switch output (to micro) reg [7:0] A; always @(negedge ALE) begin A <= AD; end assign A16 = (CFG0 == 0) ? P1[0] : 1'b0; assign A17 = (CFG0 == 0) ? P1[1] : 1'b0; assign P1[0] = (CFG1 == 0) ? SW_IN : 1'bz; assign P1[1] = (CFG1 == 0) ? SW_IN : 1'bz; assign P1[2] = (CFG1 == 0) ? SW_IN : 1'bz; assign P1[3] = (CFG1 == 0) ? SW_IN : 1'bz; assign P1[4] = (CFG1 == 0) ? ~SW_IN : 1'bz; assign P1[5] = (CFG1 == 0) ? ~SW_IN : 1'bz; assign P1[6] = (CFG1 == 0) ? ~SW_IN : 1'bz; assign P1[7] = (CFG1 == 0) ? ~SW_IN : 1'bz; assign nOE = nRD & nPSEN; assign SW_OUT = SW_IN; endmodule
Switch SW4.1 automatically activates the run/load signals. For loader mode, turn SW4.1 ON. For run mode, turn these switches should be OFF for proper operation. Turn ing DIP switch SW4.3 ON causes the high address lines A16 and A17 to be set to the values at port pins P1.0 and P1.1. This can be used for address banking, but is not required for normal operation. Turning DIP switch SW4.4 on puts the CPLD into a test mode; press SW3 to toggle the LEDs. Pushbuttons Reset and interrupt pushbuttons are provided. The rese t button resets the DS89C450, while the interrupt button can be configured to pull down either the INT0 (by setting SW1.4 ON) or T0 (by setting SW1.5 ON) inputs to the microcontroller when pressed. Header Pins and Prototyping Area Header J4 provides access to all pins of the DS89C450, including power and ground. This header is adjacent to a 0.100”-spaced grid prototyping area for circuit development. GETTING STARTED Before using the DS89C450 EV kit, the Microcontroller Tool Kit (MTK) application should be installed. MTK is included on the CD and is available at www.maxim-ic.com/products/microcontrollers/software/index.cfm. 1) Connect the DC 6V–9V, center post positive power supply to the power plug J1. 2) Connect a DB9 straight-through serial c able between the PC COM1 port and connector J2. 4) Turn power ON. All the LEDs should lig ht except for the second from the right. 5) Open MTK. In the initial dialog box, select the type of processor you are using (DS89C430, DS89C440, or DS89C450). 6) Select Options Configure Serial Port from the menu. Enter COM1 and 14400 baud. 7) Select Target Open COM1 at 14400 baud. 8) Select Target Connect to Loader. 9) A loader banner should appear, as shown in Figure 3. Refer to the user’s guide for more details on the boot loader commands for the DS89C450. To load an application into the DS89C450 flash memory, first enter “K” at the bootloader prompt to erase the flash, then select File -> Load Flash and open the .hex file you wish to load. The Help menu in MTK provides additional information. The bootloader also allows you to write to Port 1 directly by entering “W P1 xx,” where xx is a hex byte value. If you enter a value such as “W P1 55” or “W P1 AA,” the LED display will change to reflect the new outputs at Port 1.
Figure 3. Microcontroller Tool Kit Output programming of the DS5000(T). For more information on the DS89C450 and to download the IC data sheet, go to www.maxim-ic.com/DS89C450. The DS89C450 EV kit schematics are featured in the following pages.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products.
REVISION HISTORY
071707 Changed U6 Cypress part number to CY7C1009BN-12VC in the Components List
and in the schematic sheet 4 of 6 2 080907 Added information about switch SW4.1; updated schematic sheet 6 of 6 (corrected references of SW1.1–SW1.8 to SW4.1–SW1.8) 5
090707 Added “for the DS500(T)” to the General Description describing where to go for
DS5000(T) instructions and sample programs (for clarification) 1 Changed the ordering number from DS89C450-K00 to DS89C450-KIT# (added RoHS changes); updated the Component List part numbers for SW1 and U5, and changed the part numbers to lead(Pb)-free for U1, U2, U3, and U8; changed the Technical Support section to Using the DS89C450 EV Kit with the DS5000(T) 1, 2, 6
P1[7..0] RST P3[5..0] AD[7..0] A[15..8] XTAL2 XTAL1 nPSEN ALE nWR nRD nEA_IN Size Document Number Sheet o f Copyright (C) 2003 - Dallas Semiconductor / MAXIM 87-2C420-KIT Rev BDS89C450 Evaluation Kit - Power and Header A 1 6Friday, August 03, 2007 22uF 10v 1 2 U1 MAX1659 SET 1 SHDN2 IN33 OUT4 4 OUT5 5IN66 IN77 GND 8 TP8 VCC3 + C6 100uF, 25v 1 2 TP7 VCC5 TP9 GND JP1 Solder Jumper (closed) 1 2 Header 2x20 P1.0/T2 1P1.1/T2EX 2P1.2/RXD1 3 P1.4/INT2 5P1.5/nINT3 6 P1.3/TXD1 4 P0.0/AD039 P0.1/AD138 P0.2/AD237 P0.3/AD336 P0.4/AD435 P0.5/AD534 P0.633 P0.732 VCC40 22uF 10v 1 2 U2 MAX1658 SET 1 SHDN2 IN33 OUT4 4 OUT5 5IN66 IN77 GND 8 + C1 100uF, 25v 1 2 PJ-002A IN 1 G1 2 G2 3 JP2 Solder Jumper (closed) 1 2 C14 100nF 10v 1 2
AD[7..0] A[15..8] ALE P3[5..0] P1[7..0] RST nPSEN nLOADER XTAL1 XTAL2 nEA_IN nEA_OUT nWR nRD Size Document Number Sheet o f Copyright (C) 2003 - Dallas Semiconductor / MAXIM 87-2C420-KIT Rev BDS89C450 Evaluation Kit - Processor A 2 6Friday, August 03, 2007 U4C 74AC125 12 11 C16 22pF 10v 1 2 DS89C4X0 P1.0/T21 P1.1/T2EX2 P1.2/RXD13 P1.4/INT25 P1.5/INT36 P1.3/TXD14 P1.6/INT47 P1.7/INT58 RST9 P3.0/RXD010 P3.1/TXD011 P3.2/INT012 P3.3/INT113 P3.4T014 P3.5/T115 P3.6/WR16 P3.7/RD17 XTAL2 18 XTAL1 19 GND 20 P2.0/A8 21 P2.1/A9 22 P2.2/A10 23 P2.3/A11 24 P2.4/A12 25 P2.5/A13 26 P2.6/A14 27 P2.7/A15 28 PSEN29 ALE 30 EA31 P0.0/AD0 39 P0.1/AD1 38 P0.2/AD2 37 P0.3/AD3 36 P0.4/AD4 35 P0.5/AD5 34 P0.6/AD6 33 P0.7/AD7 32 VCC40 C17 22pF 10v 1 2 U4B 74AC125 5 6
16.384 MHz
AD[7..0] nRD ALE nPSEN CFG0 CFG1 SW_IN P1[7..0] A16 A17 nOE A[7..0] SW_OUT Size Document Number Sheet o f Copyright (C) 2003 - Dallas Semiconductor / MAXIM 87-2C420-KIT Rev BDS89C450 Evaluation Kit - CPLD A 3 6Friday, August 03, 2007 TP2 TDI TP1 TCK XC9536XL GNDa 10 GNDb 23 GNDc 31 VCCINTa21 VCCINTb41 VCCIO32 AD137 AD234 AD333 AD439 AD542 AD627 AD744 nRD4 ALE5 nPSEN2 CFG022 CFG140 SW_IN25 P106 P1119 P127 A1 1 A2 43 A3 24 A4 3 A5 8 A6 11 A7 14 A16 38 A17 35 nOE 29 SW_OUT 20 P1328 P1418 P159 P1613 P1712 TCK17 TDI15 TDO30 TMS16 AD036 A0 26 TP6 GND TP5 TMS TP3 +3 V TP4 TDO
AD[7..0] A[7..0] nWR A[15..8] A16 nOE A17 AD[7..0] A[7..0] nWR A[15..8] A16 nOE A17 Size Document Number Sheet o f Copyright (C) 2003 - Dallas Semiconductor / MAXIM 87-2C420-KIT Rev BDS89C450 Evaluation Kit - RAM A 4 6Friday, August 03, 2007 OPTIONAL SECOND RAM CY7C1009BN-12VC A012 A111 A210 A39 A48 A57 A66 A75 A827 A926 A1023 A1125 A124 A1328 A143 A1531 A162 VCC32 D0 13 D1 14 D2 15 D3 17 D4 18 D5 19 D6 20 D7 21 nOE24 nWE29 NC1 nCE122 CE230 GND 16 CY7C1009BN-12VC A012 A111 A210 A39 A48 A57 A66 A75 A827 A926 A1023 A1125 A124 A1328 A143 A1531 A162 VCC32 D0 13 D1 14 D2 15 D3 17 D4 18 D5 19 D6 20 D7 21 nOE24 nWE29 NC1 nCE122 CE230 GND 16
TX1_232 TX0_232 RX0_232 RX1_232 P17 P16 P15 P14 P13 P12 P11 P10P10 P11 P12 P13 P14 P15 P16 P17 VCC5 VCC5 VCC5VCC3 RX0 RX1 TX1 TX0 RX1_232 TX1_232 nLED P1[7..0] Size Document Number Sheet o f Copyright (C) 2003 - Dallas Semiconductor / MAXIM 87-2C420-KIT Rev BDS89C450 Evaluation Kit - Serial / Port 1 A 5 6Friday, August 03, 2007 SERIAL PORT 0 LOADER SERIAL PORT 1 10-SEGMENT RED LED TURN ON TO PULL PORT 1 LINES LOW 74AC540 nOE11 nOE219 I02 I13 I24 I35 I46 I57 I68 I79 GND 10VCC20 nO0 18 nO1 17 nO2 16 nO3 15 nO4 14 nO5 13 nO6 12 nO7 11 U11 MAX203ECWP VCC7 T1OUT 5 T2OUT 18 R1IN 4 R2IN 19 C2+ 12 C2b+ 15 C2- 16 C2b- 11 T1IN2 T2IN1 R1OUT3 R2OUT20 C1+13 C1-14 V-10 Vb-17 V+8 GNDa6 GNDb 9 DB9 RS232 FEMALE DB9 RS232 FEMALE RN4 RESISTOR SIP - 330 OHM SW5 SW DIP-8 RN3 RESISTOR SIP - 330 OHM 1 2
680 Ohm
SW_OUT RX1 TX1 P30 P31 P32 P34 P12 P13 RST nEA_INnEA_OUT TX1_232 RX1_232 nLOADER nLED CFG0 CFG1 SW_IN Size Document Number Sheet o f Copyright (C) 2003 - Dallas Semiconductor / MAXIM 87-2C420-KIT Rev BDS89C450 Evaluation Kit - Switches/Config A 6 6Friday, August 03, 2007 SW1.1 - ON FOR DS89C4x0 SW1.2 - ON TO USE SERIAL PORT 0 / LOADER SW1.3 - ON TO USE SERIAL PORT 0 / LOADER SW1.4 - ON TO CONNECT SW3 AND nINT0 SW1.5 - ON TO CONNECT SW3 AND T0 SW1.6 - ON TO USE SERIAL PORT 1 SW1.7 - ON TO USE SERIAL PORT 1 SW1.8 - OFF FOR NORMAL USE RESET PUSHBUTTON SW4.1 - ON FOR LOADER MODE SW4.2 - ON TO ENABLE LEDs SW4.3 - OFF FOR NORMAL USE SW4.4 - OFF FOR NORMAL USE SW4.5 - UNUSED SW4.6 - UNUSED SW4.7 - UNUSED SW4.8 - UNUSED INTERRUPT PUSHBUTTON SW3 B3FS-1000 1 2 3 4 SPARE INPUTS RN1 RESISTOR SIP - 330 OHM 1 2 SW1 SW DIP-8 10k 1 2 SW4 SW DIP-8 10k 1 2 RN2 RESISTOR SIP - 3.3 K 1.1k 1 2 SW2 B3FS-1000 1 2 3 4 1.1 K 1 2