DS8313

DS8313 MAXIM | Alldatasheet

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Technical content

Features

♦ Analog Interface and Level Shifting for IC Card Communication ♦ ±8kV (min) ESD (HBM) Protection on Card Interfaces ♦ Ultra-Low Stop-Mode Current, Less Than 10nA Typical ♦ Internal IC Card Supply-Voltage Generation 5.0V ±5%, 80mA (max) 3.0V ±8%, 65mA (max) 1.8V ±10%, 30mA (max) ♦ Automatic Card Activation and Deactivation Controlled by Dedicated Internal Sequencer ♦ I/O Lines from Host Directly Level Shifted for Smart Card Communication ♦ Flexible Card Clock Generation, Supporting External Crystal Frequency Divided by 1, 2, 4, or 8 ♦ High-Current, Short-Circuit and High-Temperature Protection ♦ Low Active-Mode Current DS8313/DS8314 Smart Card Interface

Ordering Information

19-4655; Rev 1; 5/09 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. PART TEMP RANGE PIN-PACKAGE DS8313-RRX+ -40 °C to +85°C 28 SO DS8313L-RRX+* -40 °C to +85°C 28 SO DS8314-RRX+* -40 °C to +85°C 28 SO DS8314L-RRX+* -40 °C to +85°C 28 SO Note: Contact the factory for availability of other variants and package options. +Denotes a lead(Pb)-free/RoHS-compliant package. *Future product—contact factory for availability. Typical Application Circuit, Pin Configuration, and Selector Guide appear at end of data sheet. Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of a ny device may be simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata.

RECOMMENDED DC OPERATING CONDITIONS (VDD = +3.3V, VDDA = +5.0V, TA = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless otherwise noted in the CONDITIONS column.) (Note 1) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage Range on All Other Pins Specification. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLY Digital Supply Voltage V DD 2.7 6.0 V Card Voltage-Generator Supply Voltage V DDA DS8313, DS8314 4.75 6.0 V VTH2 Threshold voltage (falling) 2.35 2.45 2.65 V Reset Voltage Thresholds VHYS2 Hysteresis 50 100 150 mV CURRENT CONSUMPTION Active V DD Current 5V Cards (Including 80mA Draw from 5V Card) IDD_50V ICC = 80mA, f XTAL = 20MHz, fCLK = 10MHz, V DDA = 5.0V 80.75 85 mA Active V DD Current 5V Cards (Current Consumed by DS8313/DS8314 Only) IDD_IC ICC = 80mA, fXTAL = 20MHz, fCLK = 10MHz, VDDA = 5.0V (Note 2) 0.75 5 mA Active V DD Current 3V Cards (Including 65mA Draw from 3V Card) IDD_30V ICC = 65mA, f XTAL = 20MHz, fCLK = 10MHz, V DDA = 5.0V 65.75 70 mA Active V DD Current 3V Cards (Current Consumed by DS8313/DS8314 Only) IDD_IC ICC = 65mA, fXTAL = 20MHz, fCLK = 10MHz, VDDA = 5.0V (Note 2) 0.75 5 mA Active V DD Current 1.8V Cards (Including 30mA Draw from 1.8V Card) IDD_18V ICC = 30mA, f XTAL = 20MHz, fCLK = 10MHz, V DDA = 5.0V 30.75 40 mA Active V DD Current 1.8V Cards (Current Consumed by DS8313/DS8314 Only) IDD_IC ICC = 30mA, fXTAL = 20MHz, fCLK = 10MHz, VDDA = 5.0V (Note 2) 0.75 5 mA Inactive-Mode Current I DD Card inactive, active-high PRES, DS8313/DS8314 not in stop mode 50 40 μA Stop-Mode Current I DD_STOP DS8313/DS8314 in ultra-low-power stop mode (CMDVCC, 5V/3V, and 1_8V set to logic 1) (Note 3) 10 μA

RECOMMENDED DC OPERATING CONDITIONS (continued) (VDD = +3.3V, VDDA = +5.0V, TA = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless otherwise noted in the CONDITIONS column.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CLOCK SOURCE Crystal Frequency f XTAL External crystal (Note 1) 0 20 MHz fXTAL1 (Note 1) 0 20 MHz VIL_XTAL1 Low-level input on XTAL1 -0.3 0.3 x VDDXTAL1 Operating Conditions VIH_XTAL1 High-level input on XTAL1 0.7 x VDD VDD + 0.3 V External Capacitance for Crystal CXTAL1, CXTAL2 15 pF Internal Oscillator f INT 2.2 2.7 3.4 MHz SHUTDOWN TEMPERATURE Shutdown Temperature T SD +150 °C RST PIN Output Low Voltage V OL_RST1 I OL_RST = 1mA 0 0.3 V Card-Inactive Mode Output Current I OL_RST1 V OL_RST = 0 0 -1 mA Output Low Voltage V OL_RST2 I OL_RST = 200μA 0 0.3 V Output High Voltage VOH_RST2 I OH_RST = -200μA VCC -

0.5 V CC V

Rise Time t R_RST C L = 30pF (Note 1) 0.1 μs Fall Time t F_RST C L = 30pF (Note 1) 0.1 μs Current Limitation I RST(LIMIT) -20 +20 mA Card-Active Mode RSTIN to RST Delay t D(RSTIN-RST) 2 μs CLK PIN Output Low Voltage V OL_CLK1 IOLCLK = 1mA 0 0.3 V Card-Inactive Mode Output Current I OL_CLK1 V OLCLK = 0 0 -1 mA Output Low Voltage V OL_CLK2 I OLCLK = 200μA 0 0.3 V Output High Voltage VOH_CLK2 IOHCLK = -200μA VCC - Rise Time t R_CLK C L = 30pF (Notes 1, 4) 8 ns Fall Time t F_CLK C L = 30pF (Notes 1, 4) 8 ns Current Limitation I CLK(LIMIT) -70 +70 mA Clock Frequency f CLK Operational 0 10 MHz Duty Factor C L = 30pF 45 55 % Card-Active Mode Slew Rate SR C L = 30pF (Note 1) 0.2 V/ns VCC PIN Output Low Voltage V CC1 I CC = 1mA 0 0.3 V Card-Inactive Mode Output Current I CC1 V CC = 0 0 -1 mA

RECOMMENDED DC OPERATING CONDITIONS (continued) (VDD = +3.3V, VDDA = +5.0V, TA = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless otherwise noted in the CONDITIONS column.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DS8313: ICC(5V) < 80mA, VDDA = 4.75V (Note 1) 4.65 5 5.25 DS8313: ICC(5V) < 65mA 4.75 5 5.25 DS8313: ICC(3V) < 65mA 2.78 3 3.24 DS8313: ICC(1.8V) < 30mA 1.64 1.8 1.98 DS8314: 65mA < ICC(5V) < 80mA 4.55 5 5.25 DS8314: ICC(5V) < 65mA 4.75 5 5.25 DS8314: ICC(3V) < 65mA 2.78 3 3.24 DS8314: ICC(1.8V) < 30mA 1.64 1.8 1.98 5V card; current pulses of 40nC with I < 200mA, t < 400ns, f < 20MHz 4.6 5.4 3V card; current pulses of 24nC with I < 200mA, t < 400ns, f < 20MHz 2.75 3.25 Output Low Voltage V CC2 1.8V card; current pulses of 12nC with I < 200mA, t < 400ns, f < 20MHz 1.62 1.98 V VCC(5V) = 0 to 5V -80 VCC(3V) = 0 to 3V -65 Output Current I CC2 VCC(1.8V) = 0 to 1.8V -30 mA Shutdown Current Threshold ICC(SD) (Note 1) 120 mA Card-Active Mode Slew Rate V CCSR Up/down; C < 300nF (Note 5) 0.05 0.16 0.22 V/μs DATA LINES (I/O AND I/OIN) I/O I/OIN Falling Edge Delay t D(IO-IOIN) (Note 1) 200 ns Pullup Pulse Active Time t PU (Note 1) 100 ns Maximum Frequency f IOMAX 1 MHz Input Capacitance C I 10 pF I/O PIN Output Low Voltage V OL_IO1 I OL_IO = 1mA 0 0.3 V Output Current I OL_IO1 V OL_IO = 0 0 -1 mA Card-Inactive Mode Internal Pullup Resistor RPU_IO To V CC 9 11 19 k Output Low Voltage V OL_IO2 IOL_IO = 1mA 0 0.3 V IOH_IO = < -20μA 0.8 x V CC V CCOutput High Voltage VOH_IO2 IOH_IO = < -40μA (3V/5V) 0.75 x V CC V CC V Output Rise/Fall Time tOT C L = 30pF (Note 1) 0.1 μs Input Low Voltage V IL_IO -0.3 +0.8 Card-Active Mode Input High Voltage V IH_IO 1.5 V CC V

RECOMMENDED DC OPERATING CONDITIONS (continued) (VDD = +3.3V, VDDA = +5.0V, TA = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless otherwise noted in the CONDITIONS column.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Low Current I IL_IO VIL_IO = 0 600 μA Input High Current I IH_IO V IH_IO = VCC 20 μA Input Rise/Fall Time t IT 1.2 μs Current Limitation I IO(LIMIT) C L = 30pF -15 +15 mA Card-Active Mode Current When Pullup Active IPU C L = 80pF, VOH = 0.9 x V DD -1 mA I/OIN PIN Output Low Voltage V OL I OL = 1mA 0 0.3 V Output High Voltage V OH I OH < -40μA 0.75 x VDD VDD + 0.1 V Output Rise/Fall Time t OT C L = 30pF, 10% to 90% 0.1 μs Input Low Voltage V IL -0.3 0.3 x VDD V Input High Voltage V IH 0.7 x VDD VDD + 0.3 V Input Low Current I IL_IO V IL = 0 600 μA Input High Current I IH_IO V IH = VDD 10 μA Input Rise/Fall Time t IT V IL to VIH 1.2 μs Integrated Pullup Resistor R PU Pullup to V DD 9 11 13 k Current When Pullup Active I PU C L = 30pF, VOH = 0.9 x V DD -1 mA CONTROL PINS (CLKDIV1, CLKDIV2, CMDVCC, RSTIN, 5V/ 3V, 1_8V) Input Low Voltage V IL -0.3 0.3 x VDD V Input High Voltage V IH 0.7 x VDD VDD + 0.3 V Input Low Current I IL_IO 0 < V IL < VDD 5 μA Input High Current I IH_IO 0 < V IH < VDD 5 μA INTERRUPT OUTPUT PIN (OFF) Output Low Voltage V OL I OL = 2mA 0 0.3 V Output High Voltage V OH I OH = -15μA 0.75 x VDD V Integrated Pullup Resistor R PU Pullup to V DD 16 24 32 k PRES PIN Input Low Voltage V IL_PRES 0.3 x VDD V Input High Voltage V IH_PRES 0.7 x VDD V

RECOMMENDED DC OPERATING CONDITIONS (continued) (VDD = +3.3V, VDDA = +5.0V, TA = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless otherwise noted in the CONDITIONS column.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Low Current I IL_PRES VIL_PRES = 0 5 μA Input High Current I IH_PRES VIH_PRES = VDD 10 μA TIMING Activation Time t ACT 50 220 μs Deactivation Time t DEACT 50 80 100 μs Window Start t 3 50 130 CLK to Card Start Time Window End t 5 140 220 μs PRES Debounce Time t DEBOUNCE 5 8 11 ms Note 1: Operation guaranteed at -40°C and +85°C but not tested. Note 2: IDD_IC measures the amount of current used by the DS8313 to provide the smart card current minus the load. Note 3: Stop mode is enabled by setting CMDVCC, 5V/3V, and 1_8V to a logic-high. Note 4: Parameters are guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the maximum rise and fall time is 10ns. Note 5: Parameter is guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the minimum slew rate is 0.05V/µs and the maximum slew rate is 0.5V/µs.

1, 2 CLKDIV1, CLKDIV2 Clock Divider. Determines the divided-down input clock frequency (presented at XTAL1 or from a crystal at XTAL1 and XTAL2) on the CLK output pin. Dividers of 1, 2, 4, and 8 are available. 3 5V/ 3V 5V/3V Selection Pin. Allows selection of 5V or 3V for communication with an IC card. Logic-high selects 5V operation; logic-low selects 3V operation. The 1_8V pin overrides the setting on this pin if active. See Table 3 for a complete description of choosing card voltages. 4 1_8V 1.8V Operation Selection. Active-high selection for 1.8V smart card communication. An active-high signal on this pin overrides any setting on the 5V/ 3V pin. 5, 7, 8, 9, 12, 13, 27, N.C. No Connection/Don’t Care. These pins are not bonded out. 6, 18 VDDA

10 PRES

Card Presence Indicator. Active-high card presence input from the DS8313 to the microcontroller. When the presence indicator becomes active, a debounce tim eout begins. After 8ms (typ), the OFF signal becomes active. A trim optim defines whether or not the part provides active-low presence detection. 11 I/O Smart Card Data-Line Output. Card data communication line, contact C7.

14 CGND Smart Card Ground

15 CLK Smart Card Clock. Card clock, contact C3. 16 RST Smart Card Reset. Card reset output from contact C2.

17 V CC

Smart Card Supply Voltage. Decouple to CGND (card ground) with 2 x 100nF or 100 + 220nF capacitors (ESR < 100m ). 19 CMDVCC Activation Sequence Initiate. Active-low input from host. 20 RSTIN Card Reset Input. Reset input from the host.

21 V DD Supply Voltage

22 GND Digital Ground

23 OFF Status Output. Active-low interrupt output to the host. Includes a 24k integrated pullup resistor to VDD. 24, 25 XTAL1, XTAL2 Crystal/Clock Input. Connect an input from an external clock to XTAL1 or connect a crystal across XTAL1 and XTAL2. For the low idle-mode current variant, an external clock must be driven on XTAL1. 26 I/OIN I/O Input. Host-to-interface chip data I/O line.

if their card interface is active. the inputs to CLKDIV1 and CLKDIV2. of CLK is eight periods of XTAL1. tive for only eight periods of XTAL1 after the command. sition times less than 5% of the period. ting the logic 0 present on the master side. waiting for the host to initiate a smart card session.

• All card contacts are inactive (approximately 200 Ω to GND).
• The I/OIN pin in the high-impedance state (11k Ω pullup resistor to V DD).
• Voltage generators are stopped.
• XTAL oscillator is running (if included in the device).
• Voltage supervisor is active.
• The internal oscillator is running at its low frequency. Activation Sequence After power-on and the reset delay, the host microcon- troller can monitor card presence with signals OFF and CMDVCC, as shown in Table 2. DS8313/DS8314 Smart Card Interface

Table 1. Clock Frequency Selection Table 2. Card Presence Indication

3) The voltage generator is started (between t0 and t1). internal oscillator period (approximately 25µs). 6) The CLK signal is applied to the C3 contact (t 4). 3) Set RSTIN low between t3 and t5; CLK will now start. 5) RSTIN has no further effect on CLK after t 5. vation with RSTIN held permanently high. and the smart card exchange data on the I/O lines. Figure 3. Activation Sequence Using RSTIN and CMDVCC

When a session is completed, the host microcontroller sets the CMDVCC line high to execute an automatic deactivation sequence and returns the card interface to the inactive mode (Figure 5). 1) RST goes low (t 10). 2) CLK is held low (t 12 = t10 + 0.5 × T) where T is 64 times the period of the internal oscillator (approxi- mately 25µs). 3) I/O pin is pulled low (t 13 = t10 + T). 4) V CC starts to fall (t14 = t10 + 1.5 × T). 5) When V CC reaches its inactive state, the deactiva- tion sequence is complete (at tDE). 6) All card contacts become low impedance to GND; I/OIN remains at V DD (pulled up through an 11k Ω resistor). 7) The internal oscillator returns to its lower frequency. VCC Generator The V CC generator has a capacity to supply up to 80mA continuously at 5V, 65mA at 3V, and 30mA at 1.8V. An internal overload detector triggers at approxi- mately 120mA. Current samples to the detector are fil- tered. This allows spurious current pulses (with a duration of a few µs) up to 200mA to be drawn without causing deactivation. The average current must stay below the specified maximum current value. To main- tain V CC voltage accuracy, a 100nF capacitor (with an ESR < 100m Ω) should be connected to CGND and placed near the VCC pin, and a 100nF or 220nF capaci- tor (220nF is the best choice) with the same ESR should be connected to CGND and placed near the smart card reader’s C1 contact. Fault Detection The following fault conditions are monitored:

• Short-circuit or high current on V CC
• Removal of a card during a transaction DD dropping
• Card voltage generator operating out of the speci- fied values (V DDA too low or current consumption too high)
• Overheating There are two different cases (Figure 6):
• CMDVCC High Outside a Card Session. Output OFF is low if a card is not in the card reader and high if a card is in the reader. The V DD supply is monitored—a decrease in input voltage generates an internal power-on reset pulse but does not affect the OFF signal. Short-circuit and tempera- ture detection is disabled because the card is not powered up.
• CMDVCC Low Within a Card Session. Output OFF goes low when a fault condition is detected, and an emergency deactivation is performed auto- matically (Figure 7). When the system controller resets CMDVCC to high, it may sense the OFF level again after completing the deactivation sequence. This distinguishes between a card extraction and a hardware problem (OFF goes high again if a card is present). Depending on the con- nector’s card-present switch (normally closed or normally open) and the mechanical characteristics of the switch, bouncing can occur on the PRES sig- nals at card insertion or withdrawal. The DS8313/DS8314 have a debounce feature with an 8ms typical duration (Figure 6). When a card is insert- ed, output OFF goes high after the debounce time delay. When the card is extracted, an automatic deacti- vation sequence of the card is performed on the first true/false transition on PRES and output OFF goes low. Smart Card Interface

Figure 8. Stop-Mode Sequence

Performance can be affected by the layout of the appli- cation. For example, an additional cross-capacitance of 1pF between card reader contacts C2 (RST) and C3 (CLK) or C2 (RST) and C7 (I/O) can cause contact C2 to be polluted with high-frequency noise from C3 (or C7). In this case, include a 100pF capacitor between contacts C2 and CGND. Application recommendations include the following:

• Ensure there is ample ground area around the DS8313/DS8314 and the connector; place the DS8313/DS8314 very near to the connector; decou- ple the V DD and VDDA lines separately. These lines are best positioned under the connector.
• The device and the host microcontroller must use the same V DD supply. Pins CLKDIV1, CLKDIV2, RSTIN, PRES, I/OIN, 5V/ 3V, 1_8V, CMDVCC, and OFF are referenced to V DD; if pin XTAL1 is to be driven by an external clock, also reference this pin to VDD.
• Trace C3 (CLK) should be placed as far as possi- ble from the other traces.
• The trace connecting CGND to C5 (GND) should be straight (the two capacitors on C1 (VCC) should be connected to this ground trace).
• Avoid ground loops between CGND and GND.
• Decouple V DDA and V DD separately. If two sup- plies are the same in the application, they should be connected in a star on the main trace With all these layout precautions, noise should be kept to an acceptable level and jitter on C3 (CLK) should be less than 100ps. Reference layouts are available on request. Technical Support For technical support, go to https://support.maxim- ic.com/micro. Selector Guide Note: Contact the factory for availability of other variants and package options. +Denotes a lead(Pb)-free/RoHS-compliant package. *Future product—contact factory for availability. PART LOW STOP-MODE POWER LOW ACTIVE- MODE POWER PRES POLARITY V DDA INPUTS PIN-PACKAGE DS8313-RRX+ Yes Yes Positive 2 28 SO DS8313L-RRX+* Yes Yes Negative 2 28 SO DS8314-RRX+* Yes Yes Positive 1 28 SO DS8314L-RRX+* Yes Yes Negative 1 28 SO

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

28 SO W28+1 21-0042

1_8V N.C. N.C. I/OIN XTAL2 TOP VIEW XTAL1 OFF GND

21 V DD

20 RSTIN

19 CMDVCC

18 V DDA (N.C.)

16 RST

15 CLK

() INDICATES DS8314 ONLY. N.C. V DDA N.C. N.C. PRES I/O N.C. N.C. 14CGND N.C. SO DS8313 DS8314 Pin Configuration +3.3V 100kΩ *PLACE A 100nF CAPACITOR CLOSE TO DS8313 AND PLACE A 220nF CAPACITOR CLOSE TO CARD CONTACT. GPIO μC ... ... GPIO ISO_DATA 100nF* 220nF* 100nF +3.3V I/OIN CMDVCC ... RSTIN ISO_CLOCK CLKIN OFF 1_8V 5V/3V PRES CGND I/O CLK RST VCC GND VDD +10μF GND VDDA VDDA 100nF +5.0V DS8313 Typical Application Circuit

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

Revision History

0 1/09 Initial release. — Removed the TSSOP package variant from the General Description , Ordering Information, Selector Guide, and Package Information sections. 1, 16, 17 1 5/09 Changed “(IEC)” in the Features section to “(HBM)” for the “±8kV (min) ESD (HBM) Protection on Card Interfaces” bullet. 1