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Y Very low output impedanceÐhigh drive capability Y 40 mA sink and source currents Y Gating control to allow either single-ended or differen- tial operation Y High impedance output state which allows many out- puts to be connected to a common bus line Connection and Logic Diagram Dual-In-Line Package TL/F/5800 1 Top View Order Number DS8831N, DS8832J or DS8832N See NS Package Number J16A or N16A For Complete Military 883 Specificatons, See RETS Data Sheet. Order Number DS7831J/883, DS7831W/883, DS7832J/883 or DS7832W/883 See NS Package Number J16A or W16A Truth Table (Shown for A Channels Only) Differential/ ‘‘A’’ Output Disable Single-Ended Input A1 Output A1 Input A2 Output A2 Mode Control 00 0 0 Logical ‘‘1’’ or Same as Logical ‘‘1’’ or Same as Logical ‘‘0’’ Input A1 Logical ‘‘0’’ Input A2
00 X 1 Logical ‘‘1’’ or Opposite of Logical ‘‘1’’ or Same as
1 X Logical ‘‘0’’ Input A1 Logical ‘‘0’’ Input A2
X1 X X X Impedance X Impedance State State X Don’t Care TRI STATE É is a registered trademark of National Semiconductor Corp C1996 National Semiconductor Corporation RRD B30M36/Printed in U S A http:/ /www.national.com
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Output Voltage 5.5V Storage Temperature Range b65§Ct o a150§C Lead Temperature (Soldering, 4 sec.) 260 §C Maximum Power Dissipation * at 25 §C Cavity Package 1433 mW Molded Package 1362 mW *Derate cavity package 9.6 mW/ §C above 25 §C; derate molded package 10.9 mW/ §C above 25 §C. Operating Conditions Min Max Units Supply Voltage (V CC) DS7831/DS7832 4.5 5.5 V DS8831/DS8832 4.75 5.25 V Temperature (T DS7831/DS7832 b55 a125 §C DS8831/DS8832 0 a70 §C Electrical Characteristics (Notes 2 and 3) Symbol Parameter Conditions Min Typ Max Units VIH Logical ‘‘1’’ Input Voltage V CC Min 2.0 V VIL Logical ‘‘0’’ Input Voltage V CC Min 0.8 V VOH Logical ‘‘1’’ Output Voltage DS7831/DS7832 IO b40 mA 1.8 2.3 V VCC Min IO b2 mA 2.4 2.7 V DS8831/DS8832 IO b40 mA 1.8 2.5 V IO b5.2 mA 2.4 2.9 V VOL Logical ‘‘0’’ Output Voltage DS7831/DS7832 IO 40 mA 0.29 0.50 V VCC Min IO 32 mA 0.40 V DS8831/DS8832 IO 40 mA 0.29 0.50 V IO 32 mA 0.40 V IIH Logical ‘‘1’’ Input Current V CC Max DS7831/DS7832, V IN 5.5V 1 mA DS8831/DS8832, V IN 2.4V 40 mA IIL Logical ‘‘0’’ Input Current V CC Max, V IN 0.4V b1.0 b1.6 mA IOD Output Disable Current V CC Max, V O 2.4V or 0.4V b40 40 mA ISC Output Short Circuit Current V CC Max, (Note 4) b40 b100 b120 mA ICC Supply Current VCC Max in TRI-STATE 65 90 mA VCLI Input Diode Clamp Voltage V CC 5.0V, T A 25§C, I IN b12 mA b1.5 V VCLO Output Diode Clamp Voltage V CC 5.0V, I OUT b12 mA DS7831/DS8831 b1.5 VTA 25§C DS7832/DS8832 IOUT 12 mA DS7831/DS8831 VCC a 1.5 V http:/ /www.national.com 2
Switching Characteristics TA 25§C, V CC 5V, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units tpd0 Propagation Delay to a Logical ‘‘0’’ from Inputs A1, A2, B1, B2 13 25 nsDifferential Single-ended Mode Control to Outputs tpd1 Propagation Delay to a Logical ‘‘1’’ from Inputs A1, A2, B1, B2 13 25 nsDifferential Single-ended Mode Control to Outputs t1H Delay from Disable Inputs to High Impedance State (from Logical ‘‘1’’ (See Figures 4 and 5 ) 61 2n s Level) t0H Delay from Disable Inputs to High Impedance State (from Logical ‘‘0’’ 14 22 ns Level) tH1 Propagation Delay from Disable Inputs to Logical ‘‘1’’ Level (from High 14 22 ns Impedance State) tH0 Propagation Delay from Disable Inputs to Logical ‘‘0’’ Level (from High 18 27 ns Impedance State) Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Unless otherwise specified min/max limits apply across the 55§Ct o a125§C temperature range for the DS7831 and DS7832 and across the 0 §Ct o a70§C range for the DS8831 and DS8832. All typical values are for T A 25§C and V CC 5V. Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltage referenced to ground unless otherwise noted. All values shown as max or min on absolute value basis. Note 4: Applies for T A 125§C only. Only one output should be shorted at a time. Mode of Operation To operate as a quad single-ended line driver apply logical ‘‘0’’s to the output disable pins (to keep the outputs in the normal low impedance mode) and apply logical ‘‘0’’s to both Differential/Single-ended Mode Control inputs. All four channels will then operate independently and no signal in- version will occur between inputs and outputs. To operate as a dual differential line driver apply logical ‘‘0’’s to the Output Disable pins and apply at least one logi- cal ‘‘1’’ to the Differential/Single-ended Mode Control in- puts. The inputs to the A channels should be connected together and the inputs to the B channels should be connected to- gether. In this mode the signals applied to the resulting inputs will pass non-inverted on the A 2 and B 2 outputs and inverted on the A 1 and B 1 outputs. When operating in a bus-organized system with outputs tied directly to outputs of other DS7831/DS8831’s, DS7832/ DS8832’s (Figure 1), all devices except one must be placed in the ‘‘high impedance’’ state. This is accomplished by en- suring that a logical ‘‘1’’ is applied to at least one of the Output Disable pins of each device which is to be in the ‘‘high impedance’’ state. A NOR gate was purposely chosen for this function since it is possible with only two DM5442/ DM7442, BCD-to-decimal decoders, to decode as many as
100 DS7831/DS8831’s, DS7832/DS8832’s
(Figure 2). The unique device whose Disable inputs receive two logical ‘‘0’’ levels assumes the normal low impedance output state, providing good capacitive drive capability and waveform in- tegrity especially during the transition from the logical ‘‘0’’ to logical ’’1’’ state. The other outputsÐin the high impedance stateÐtake only a small amount of leakage current from the low impedance outputs. Since the logical ‘‘1’’ output current from the selected device is 100 times that of a conventional Series 54/74 device (40 mA vs. 400 mA), the output is easily able to supply that leakage current for several hundred oth- er DS7831/DS8831’s, DS7832/DS8832’s and still have available drive for the bus line (Figure 3). http:/ /www.national.com3
Typical Performance Characteristics Propagation Delay from Input to Output (Channel 1) Propagation Delay from Input to Output (Channel 1) Propagation Delay from Input to Output (Channel 2) Impedance State Delay from Disable to High Impedance State Delay from Disable to Low Capacitance Propagation Delay vs Load Frequency Total Supply Current vs vs Source Current Logical ‘‘1’’ Output Voltage vs Sink Current Logical ‘‘0’’ Output Voltage Impedance Output State I OUT vs V OUT High Differential Mode Propagation Delay in TL/F/5800 5 http:/ /www.national.com5
Typical Performance Characteristics (Continued) TL/F/5800 6 Switching Time Waveforms Input characteristic: Amplitude 3.0V Frequency 1.0 MHz, 50% duty cycle tr tf s ns (10% to 90%) TL/F/5800 7 TL/F/5800 8 FIGURE 4 http:/ /www.national.com 6
Symbol Switch S1 Switch S2 C L tpd1 closed closed 50 pF tpd0 closed closed 50 pF t0H closed closed *5p F t1H closed closed *5p F tH0 closed open 50 pF tH1 open closed 50 pF *Jig capacitance FIGURE 5 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number DS7831J, DS8831J, DS7832J or DS8832J http:/ /www.national.com7
DS7831/DS8831/DS7832/DS8832 Dual TRI-STATE Line Driver Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number DS8831N or DS8832N LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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