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Technical content
Features
♦ Two (DS4402) or Four (DS4404) Current DACs ♦ Full-Scale Range for Each DAC Determined by External Resistors ♦ 31 Settings Each for Sink and Source Modes ♦ I2C-Compatible Serial Interface ♦ Two Three-Level Address Pins Allow Nine Devices on Same I2C Bus ♦ Small Package (14-Pin TDFN) ♦ -40°C to +85°C Temperature Range ♦ 2.7V to 5.5V Operation DS4402/DS4404 Two/Four-Channel, I2C Adjustable Current DAC DC/DC CONVERTER FB OUT SDA SCL A1 OUT0 OUT1 GND RFS0 RFS1 4.7kΩ4.7kΩ VCC VCC VOUT0 FS0 FS1 R0B R0A DS4402 DC/DC CONVERTER FB OUT VOUT1 R1B R1A Typical Operating Circuit
Ordering Information
19-4641; Rev 3; 5/09 +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel. *EP = Exposed pad. PART TEMP RANGE PIN-PACKAGE DS4402N+ -40°C to +85°C 14 TDFN-EP* DS4402N+T&R -40°C to +85°C 14 TDFN-EP* DS4404N+ -40°C to +85°C 14 TDFN-EP* DS4404N+T&R -40°C to +85°C 14 TDFN-EP* TDFN TOP VIEW VCC OUT1 SCL FS3 (N.C.) FS2 (N.C.) *EXPOSED PAD ( ) INDICATES FOR DS4402 ONLY. + 14 OUT3 (N.C.) OUT2 (N.C.) SDA 3 12GND 6 9 A0FS1 7 8 OUT0FS0 DS4404/ DS4402 *EP (3mm × 3mm × 0.8mm) Pin Configuration
Two/Four-Channel, I2C Adjustable Current DAC ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS (TA = -40°C to +85°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage Range on VCC, SDA, and SCL Voltage Range on A0, A1, FS0, FS1, FS2, FS3, OUT0, OUT1, OUT2, and OUT3 Relative to CC + 0.5V) (Not to exceed 6.0V.) J-STD-020 Specification PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V CC (Note 1) 2.7 5.5 V Input Logic 1 (SDA, SCL, A0, A1) V IH 0.7 x V CC V CC + 0.3 V Input Logic 0 (SDA, SCL, A0, A1) V IL -0.3 0.3 x V CC V DC ELECTRICAL CHARACTERISTICS (VCC = +2.7V to +5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DS4402 500 Supply Current I CC VCC = 5.5V (Note 2) DS4404 500 μA Input Leakage (SDA, SCL) I IL V CC = 5.5V 1 μA Output Leakage (SDA) I L 1 μA VOL = 0.4V 3 Output Current Low (SDA) I OL VOL = 0.6V 6 mA Address Input Resistors R IN 240 k Reference Voltage V REF 1.23 V I/O Capacitance C I/O 10 pF OUTPUT CURRENT CHARACTERISTICS (VCC = +2.7V to +5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output Voltage for Sinking Current V OUT:SINK (Note 3) 0.5 V CC V Output Voltage for Sourcing Current VOUT:SOURCE (Note 3) 0 VCC - 0.5 V Full-Scale Sink Output Current I OUT:SINK (Note 3) 0.5 2.0 mA Full-Scale Source Output Current I OUT:SOURCE (Note 3) -2.0 -0.5 mA Output-Current Full-Scale Accuracy IOUT:FS +25°C, VCC = 4.0V; using ideal R FS resistor; V OUT:SINK = 0.5V; VOUT:SOURCE = VCC - 0.8V 2.5 5.0 % Output-Current Temperature Drift I OUT:TC (Note 4) 70 ppm/°C
Two/Four-Channel, I2C Adjustable Current DAC Note 1: All voltages with respect to ground. Currents entering the IC are specified positive, and currents exiting the IC are negative. Note 2: Supply current specified with all outputs set to zero current setting with all inputs (except A1 and A0, which can be open) driven to well-defined logic levels. SDA and SCL are connected to VCC. Excludes current through RFS resistors (IRFS). Total current including IRFS is ICC + (2 x IRFS). Note 3: The output-voltage full-scale current ranges must be satisfied to ensure the device meets its accuracy and linearity specifications. Note 4: Temperature drift excludes drift caused by external resistor. Note 5: Differential linearity is defined as the difference between the expected incremental current increase with respect to position and the actual increase. The expected incremental increase is the full-scale range divided by 31. Note 6: Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value. The expected value is a straight line between the zero and the full-scale values proportional to the setting. Note 7: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C standard-mode timing. Note 8: CB—total capacitance of one bus line in pF. OUTPUT CURRENT CHARACTERISTICS (continued) (VCC = +2.7V to +5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output-Current Power-Supply Rejection Ratio DC 0.33 %/V Output Leakage Current at Zero Current Setting IZERO -1 +1 μA Output-Current Differential Linearity DNL (Note 5) 0.5 LSB Output-Current Integral Linearity INL (Note 6) 1 LSB I2C AC ELECTRICAL CHARACTERISTICS (VCC = +2.7V to +5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency f SCL (Note 7) 0 400 kHz Bus Free Time Between STOP and START Conditions tBUF 1.3 µs Hold Time (Repeated) START Condition tHD:STA 0.6 µs Low Period of SCL t LOW 1.3 µs High Period of SCL t HIGH 0.6 µs Data Hold Time t DH:DAT 0 0.9 µs Data Setup Time t SU:DAT 100 ns START Setup Time t SU:STA 0.6 µs SDA and SCL Rise Time t R (Note 8) 20 + 0.1CB 300 ns SDA and SCL Fall Time t F (Note 8) 20 + 0.1CB 300 ns STOP Setup Time t SU:STO 0.6 µs SDA and SCL Capacitive Loading C B (Note 8) 400 pF
Figure 1. Functional Diagram 1 1 SDA I 2C Serial Data. Input/output for I 2C data. 2 2 SCL I 2C Serial Clock. Input for I 2C clock. 9, 11 9, 11 A0, A1 Address Select Inputs. Tri-level inputs (V CC, GND, N.C.) determine the I2C slave address. See the Detailed Description section for the nine available device addresses. — — EP Exposed Pad. Leave unconnected or connect to GND.
On power-up, the DS4402/DS4404 output zero current. had a chance to modify the device’s setting. get the most out of its 5-bit sink or source resolution. it defaults to providing zero output current on power-up. by the regulator to reach its steady state operating point. which the power supply can be controlled or margined. weak internal resistors that pull the pins to mid-supply. Table 1. Slave Addresses Figure 2. I2C Address Inputs
to the memory addresses listed in Table 2. clock pulses, START and STOP conditions. ates a low-power mode for slave devices. the master to initiate a new data transfer with a slave. a STOP condition. See Figure 3 for applicable timing. START condition. See Figure 3 for applicable timing. shifted into the device during the rising edge of the SCL. Table 2. Memory Addresses
device is not receiving data. acknowledgement is read using the bit-read definition. sponding to the state of A0 and A1. nication until the next START condition is sent. memory location where the slave is to store the data. NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN). Figure 3. I2C Timing Diagram
Two/Four-Channel, I2C Adjustable Current DAC Applications Information Example Calculations for an Adjustable Power Supply Using the typical circuit, assuming a typical output volt- age of 2.0V, a feedback voltage of 0.8V, R1 = 500 Ω, and R2 = 333 Ω, to adjust or margin the supply 20% requires a full-scale current equal to [(0.2 x 2.0V) / 500Ω = 800µA]. Using Equation 1, R FS can be calculat- ed [RFS = (VREF / 800µA) x (31 / 4) = 11.9k Ω]. The cur- rent DAC in this configuration allows the output voltage to be stepped linearly from 1.6V to 2.4V using 63 set- tings. This corresponds to a resolution of 12.7mV/step. Power-Supply Feedback Voltage The feedback voltage for adjustable power supplies must be between 0.5V and V CC - 0.5V for the DS4402/ DS4404 to properly sink/source currents for adjusting the voltage. I2C Reset on Address Change In addition to defining the I2C slave address, the DS4402/ DS4404 address select inputs have an alternate function. Changing the address select inputs resets the I2C inter- face. This function aborts the current transaction and puts the SDA driver into a high-impedance state. This hard- ware reset function should never be required because it is achievable through software, but it does provide an alternative way of resetting the I 2C interface, if needed. VCC Decoupling To achieve the best results when using the DS4402/ DS4404, decouple the power supply with a 0.01µF or 0.1µF capacitor. Use a high-quality ceramic surface- mount capacitor if possible. Surface-mount compo- nents minimize lead inductance, which improves performance, and ceramic capacitors tend to have adequate high-frequency response for decoupling applications. Layout Considerations Care should be taken to ensure that traces underneath the DS4402/DS4404 do not short with the exposed pad. The exposed pad should be connected to the signal ground, or can be left unconnected. SLAVE ADDRESS* START START a7 a6 a5 a4 a3 a2 a1 R/W SLAVE ACK SLAVE ACK SLAVE ACK MSB LSB MSB LSB MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 READ/ WRITE REGISTER/MEMORY ADDRESS b7 b6 b5 b4 b3 b2 b1 b0 DATA STOP SINGLE BYTE WRITE -WRITE RESISTOR F9h TO 00h SINGLE BYTE READ -READ RESISTOR F8h START REPEATED START A1h MASTER NACK STOP1 0100000 11111 000 F8h 10100 001 1 0100000 11111 001 A0h F9h STOP DATA EXAMPLE I2C TRANSACTIONS (WHEN A0 AND A1 ARE N.C.) TYPICAL I2C WRITE TRANSACTION *THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PINS A0 AND A1 (SEE TABLE 1). 00 000 000 A0h SLAVE ACK SLAVE ACK SLAVE ACK SLAVE ACK SLAVE ACK SLAVE ACK Figure 4. I2C Communication Examples
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
14 TDFN-EP T1433+1 21-0137
Two/Four-Channel, I2C Adjustable Current DAC Heaney Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. is a registered trademark of Dallas Semiconductor Corporation.
Revision History
0 4/06 Initial release. — 2 10/08 Added the I/O capacitance (C I/O) parameter to the DC Electrical Characteristics table. 2 3 5/09 In the Output Current Characteristics table, added VOUT:SINK = 0.5V; VOUT:SOURCE = VCC = 0.8V to the IOUT:FS conditions. 2