DS38EP100_13 TI1 | Alldatasheet
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ZDiff = 100: ZDiff = 100: PASSIVE BACKPLANE/CABLE INTERCONNECT Tx/Rx LINE CARD Rx/Tx SWITCH CARD IOA+ IOA- IOB+ IOB- DS38EP100 ZDiff = 100:Tx/Rx Rx/Tx DS38EP100 www.ti.com SNLS278C –JULY 2007–REVISED APRIL 2013 DS38EP1001to5Gbps,Power-SaverEqualizerforBackplanesandCables Check forSamples: DS38EP100 1FEATURES DESCRIPTION TI’s Power-saver equalizer compensates for 2• 1 to5 Gbps Operation transmissionmedium lossesand minimizesmedium-• No Power or Ground Required induced deterministicjitter.Performanceis ensured
- EqualizationEffectiveAnywhere inData Path overthefullrange of1 to5 Gbps. The DS38EP100 requiresno power tooperate.The equalizeroperates• EqualizesCML, LV-PECL, LVDS Signals anywhere inthedatapathtominimizemedia-induced• Symmetric I/OStructuresProvideEqual Boost deterministicjitterinbothFR4 and cableapplications.forBi-directionalOperation Symmetric I/O structuressupportfullduplexor half
- 7 dB Maximum Boost duplexapplications.Linearcompensationisprovided independentoflinecodingor protocol.The deviceis• Code Independent,8b/10bor Scrambled idealforbothbi-leveland multi-levelsignaling.• Supports Both Bi-leveland Multi-level The equalizerisavailableina 6 pinleadlessWSONSignaling package with a space saving 2.2 mm X 2.5 mm• Extends Reach Over Backplanes and Cables footprint.This tiny package provides maximum• Compatible withPCI-ExpressGen1 and Gen2 flexibilityinplacementand routingofthePower-saver
- Compatible withXAUI equalizer.
- Operates inSerieswithExistingActive Equalizer
- Easy toHandle 6 Pin WSON SimplifiedApplicationDiagram NOTE The DS38EP100 providestheflexibilityofpassingthedatafromeithersideofthedevice. Itcan be placedanywhere inthedatapath.. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2007–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNLS278C –JULY 2007–REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS Pin Name Pin Number I/O,Type Description High Speed DifferentialI/O IOA- 3 I/O SymmetricdifferentialI/O. IOA+ 1 IOB- 4 I/O SymmetricdifferentialI/O. IOB+ 6 NC 2,5 N/A Reserved. Exposed DAP Do notconnect. Pad Pin Diagram 2.2mm × 2.5mm 6-PinWSON Package Bottom View These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings (1)(2) INPUT/OUTPUT (IOA+ and IOB+) or(IOA-and IOB-) +2V (IOA+ and IOA-)or(IOB+ and IOB-) +4V (IOA+ and IOB-)or(IOA-and IOB+) +4V JunctionTemperature +150°C StorageTemperature −65°C to+150°C Lead Temperature Soldering,4 sec +260°C ESD Rating HBM, 1.5kΩ,100 pF 1.3kV (1) “AbsoluteMaximum Ratings”indicatelimitsbeyond whichdamage tothedevicemay occur,includinginoperabilityand degradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximum Ratingsor otherconditionsbeyond thoseindicatedintheRecommended OperatingConditionsisnotimplied.The Recommended Operating Conditionsindicateconditionsatwhichthedeviceisfunctionaland thedeviceshouldnotbe operatedbeyond such conditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. Recommended OperatingConditions Min Typ Max Units OperatingTemperature −40 25 +85 °C BitRate 1 5 Gbps
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www.ti.com SNLS278C –JULY 2007–REVISED APRIL 2013 ElectricalCharacteristics(1) Over recommended operatingconditionsunlessotherspecified.Allparametersareensuredby test,statisticalanalysisor design. TypSymbol Parameter Conditions Min Max Units(2) VIN Inputvoltageswing See (3) 1000 3600 mVp-p Equalization 2.5GHz relativeto100MHz 6 dB Differentialinputreturn 100 MHz – 2.5GHz, withfixture's effectde- 15 dBR LI loss embedded Differentialoutput 100 MHz – 2.5GHz, withfixture's effectde- 15 dBR LO returnloss embedded. IOA+,orIOB+ = statichigh. DifferentialacrossIOA+ and IOA-,orIOB+ and 100 ΩR IN InputImpedance IOB-,ZLOAD = 100Ω DifferentialacrossIOA+ and IOA-,orIOB+ and 100 ΩR O OutputImpedance IOB-,ZSOURCE = 100Ω ThroughResponse Relativetoidealload,see Figure2 forsetup See Figure3 and Table1 forlimits ResistanceIOA+ toR1 150 ΩIOA-and IOB+ toIOB- No load,highimpedance on allports ResistanceIOA+ toR2 50 ΩIOB+ and IOA-toIOB- No load,highimpedance on allports ResistanceIOA+ toR3 150 ΩIOB-and IOA-toIOB+ No load,highimpedance on allports DC Gain 0.4 (IOA/IOBorIOB/IOA) ZLOAD = 100Ω 2.5Gbps, 40 inof6milmicrostripFR4ResidualdeterministicDJ1 0.1 UIp-p jitter See (4) 3.125Gbps, 40 inof6milmicrostripFR4ResidualdeterministicDJ2 0.1 0.15 UIp-p jitter See (4)(5) 3.8Gbps, 40 inof6milmicrostripFR4ResidualdeterministicDJ3 0.1 0.15 UIp-p jitter See (4)(5) 5 Gbps, 30 inof6milmicrostripFR4ResidualdeterministicDJ4 0.1 UIp-p jitter See (4) (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Typicalvaluesrepresentmost likelyparametricnorms,TA = +25 degC, and attheRecommended OperatingConditionsatthetimeof productcharacterizationand arenotensured. (3) DifferentialsignaltoEqualizer,measured attheinputtoa transmissionline,see pointA ofFigure1.The transmissionlineisZ0 = 100Ω, 6-mil,microstripinFR4 material. (4) Deterministicjitterismeasured atthedifferentialoutputs(pointC ofFigure1),minus thedeterministicjitterbeforethetestchannel(point A ofFigure1).Testpattern:PRBS- 7 . (5) Specificationisensuredby characterizationand isnottestedinproduction. Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS38EP100
FREQUENCY (GHz) S21 (dB) 0 3 5 7 91 VNA Source d 0.5 in DUAL 50: MICROSTRIP LINE = Edge-Mounted SMA Connector VNA DetectorDS38EP100 d 0.5 in DUAL 50: MICROSTRIP LINE Signal Source FR4 Test Channel 0 in < L < 40 in = Edge-Mounted SMA Connector Oscilloscope Test Board DS38EP100 B CA DS38EP100 SNLS278C –JULY 2007–REVISED APRIL 2013 www.ti.com TestSetup Diagrams Figure1. TransientTestSetup Diagram Figure2. Frequency Response TestCircuit TypicalEqualizerTransferFunction Figure3. TypicalEqualizerTransferFunction
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www.ti.com SNLS278C –JULY 2007–REVISED APRIL 2013 Table1.TypicalThrough Response Frequency (GHz) DS38EP100 AttenuationTyp (dB) 0.1 -7.98 0.5 -5.93 1 -3.53 1.5 -2.25 2 -1.58 3 -1.14 4 -1.26 5 -1.54 6 -1.99 7 -2.62 8 -3.26 9 -3.61 10 -4.26 Block Diagram Figure4. SimplifiedBlock Diagram
APPLICATION INFORMATION
DS38EP100 DEVICE DESCRIPTION The DS38EP100 Power-Saver equalizerisa passivenetworkcircuitcomposed of resistive,capacitive,and inductivecomponents (See Figure4).A differentialbridgedT-networkcompensates forthetransmissionmedium lossesand minimizesmedium-induceddeterministicjitterwithFR4 and cables.The equalizerattenuateslow frequencysignalsand isa bandpass filterattheresonantfrequency.The responseislinearand symmetric. I/OTERMINATIONS The DS38EP100 I/Oimpedance is100Ω differential.The equalizerisdesignedfor100Ω-balanceddifferential signalsand isnotintendedforsingle-endedtransmission. LINEAR COMPENSATION The uniquelinearcompensationfeatureof the DS38EP100 combined withthe tinypackage allowsmaximum flexibilityin placement.The equalizercan be placedanywhere in the data path and willprovidethe same compensationatthereceivingcircuit.(See SimplifiedApplicationDiagram) SYMMETRIC I/OSTRUCTURES The symmetry of the passive equalizationnetwork allowsbi-directionaloperation.Signalsreceiveequal compensationregardlessofthedirectionofdataflow.(See Figure4). Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS38EP100
FR4 LENGTH (in) 0.2 0.4 0.6 0.8 EYE HEIGHT (V)
3.8 Gbps
5 Gbps
FR4 LENGTH (in) 0.2 0.4 0.6 0.8 EYE HEIGHT (V)
1.5 Gbps
2.5 Gbps
FR4 LENGTH (in) 0.1 0.2 0.3 0.4 0.5 DJ (UI FR4 LENGTH (in) 0.1 0.2 0.3 0.4 0.5 DJ (UI SNLS278C –JULY 2007–REVISED APRIL 2013 www.ti.com PCB LAYOUT CONSIDERATIONS FOR DIFFERENTIAL PAIRS AND NO CONNECT PADS The differentialI/Osmust have a controlleddifferentialimpedance of100Ω.Itispreferabletoroutealldifferential linesexclusivelyon one layeroftheboard.The use ofviasshouldbe avoidedifpossible.Ifviasmust be used, they shouldbe used sparinglyand must be placedsymmetricallyforeach sideof a givendifferentialpair. Differentialsignalsshouldbe routedaway fromothersignalsand noisesourceson theprintedcircuitboard.Pin 2,Pin 5,and thecenterDAP have tobe leftas a no connect.Therefore,do notconnectthelandingpads of thesepinsto the power or ground plane.See AN-1187 (SNOA401 ) foradditionalinformationon the WSON package. TYPICAL PERFORMANCE CHARACTERISTICS Figure5.ResidualDeterministicJitter Figure6.ResidualDeterministicJitter vs. vs. FR4 Length FR4 Length Figure7.Eye Height Figure8.Eye Height vs. vs. FR4 Length FR4 Length
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www.ti.com SNLS278C –JULY 2007–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) TypicalEye Diagrams — IncludesTransmitterSetup,Interconnect,and Device TotalJitter Figure9.UnequalizedSignal(40inFR4, 2.5Gbps,PRBS7) Figure10. EqualizedSignal(40inFR4, 2.5Gbps,PRBS7) Figure11.EqualizedSignal(Zoom) (40inFR4, 2.5Gbps, Figure12. UnequalizedSignal(40inFR4, 3.125Gbps, PRBS7) PRBS7) Figure13.EqualizedSignal(40inFR4, 3.125Gbps,PRBS7) Figure14.EqualizedSignal(Zoom) (40inFR4, 3.125Gbps, PRBS7) Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS38EP100
SNLS278C –JULY 2007–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Figure15.UnequalizedSignal(40inFR4, 3.8Gbps,PRBS7) Figure16.EqualizedSignal(40inFR4, 3.8Gbps,PRBS7) Figure17.EqualizedSignal(Zoom) (40inFR4, 3.8Gbps, Figure18.UnequalizedSignal(30inFR4, 4.25Gbps,PRBS7) PRBS7) Figure19.EqualizedSignal(30inFR4, 4.25Gbps,PRBS7) Figure20.EqualizedSignal(Zoom) (30inFR4, 4.25Gbps, PRBS7)
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www.ti.com SNLS278C –JULY 2007–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Figure21.UnequalizedSignal(30inFR4, 5Gbps, PRBS7) Figure22.EqualizedSignal(30inFR4, 5Gbps, PRBS7) Figure23.EqualizedSignal(Zoom) (30inFR4, 5Gbps, Figure24.UnequalizedSignal(34inTyco XAUI Backplane, PRBS7) 3.125Gbps,PRBS7) Figure25.EqualizedSignal(34inTyco XAUI Backplane, Figure26.EqualizedSignal(Zoom) (34inTyco XAUI 3.125Gbps,PRBS7) Backplane,3.125Gbps,PRBS7) Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS38EP100
SNLS278C –JULY 2007–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Figure27.UnequalizedSignal(5m 28AWG HDMI Cable, Figure28.EqualizedSignal(5m 28AWG HDMI Cable, 3.4Gbps,PRBS7) 3.4Gbps,PRBS7) Figure29.EqualizedSignal(Zoom) (5m 28AWG HDMI Figure30.UnequalizedSignal(10m 26AWG HDMI Cable, Cable,3.4Gbps,PRBS7) 2.25Gbps,PRBS7) Figure31.EqualizedSignal(10m 26AWG HDMI Cable, Figure32.EqualizedSignal(Zoom) (10m 26AWG HDMI 2.25Gbps,PRBS7) Cable,2.25Gbps,PRBS7)
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www.ti.com SNLS278C –JULY 2007–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Figure33.UnequalizedSignal(10m 24AWG PCIe Cable, Figure34.EqualizedSignal(10m 24AWG PCIe Cable, 2.5Gbps,PRBS7) 2.5Gbps,PRBS7) Figure35.EqualizedSignal(Zoom) (10m 24AWG PCIe Figure36.UnequalizedSignal(10m 24AWG PCIe Cable, Cable,2.5Gbps,PRBS7) 5Gbps, PRBS7) Figure37.EqualizedSignal(10m 24AWG PCIe Cable, Figure38.EqualizedSignal(Zoom) (10m 24AWG PCIe 5Gbps, PRBS7) Cable,5Gbps, PRBS7) Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS38EP100
SNLS278C –JULY 2007–REVISED APRIL 2013 www.ti.com
REVISION HISTORY
Changes from RevisionB (April2013)toRevisionC Page
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www.ti.com 25-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples DS38EP100SD/NOPB ACTIVE WSON NGF 6 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 38S DS38EP100SDX/NOPB ACTIVE WSON NGF 6 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 38S (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS38EP100SD/NOPB WSON NGF 6 1000 210.0 185.0 35.0 DS38EP100SDX/NOPB WSON NGF 6 4500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 Pack Materials-Page 2
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