DS3680 TI | Alldatasheet

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QUAD TELEPHONE RELAY DRIVER SLRS014C – MARCH 1986 – REVISED SEPTEMBER 1995 Copyright  1995, Texas Instruments Incorporated 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

  • Designed for –52-V Battery Operation
  • 50-mA Output Current Capability
  • Input Compatible With TTL and CMOS
  • High Common-Mode Input Voltage Range
  • Very Low Input Current
  • Fail-Safe Disconnect Feature
  • Built-in Output Clamp Diode
  • Direct Replacement for National DS3680 and Fairchild mA3680

description

The DS3680 telephone relay driver is a monolithic integrated circuit designed to interface –48-V relay systems to TTL or other systems in telephone applications. It is capable of sourcing up to 50 mA from standard –52-V battery power. To reduce the effects of noise and IR drop between logic ground and battery ground, these drivers are designed to operate with a common-mode input range of ± 20 V referenced to battery ground. The common-mode input voltages for the four drivers can be different, so a wide range of input elements can be accommodated. The high-impedance inputs are compatible with positive TTL and CMOS levels or negative logic levels. A clamp network is included in the driver outputs to limit high-voltage transients generated by the relay coil during switching. The complementary inputs ensure that the driver output is off as a fail-safe condition when either output is open. The DS3680 is characterized for operation from 0°C to 70°C. IN + IN – 15 kW OUT BAT GND BAT NEG schematic diagram (each driver)

1 IN+

1 IN–

2 IN–

2 IN+

3 IN+

3 IN–

4 IN–

1 OUT

2 OUT

3 OUT

4 OUT

4 IN+

(TOP VIEW) symbol (each driver) BAT GND OUT BAT NEG IN + IN – All resistor values shown are nominal. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

QUAD TELEPHONE RELAY DRIVER SLRS014C – MARCH 1986 – REVISED SEPTEMBER 1995

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) NOTES: 1. All voltages are with respect to BAT GND, unless otherwise specified. 2. Differential input voltages are at the noninverting input terminal IN+ with respect to the inverting input terminal IN–. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C DERATING FACTOR TA = 70°CPACKAGE A POWER RATING ABOVE T A = 25°C A POWER RATING D 950 mW 7.6 mW/°C 608 mW N 1150 mW 9.2 mW/°C 736 mW recommended operating conditions MIN MAX UNIT Supply voltage, VBAT– –10 –60 V Input voltage, either input –20† 20 V High-level differential input voltage, VIDH 2 20 V Low-level differential input voltage, VIDL –20† 0.8 V Operating free-air temperature, TA 0 70 °C † The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for input voltage levels. electrical characteristics over recommended operating free-air temperature range, VBAT– = –52 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP ‡ MAX UNIT IIH High level input current (into IN+) VID = 2 V 40 100 mAIIH High-level input current (into IN+ ) VID = 7 V 375 1000 mA IIL Low level input current (into IN+) VID = 0.4 V 0.01 5 mAIIL Low-level input current (into IN+ ) VID = – 7 V –1 –100 mA VO(on) On-stage output voltage IO = 50 mA, VID = 2 V –1.6 –2.1 V IO( ff) Off stage output current VO =V BAT VID = 0.8 V –2 –100 mAIO(off) Off-stage output current VO = VBAT– Inputs open –2 –100 mA IR Clamp diode reverse current VO = 0 2 100 mA VOK Output clamp voltage IO = 50 mA 0.9 1.2 VVOK O utput clamp voltage IO = –50 mA, VBAT– = 0 –0.9 –1.2 V IBAT(on) On-state battery current All drivers on –2 –4.4 mA IBAT(off) Off-state battery current All drivers off –1 –100 mA ‡ All typical values are at TA = 25°C.

QUAD TELEPHONE RELAY DRIVER SLRS014C – MARCH 1986 – REVISED SEPTEMBER 1995

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

3 IN –

3 IN +

4 IN –

4 IN +

2 IN –

2 IN +

1 IN –

9 DS3680

K1 – K4 50-V Relay Coils – 50 mA MAX BAT GND BAT NEG Figure 3. Relay Driver

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS3680D Active Production SOIC (D) | 14 50 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 DS3680 DS3680D.A Active Production SOIC (D) | 14 50 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 DS3680 DS3680DE4 Active Production SOIC (D) | 14 50 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 DS3680 DS3680N Active Production PDIP (N) | 14 25 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 DS3680N DS3680N.A Active Production PDIP (N) | 14 25 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 DS3680N (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) DS3680D D SOIC 14 50 506.6 8 3940 4.32 DS3680D.A D SOIC 14 50 506.6 8 3940 4.32 DS3680DE4 D SOIC 14 50 506.6 8 3940 4.32 DS3680N N PDIP 14 25 506 13.97 11230 4.32 DS3680N.A N PDIP 14 25 506 13.97 11230 4.32 Pack Materials-Page 1

www.ti.com PACKAGE OUTLINE C TYP6.2 5.8

1.75 MAX

12X 1.27 14X 0.51 0.31 7.62 TYP0.25 0.13 0 - 8 0.25 0.10 0.25 GAGE PLANE 1.27 0.40 A NOTE 3 8.75 8.55 B NOTE 4 4.0 3.8 4220718/A 09/2016 SOIC - 1.75 mm max heightD0014A SMALL OUTLINE INTEGRATED CIRCUIT NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm, per side. 5. Reference JEDEC registration MS-012, variation AB. 1 14

0.25 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 1.800

www.ti.com EXAMPLE BOARD LAYOUT (5.4)

0.07 MAX

0.07 MIN

14X (1.55) 14X (0.6) 12X (1.27) (R0.05) TYP 4220718/A 09/2016 SOIC - 1.75 mm max heightD0014A SMALL OUTLINE INTEGRATED CIRCUIT SYMM SYMM LAND PATTERN EXAMPLE SCALE:8X 7 8 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (5.4) 12X (1.27) 14X (0.6) 14X (1.55) 4220718/A 09/2016 SOIC - 1.75 mm max heightD0014A SMALL OUTLINE INTEGRATED CIRCUIT NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 7 8 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:8X

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