DS34C87TMX TI1 | Alldatasheet
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www.ti.com SNLS376B –MAY 1998–REVISED APRIL 2013 DS34C87TCMOS QuadTRI-STATEDifferentialLineDriver Check forSamples: DS34C87T 1FEATURES DESCRIPTION The DS34C87T is a quad differentiallinedriver 2• TTL InputCompatible designedfordigitaldata transmissionover balanced• TypicalPropagationDelays:6 ns lines.The DS34C87T meets allthe requirementsof
- TypicalOutput Skew: 0.5ns EIA standardRS-422 whileretainingthe low power characteristicsof CMOS. This enables the• Outputs Won't Load LineWhen VCC = 0V constructionof serialand terminalinterfaceswhile• Meets theRequirements ofEIA Standard RS- maintainingminimalpower consumption.422 The DS34C87T acceptsTTL or CMOS inputlevels• Operationfrom Single5V Supply and translatesthese to RS-422 outputlevels.This• TRI-STATE Outputs forConnection toSystem partuses specialoutputcircuitrythatenables the Buses individualdriverstopower down withoutloadingdown thebus.Thisdevicehas separateenablecircuitryfor• Low QuiescentCurrent each pairof the fourdrivers.The DS34C87T ispin• AvailableinSurfaceMount compatibletotheDS3487T. All inputsare protectedagainstdamage due to electrostaticdischargeby diodestoVCC and ground. Connection and Logic Diagrams Top View Figure2. Logic Diagram See PIN DESCRIPTIONS fordetails. Figure1. PDIP Package See Package Numbers D0016A or NFG0016E Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 1998–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNLS376B –MAY 1998–REVISED APRIL 2013 www.ti.com TruthTable(1) Input Control Non-Inverting Inverting Input Output Output H H H L L H L H X L Z Z (1) L = Low logicstate H = Highlogicstate X = Irrelevant Z = TRI-STATE (highperformance) These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1)(2)(3)(4) SupplyVoltage(VCC ) −0.5to7.0V DC Voltage(VIN) −1.5toVCC +1.5V DC OutputVoltage(VOUT ) −0.5to7V Clamp DiodeCurrent(IIK ,IOK ) ±20 mA DC OutputCurrent,perpin(IOUT ) ±150 mA DC VCC orGND Current(ICC ) ±150 mA StorageTemperatureRange (TSTG ) −65°C to+150°C Maximum Power Dissipation(PD )@ 25°C (5) Lead Temperature(TL) (Soldering4 sec) 260°C Thisdevicedoes not meet 2000V ESD rating.(6) (1) Unlessotherwisespecified,allvoltagesarereferencedtoground.Allcurrentsintodevicepinsarepositive;allcurrentsoutofdevice pinsarenegative. (2) AbsoluteMaximum Ratingsarethosevaluesbeyond whichthesafetyofthedevicecannotbe specified.They arenotmeant toimply thatthedeviceshouldbe operatedattheselimits.The tableof“ElectricalCharacteristics”provideconditionsforactualdeviceoperation. (3) ESD Rating:HBM (1.5kΩ,100 pF) Inputs≥ 1500V Outputs≥ 1000V EIAJ (0Ω,200 pF) AllPins≥ 350V (4) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications. (5) Ratingsapplytoambienttemperatureat25°C. Above thistemperaturederateNFG0016E Package 13.89mW/ °C, and D0016A Package 9.80mW/ °C. (6) ESD Rating:HBM (1.5kΩ,100 pF) Inputs≥ 1500V Outputs≥ 1000V EIAJ (0Ω,200 pF) AllPins≥ 350V OperatingConditions Min Max Units SupplyVoltage(VCC ) 4.50 5.50 V DC InputorOutputVoltage(VIN,VOUT ) 0 VCC V OperatingTemperatureRange (TA)DS34C87T −40 +85 °C InputRiseorFallTimes (tr,tf) 500 ns
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www.ti.com SNLS376B –MAY 1998–REVISED APRIL 2013 DC ElectricalCharacteristics(1) VCC = 5V ±10% (unlessotherwisespecified) Parameter TestConditions Min Typ Max Units VIH HighLevelInput 2.0 V Voltage VIL Low LevelInput 0.8 V Voltage VOH HighLevelOutput V IN = VIH orVIL, 2.5 3.4 V Voltage IOUT = −20 mA VOL Low LevelOutput V IN = VIH orVIL, 0.3 0.5 V Voltage IOUT = 48 mA VT DifferentialOutput R L = 100 Ω 2.0 3.1 V Voltage See (2) |VT|–|VT| DifferenceIn R L = 100 Ω 0.4 V DifferentialOutput See (2) VOS Common Mode R L = 100 Ω 2.0 3.0 V OutputVoltage See (2) |VOS – VOS | DifferenceIn R L = 100 Ω 0.4 V Common Mode Output See (2) IIN InputCurrent V IN = VCC ,GND, VIH,orVIL ±1.0 μA ICC QuiescentSupply IOUT = 0 μA, Current V IN = VCC orGND 200 500 μA V IN = 2.4Vor0.5V(3) 0.8 2.0 mA IOZ TRI-STATE Output V OUT = VCC orGND ±0.5 ±5.0 μA Leakage Current Control= VIL ISC OutputShort V IN = VCC orGND −30 −150 mA CircuitCurrent See (2)and (4) IOFF Power OffOutput VCC = 0V VOUT = 6V 100 μA Leakage Current See (2) VOUT = −0.25V −100 μA (1) Unlessotherwisespecified,min/max limitsapplyacrossthe−40°C to85°C temperaturerange.AlltypicalsaregivenforVCC = 5V and TA = 25°C. (2) See EIA SpecificationRS-422 forexacttestconditions. (3) Measured perinput.AllotherinputsatVCC orGND. (4) Thisisthecurrentsourcedwhen a highoutputisshortedtoground.Onlyone outputata timeshouldbe shorted. Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS34C87T
SNLS376B –MAY 1998–REVISED APRIL 2013 www.ti.com SwitchingCharacteristics(1) VCC = 5V ±10%, tr,tf ≤ 6 ns (Figure3,Figure4,Figure5,Figure6) Parameter TestConditions Min Typ Max Units tPLH ,tPHL PropagationDelayInputtoOutput S1 Open 6 11 ns Skew See (2) S1 Open 0.5 3 ns tTLH ,tTHL DifferentialOutputRiseAnd FallTimes S1 Open 6 10 ns tPZH OutputEnableTime S1 Closed 12 25 ns tPZL OutputEnableTime S1 Closed 13 26 ns tPHZ OutputDisableTime(3) S1 Closed 4 8 ns tPLZ OutputDisableTime(3) S1 Closed 6 12 ns C PD Power DissipationCapacitance(4) 100 pF C IN InputCapacitance 6 pF (1) Unlessotherwisespecified,min/max limitsapplyacrossthe−40°C to85°C temperaturerange.AlltypicalsaregivenforVCC = 5V and TA = 25°C. (2) Skew isdefinedas thedifferenceinpropagationdelaysbetween complementaryoutputsatthe50% point. (3) Outputdisabletimeisthedelayfromthecontrolinputbeingswitchedtotheoutputtransistorsturningoff.The actualdisabletimesare lessthanindicateddue tothedelayadded by theRC timeconstantoftheload. (4) C PD determinestheno loaddynamicpower consumption,PD = C PD V2CC f+ ICC VCC ,and theno loaddynamiccurrentconsumption,IS = C PD VCC f+ ICC . Comparison TableofSwitchingCharacteristicsinto“LS-Type” Load (1) VCC = 5V,TA = +25°C, tr ≤ 6 ns,tf ≤ 6 ns (Figure6,Figure7,Figure8,Figure9,Figure10,Figure11) DS34C87 DS3487 Parameter TestConditions Units Typ Max Typ Max tPLH ,tPHL PropagationDelay 6 10 10 15 ns InputtoOutput Skew See (2) 1.5 2.0 ns tTHL ,tTLH DifferentialOutputRise 4 7 10 15 ns and FallTimes tPHZ OutputDisableTime C L = 50 pF,R L = 200Ω, 8 11 17 25 ns See (3) S1 Closed,S2 Closed tPLZ OutputDisableTime C L = 50 pF,R L = 200Ω, 7 10 15 25 ns See (3) S1 Closed,S2 Closed tPZH OutputEnableTime C L = 50 pF,R L = ∞, 11 19 11 25 ns S1 Open, S2 Closed tPZL OutputEnableTime C L = 50 pF,R L = 200Ω, 14 21 15 25 ns S1 Closed,S2 Open (1) Thistableisprovidedforcomparisonpurposesonly.The valuesinthistablefortheDS34C87 reflecttheperformanceofthedevicebut arenottestedorensured. (2) Skew isdefinedas thedifferenceinpropagationdelaysbetween complementaryoutputsatthe50% point. (3) Outputdisabletimeisthedelayfromthecontrolinputbeingswitchedtotheoutputtransistorsturningoff.The actualdisabletimesare lessthanindicateddue tothedelayadded by theRC timeconstantoftheload.
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www.ti.com SNLS376B –MAY 1998–REVISED APRIL 2013 AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS Note:C1 = C2 = C3 = 40 pF (includingProbe and JigCapacitance),R1 = R2 = 50Ω,R3 = 500Ω Figure3. AC TestCircuit Inputpulse;f= 1 MHz, 50%, tr ≤ 6 ns,tf≤ Figure4. PropagationDelays 6ns Figure6. DifferentialRise and FallTimes Figure7. PropagationDelays TestCircuit for“LS-Type” Load Figure5. Enable and DisableTimes Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS34C87T
SNLS376B –MAY 1998–REVISED APRIL 2013 www.ti.com Figure8. DifferentialRise and FallTimes TestCircuitfor“LS-Type” Load Figure9. Load Enable and DisableTimes TestCircuitfor“LS-Type” Load Figure10. Load PropagationDelays for“LS-Type” Load Figure11. Load Enable and DisableTimes for“LS-Type” Load TYPICAL APPLICATIONS *RT isoptionalalthoughhighlyrecommended toreducereflection.
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www.ti.com SNLS376B –MAY 1998–REVISED APRIL 2013 PIN DESCRIPTIONS Pin Number (PDIP orSOIC Pin Name Function package)
1 INPUT A ChannelA -TTL/CMOS input
2 OUTPUT A -True TrueOutputforChannelA,
3 OUTPUT A -Inverting InvertingOutputforChannelA,
4 A/B CONTROL EnablePinforChannelsA and B,
ActiveHigh,TTL/CMOS Levels
5 OUTPUT B -Inverting InvertingOutputforChannelB,
6 OUTPUT B -True TrueOutputforChannelB,
7 INPUT B ChannelB -TTL/CMOS input
8 GND Ground Pin(0V)
9 INPUT C ChannelC -TTL/CMOS input
10 OUTPUT C -True TrueOutputforChannelC,
11 OUTPUT C -Inverting InvertingOutputforChannelC,
12 C/D CONTROL EnablePinforChannelsC and D,
ActiveHigh,TTL/CMOS Levels
13 OUTPUT D -Inverting InvertingOutputforChannelD,
14 OUTPUT D -True TrueOutputforChannelD,
15 INPUT D ChannelD -TTL/CMOS input
16 VCC Power SupplyPin,5.0Vtypical Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS34C87T
SNLS376B –MAY 1998–REVISED APRIL 2013 www.ti.com
REVISION HISTORY
Changes from RevisionA (April2013)toRevisionB Page
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www.ti.com 15-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples DS34C87TM ACTIVE SOIC D 16 48 TBD Call TI Call TI -40 to 85 DS34C87TM DS34C87TM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS34C87TM DS34C87TMX ACTIVE SOIC D 16 2500 TBD Call TI Call TI -40 to 85 DS34C87TM DS34C87TMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS34C87TM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS34C87TMX SOIC D 16 2500 367.0 367.0 35.0 DS34C87TMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 Pack Materials-Page 2
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