DS30EA101 TI | Alldatasheet
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150 Mbps
3.125 Gbps
100: Differential Cable or 75: Coaxial Cable Max Cable Loss ~ 50 dB @ 1.5 GHz DS30EA101 www.ti.com SNLS404A –FEBRUARY 2012–REVISED APRIL 2013 DS30EA1010.15to3.125GbpsAdaptiveCableEqualizer Check forSamples: DS30EA101 1FEATURES DESCRIPTION The DS30EA101 is an adaptivecable equalizer 2• Automatic EqualizationofCoaxialand Twisted optimizedforequalizingdatatransmittedovercopperPairCables cables.The equalizeroperatesovera range ofdata• Data Rates from 150 Mbps to3.125Gbps ratesfrom150 Mbps to3.125Gbps and automatically
- Supports SD and HD Video Resolutions adaptstoequalizesignalssentoverany cablelength from zerometerstolengthsthatattenuatethesignal• Power Consumption: 115 mW Typical by 50 dB at1.5GHz.• IndustrialTemperature Range: -40°C to+85°C The DS30EA101 allows eithersingle-endedor differentialinput.ThisenablesequalizationofsignalsAPPLICATIONS overcoaxialcablesas wellas twistedpaircables.• Cable Extension Additionalfeaturesincludean LOS detectand output• Data Recovery Equalization enablewhich,when tiedtogether,disabletheoutput
- Securityand Surveillance when no inputsignalispresent. The DS30EA101 is powered from a single2.5V supplyand consumes 115 mW (typical).Itoperates overthefullindustrialtemperaturerange of-40°C to +85°C and isavailableina 4 x 4 mm 16-pinWQFN package. TypicalApplication Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2012–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
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(top view) 85 6 7 1316 15 14 VEE IN- IN+ OUT+ OUT- VEE DNC DNC LOS VCC VCC EN DAP = VEE VEE VEE VEE VEE DS30EA101 SNLS404A –FEBRUARY 2012–REVISED APRIL 2013 www.ti.com Connection Diagram The exposed dieattachpad isa negativeelectricalterminalforthisdevice.Itshouldbe connectedtothenegative power supplyvoltage. Figure1. 16-PinWQFN Package See Package Number RUM0016A PIN DESCRIPTIONS Pin Name I/O,Type Description 1 VEE Ground Negativepower supply(ground). 2 IN+ I,Data Non-invertinginput. 3 IN- I,Data Invertinginput. 4 VEE Ground Negativepower supply(ground). 5 DNC N/A Do notconnect– leaveopen. 6 DNC N/A Do notconnect– leaveopen. 7 VEE Ground Negativepower supply(ground). 8 VEE Ground Negativepower supply(ground). 9 VEE Ground Negativepower supply(ground). 10 OUT- O, LVDS Invertingoutput. 11 OUT+ O, LVDS Non-invertingoutput. 12 VEE Ground Negativepower supply(ground). 13 VCC Power Positivepower supply(+2.5V). 14 EN I,LVCMOS Outputenable.LOS may be tiedtothispintoinhibittheoutputwhen no inputsignalis present.Thispinhas an internalpulldown. H = Outputsdisabled. L = Outputsenabled. 15 LOS O, LVCMOS Loss ofsignal. H = No inputsignaldetected. L = Inputsignaldetected. 16 VCC Power Positivepower supply(+2.5V). DAP VEE Ground Connectexposed DAP tonegativepower supply(ground). These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.
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www.ti.com SNLS404A –FEBRUARY 2012–REVISED APRIL 2013 AbsoluteMaximum Ratings(1) SupplyVoltage 3.1V InputVoltage(allinputs) −0.3VtoVCC +0.3V StorageTemperatureRange −65°C to+150°C JunctionTemperature +125°C Package ThermalResistance θJA 16-pinWQFN +40°C/W θJC 16-pinWQFN +6°C/W ESD Rating(HBM) ≥±6 kV ESD Rating(MM) ≥±300V ESD Rating(CDM) ≥±2 kV (1) “AbsoluteMaximum Ratings”indicatelimitsbeyond whichdamage tothedevicemy occur,includinginoperabilityand degradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximum Ratingsor otherconditionsbeyond thoseindicatedintheRecommended OperatingConditionsisnotimplied.The Recommended Operating Conditionsindicateconditionsatwhichthedeviceisfunctionaland thedeviceshouldnotbe operatedbeyond such conditions. Recommended OperatingConditions SupplyVoltage(VCC ) 2.5V±5% InputCouplingCapacitance 1.0µF OperatingFreeAirTemperature(TA) -40°C to+85°C DC ElectricalCharacteristics Over recommended supplyvoltageand operatingtemperatureranges,unlessotherwisespecified.(1)(2) Parameter TestConditions Reference Min Typ Max Units VIN InputVoltage 0m cablelength IN+,IN- 720 800 880 mV P−P VSS SteadyStateDifferentialOutput 100Ω load,Figure2 OUT+, OUT- 500 700 900 mV P-PVoltage VOD DifferentialOutputVoltage 250 350 450 mV ΔVOD Change inMagnitudeofVOD for 50 mVComplimentaryOutputStates VOS OffsetVoltage 1.1 1.2 1.35 V ΔVOS Change inMagnitudeofVOS for 50 mVComplimentaryOutputStates IOS OutputShortCircuitCurrent 30 mA VIH InputVoltageHighLevel EN 1.7 VCC V VIL InputVoltageLow Level VEE 0.7 V VOH OutputVoltageHighLevel IOH = -2mA LOS 2.0 V VOL OutputVoltageLow Level IOL = +2 mA 0.2 V ICC SupplyCurrent 45 65 mA (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Typicalvaluesrepresentmost likelyparametricnorms atVCC = +2.5V,TA = +25°C, and attheRecommended OperatingConditionsat thetimeofproductcharacterizationand arenotensured. Copyright© 2012–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS30EA101
20% 80% VOD - VOD + VOS VSS = (VOD +) ± (VOD -) 0V differential tTLH + VOD 20% 80% tTHL VSS - VOD DS30EA101 SNLS404A –FEBRUARY 2012–REVISED APRIL 2013 www.ti.com AC ElectricalCharacteristics Over recommended supplyvoltageand operatingtemperatureranges,unlessotherwisespecified.(1)(2) Parameter TestConditions Reference Min Typ Max Units DR IN InputData Rate IN+,IN- 150 3125 Mbps tJIT TotalJitteratBER 10-12 (3) 3.125Gbps, UI0.350-10metersCAT6 2.5Gbps, UI0.350-25metersCAT6 1.5Gbps, UI0.350-50metersCAT6 3.125Gbps, UI0.30-100metersRG59 2.5Gbps, UI0.350-110metersRG59 1.5Gbps, UI0.20-120metersRG59 tTLH TransitionTime Low toHigh 20% -80%, 100Ω load,(4), OUT+, OUT- 90 130 ps Figure2tTHL TransitionTime HightoLow 90 130 ps (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Typicalvaluesrepresentmost likelyparametricnorms atVCC = +2.5V,TA = +25°C, and attheRecommended OperatingConditionsat thetimeofproductcharacterizationand arenotensured. (3) The totaljitteratBER 10-12 iscalculatedas DJ + (14x RJ),where DJ isdeterministicjitterand RJ israndom jitter.The jitteris expressedas a portionoftheunitinterval(UI).The UI isthereciprocalofthedatarate. (4) Specificationisensuredby characterizationand isnottestedinproduction. TIMING DIAGRAMS Figure2. LVDS Output Voltage,Offset,and Timing Parameters
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0.1 PF50:50:953:
100: 1 PF 1 PF 1 PF 1 PF DS30EA101 IN+ IN- 100: OUT+ OUT- VCC 100: Differential TP CableR VO DS30EA101 www.ti.com SNLS404A –FEBRUARY 2012–REVISED APRIL 2013 DEVICE OPERATION The DS30EA101 equalizesdatatransmittedovercoppercables.Itautomaticallyadjustsitsgaintoreversethe effectsofthecablelossand restoretheoriginalsignal.For properoperation,thelaunchamplitudeofthesignal goingintothecable(thesignalamplitudepriortothecableattenuation)must be setappropriately.Ifthesignalis single-ended,itssingle-endedamplitudemust be 800 mV P-P ±10%. Ifthe signalisdifferential,itsdifferential amplitudemust be 800 mV P-P ±10% (400mV P-P single-ended). INPUT INTERFACING The DS30EA101 acceptseitherdifferentialor single-endedinput.The inputmust be AC coupled.Figure3 and Figure4 show the typicalconfigurationsfordifferentialinputand single-endedinput,respectively.For single- ended input,theunused inputmust be properlyterminatedas shown. OUTPUT INTERFACING The DS30EA101 outputsignals(OUT+ and OUT- )areinternallyterminated100Ω LVDS outputs.These outputs can be DC coupledtomost common differentialreceivers. LOS AND EN LOS indicatesthelossofsignalattheDS30EA101 input.LOS ishighwhen no inputsignalispresentand low when a validinputsignalisdetected. EN can be used tomanuallydisableorenabletheOUT+ and OUT- outputsignals.Applyinga highinputtoEN willdisabletheDS30EA101 outputsby forcingtheoutputtoa logic1,and applyinga low inputtoEN willforce theoutputstobe active.EN has an internalpulldowntoenabletheoutputsby default. LOS and EN may be tiedtogetherto automaticallydisablethe DS30EA101 outputswhen no inputsignalis present.
APPLICATION INFORMATION
CABLE EXTENDER APPLICATION The DS30EA101 togetherwiththeDS30BA101 forma cableextenderchipsetoptimizedforextendingserialdata streamsfrom serializer/deseralizer(SerDes)pairsand FPGAs over 100Ω differentialcablesand 75Ω coaxial cables.SettingthecorrectDS30BA101 outputamplitudeand propercableterminationare essentialforoptimal operation.Figure3 shows therecommended chipsetconfigurationfor100Ω differentialcableand Figure4 shows therecommended chipsetconfigurationfor75Ω coaxialcable. Figure3. Cable ExtenderChipsetApplicationCircuitfor100Ω DifferentialCable Copyright© 2012–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS30EA101
0.1 PF75:75:750:
100:
1 PF 1 PF
75: OUT+ OUT- VCC 37.4: R VO 75: Coaxial Cable 1 PF 75: DS30EA101 SNLS404A –FEBRUARY 2012–REVISED APRIL 2013 www.ti.com Figure4. Cable ExtenderChipsetApplicationCircuitfor75Ω CoaxialCable
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www.ti.com SNLS404A –FEBRUARY 2012–REVISED APRIL 2013
REVISION HISTORY
Changes from Original(April2013)toRevisionA Page Copyright© 2012–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS30EA101
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS30EA101SQ/NOPB Active Production WQFN (RUM) | 16 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQ/NOPB.A Active Production WQFN (RUM) | 16 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQE/NOPB Active Production WQFN (RUM) | 16 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQE/NOPB.A Active Production WQFN (RUM) | 16 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQX/NOPB Active Production WQFN (RUM) | 16 4500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 85 30EA101 DS30EA101SQX/NOPB.A Active Production WQFN (RUM) | 16 4500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 85 30EA101 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
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PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS30EA101SQ/NOPB WQFN RUM 16 1000 208.0 191.0 35.0 DS30EA101SQE/NOPB WQFN RUM 16 250 208.0 191.0 35.0 DS30EA101SQX/NOPB WQFN RUM 16 4500 356.0 356.0 36.0 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 4.1 3.9 4.1 3.9 0.8 0.70.05 0.00 2X 1.95 12X 0.65 2X 1.95 16X 0.5 0.3 16X 0.35 0.25 2.6 0.1 (DIM A) TYP WQFN - 0.8 mm max heightRUM0016A PLASTIC QUAD FLATPACK - NO LEAD 4214998/A 11/2021 DIM A OPT 1 OPT 2 0.2 0.1 0.08 C
0.1 C A B
0.05 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. PIN 1 INDEX AREA SEATING PLANE PIN 1 ID (45 X 0.3) SYMM EXPOSED THERMAL PAD SYMM 5 8 1316 SCALE 3.000 AB
www.ti.com EXAMPLE BOARD LAYOUT 12X (0.65) (1.05) (1.05) (R0.05) TYP
0.07 MAX
0.07 MIN
16X (0.6) 16X (0.3) (3.8) (3.8) ( 2.6) ( 0.2) TYP VIA WQFN - 0.8 mm max heightRUM0016A PLASTIC QUAD FLATPACK - NO LEAD 4214998/A 11/2021 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X SEE SOLDER MASK DETAIL 5 8 1316 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS
www.ti.com EXAMPLE STENCIL DESIGN 16X (0.6) 16X (0.3) 12X (0.65) (3.8) (3.8) (0.675) TYP (0.675) TYP 4X ( 1.15) (R0.05) TYP WQFN - 0.8 mm max heightRUM0016A PLASTIC QUAD FLATPACK - NO LEAD 4214998/A 11/2021 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 20X EXPOSED PAD 17 78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SYMM SYMM 5 8 1316
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