DS2890 MAXIM | Alldatasheet
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Technical content
FEATURES
Single element 256-position linear taper potentiometer Supports potentiometer terminal working voltages up to 11V Potentiometer terminal voltage independent of supply voltage Potentiometer wiper position controlled and read over minimal 1-Wire bus interface 100 kΩ resistor element value T0-92 package provides a 1-Wire® variable resistor configuration Supports Conditional Search based on power-on default wiper position Multiple DS2890’s can be identified on a common 1-Wire bus and operated independently Unique factory lasered 64-bit registration number assures error free device selection and absolute part identity Built-in multi-drop controller ensures compatibility with other 1-Wire Network products Supports Overdrive mode which boosts communication speed up to 142 kbits per second -40 oC to +85oC operating temperature range 2.8V – 6.0V operating voltage range PIN ASSIGNMENT Top View 6-pin TSOC 1-WIRE GND VDD 4 RH WIPER RL 12 3GND 1-WIRE RH 123 Bottom View
ORDERING INFORMATION
PART NUMBER RESISTANCE * PACKAGE DESCRIPTION DS2890-000 100 kΩ T0-92 DS2890P-000 100 kΩ 6-pin TSOC DS2890-000/T&R 100 kΩ Tape & Reel of DS2890 DS2890P-000/T&R 100 kΩ Tape & Reel of DS2890P * Contact the factory for availability of alternate resistance values www.maxim-ic.com DS2890 1-Wire Digital Potentiometer 1-Wire is a registered trademark of Dallas Semiconductor.
1-WIRE I/O 1-Wire bus interface. Open drain, requires external pull-up resistor. Range: 2.8V – 6.0V. See HARDWARE CONFIGURATION for pull-up resistor recommendations. RH I/O High end terminal of po tentiometer resistor element. Range: 0V – 11.0V. Range independent of 1-Wire or VDD supply levels as well as the voltage levels applied to the other potentiometer terminals. RL I/O Low end terminal of potentiometer re sistor element. Range: 0V – 11.0V. Range independent of 1-Wire or VDD supply levels as well as the voltage levels applied to the other potentiometer terminals. WIPER I/O Potentiometer wiper terminal. Range 0V – 11.0V. Range independent of 1-Wire or VDD supply levels as well as the voltage levels applied to the other potentiometer terminals. VDD PWR Auxiliary power supply i nput. Range: 2.8V – 6.0V GND PWR Ground
DESCRIPTION
The DS2890 is a linear tape r digitally controlled po tentiometer with 256 wi per positions . Device operation, including wiper position, is controlled over the single contact 1-Wire bus for the ultimate in electrical interface simp licity. With a wide 0–11 volt working voltage range for the potentiometer terminals, the DS2890 is id eal for a broad range of industrial and control applications. Potentiometer terminal voltage is independent of device supply voltage as well as the voltage applied to the other potentiometer terminals. Comm unication with the DS2890 follows th e standard Dallas Semiconductor 1-Wire protocol and can be accomplished with mi nimal hardware such as a single port pin of a microcontroller. Multiple DS 2890 devices can reside on a common 1-Wire bus and be operated independently of each other. Each DS2890 has its own unalterable 64-bit ROM registration number that is factory lasered into the chip. The registration number guarantees unique identification for absolute traceability and is used to address the device in a multi-drop 1-Wire Network environment. The DS2890 will respond to a 1-Wire Conditional Search command if the potentiometer wipe r is set at the power-on default position. This feature en ables the bus master to easily determine whether a potentiometer has gone through a power-on reset and needs to be re-conf igured with a required wiper position setting. The DS2890 supports two power modes: a) 1-Wire only mode in which device power is supplied parasitically from the 1-Wire and b) V DD mode where power is supplied from an exte rnal supply With a V DD supply the device can support both a potentiom eter and variable resi stor configuration. When operating in a 1- Wire only power mode the device supports only a variable resistor configuration.
The DS2890 is a single element digital potentiometer; a block diagram of the device is shown in Figure 1. maintained as long as the 1-Wire bus is active or the V DD supply is applied with in operating limits. FIGURE 1. DS2890 BLOCK DIAGRAM “TO-92 PACKAGE OPERATION” section.
FIGURE 3. 1-WIRE POTENTIOMETER FEATURE REGISTER REGISTER command is executed, see section “POTENTIOMETER FUNCTION COMMANDS”. contain multiple resistor elements. The format of the control register is shown in Figure 4.
FIGURE 4. POTENTIOMETER CONTROL REGISTER no change in device state will occur if an invalid control register value is sent.
READ CONTROL REGISTER [AAH] The Read Control Register command is used to obta in both the Control Register and potentiometer Feature Register. Following the Read Control Register command byte, th e bus master reads 16 bits to obtain first the Feature Re gister byte and then the Control Register byte. Th e DS2890 will respond with 0’s to additional reads after the 8 bit of the Control Register byte. The Read Control Register command is terminated with a Reset pulse. WRITE CONTROL REGISTER [55H] The Write Control Register command is used to manipulate DS2890 state bits lo cated in the Control Register. This command is used to set the potentiometer wi per address and charge pump state. The bus master follows the Write Co ntrol Register command byte with an 8-bit register value. Following the 8th bit of the register byte, the bus master reads back the 8-bit control value from the DS2890 to confirm that the device received the correct value (Note that if an invalid register value was received by the DS2890, the bus master will r ead all 1’s (FFh) during the read back sequ ence.). If a value ot her than FFh is read, the bus master determines if the DS2890 received the correct value. If an incorrect value is read back, the bus master must issue a Reset pulse and repeat the sequence. If the value read back is correct, the bus master then sends the 8-bit release code (96h). If the DS 2890 accurately receives the release code, the Control Register is updated and the device will respond with 0’s to additional reads by the bus master. If an invalid release code is received, no change is made to the Control Register and the device will respond with 1’s to additional reads by the bus master. The Write Control Register command is terminated with a Reset pulse. INCREMENT [C3H] The Increment command is used for a one step position increase of the currently addressed potentiometer wiper. Although the DS2890 is a single element potentiometer, wiper addressing sti ll applies and the Control Register wiper number used for addressing must be set accordingly. The bu s master follows the Increment command byte with an 8- bit read to which th e DS2890 will respond with the new 8-bit wiper position set point. No po sition change is made if the DS2890 wiper is at the maximum position (FFh) and an Increment command is receiv ed. One difference between th e Increment/Decrement commands and other potentiometer functions is that upon completion of either of these commands, 1-Wire command processing remains at the potentiometer function level. As show n in Figure 18, add itional potentiometer commands may be sent without going through the ROM function flow. DECREMENT [99H] The Decrement command is used for a one step position decrease of the currently addressed potentiometer wiper. Alt hough the DS2890 is a single element potentiometer, wiper addressing still applies and the Control Register wiper number used for addressing must be set accordingly. The bus master follows the Decrement command byte with an 8-bit re ad to which the DS2890 will respond with the new 8-bit wiper po sition set point. No position change is made if the DS2890 wiper is at the minimum position (00h) and a D ecrement command is received. One differen ce between the Increment/Decrement commands and other potentiometer fu nctions is that upon comp letion of either of these commands, 1-Wire command pr ocessing remains at th e potentiometer function level. As shown in Figure 18, additional potentiometer commands may be sent withou t going through the ROM function flow.
FIGURE 15. BUS MASTER WITH DS2480B DRIVER
- Initialization
- ROM Function Command
- Potentiometer Function Command
- Transaction/Data INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus mast er followed by presence pulse(s) transmitted by the slave(s). The presence puls e lets the bus master kno w that the DS2890 is on the bus and is ready to operate. For more details, see the “1-WIRE SIGNALING” section. ROM FUNCTION COMMANDS Once the bus master has detected a presence, it can issue one of the eight ROM function commands that the DS2890 supports. All ROM function commands are 8 bits long. A list of thes e commands follows (refer to Figure 20 and Figure 21 flowcharts): READ ROM [33H] This command allows the bus master to read the DS2890’s 8-bit family code , unique 48-bit serial number, and 8-bit CRC. This command should only be used if there is a single slave on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired-AND result). Th e resultant family code and 48-bit serial number read by the master will be invalid. MATCH ROM [55H] The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific DS2890 on a multi-drop bus. Only the DS2890 th at exactly matches the 64-bit ROM sequence will respond to the following memory function command. Al l slaves that do not match th e 64-bit ROM sequence will wait for a reset pulse. This command can be us ed with a single or mu ltiple devices on the bus.
SEARCH ROM [F0H] When a multi-drop system is initia lly brought up, the bus master might not know the number of devices on the 1-Wire bus or thei r 64-bit ROM codes. The search ROM comm and allows the bus master to use a process of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM process is the repetition of a simple 3-step routine: re ad a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this 3-step routine on each bit of the ROM. After one complete pass, the bus master knows the 64-bit ROM code of one device. Additional passes will identify the ROM codes of the remaining devices. CONDITIONAL SEARCH ROM [ECH] The Conditional Search ROM command operates similarly to the Search ROM command except that only devices fulfilling the specif ied search condition will participate in the search. The device c ondition that will cause individual DS2890s to part icipate in a Conditiona l Search is a wiper po sition located at the power-on default setting ( 00h). This feature enab les the bus master to eas ily determine whether a potentiometer has gone thr ough a power-on reset and n eeds to be re-configured with a re quired wiper position setting. SKIP ROM [CCH] This command can save time in a single drop bus syst em by allowing the bus master to access potentiometer functions without providing the 64-bit ROM code. If more than one slave is present on the bus and, for example, a read command is issued following the Skip ROM co mmand, data collision will occur on the bus as multiple slaves transmit simultaneously (open drain pull-downs will produce a wired- AND result). OVERDRIVE SKIP ROM [3CH] On a single-drop bu s this command can save time by allowi ng the bus master to access the memory functions without providing the 64-bit ROM code. Unlike the normal Skip ROM command the Overdrive Skip ROM sets the DS2890 in the Over drive Mode. All communi cation follo wing this command code has to occur at Over drive Speed until a reset pulse of minimum 480 µs duration resets all devices on the bus to regular speed. When issued on a mu lti-drop bus this command will set all Ov erdrive-supporting devices into Overdrive mode. To subsequently address a sp ecific Overdrive-supporting device, a reset pulse at Overdrive speed has to be issued followed by a Match ROM or Sear ch ROM command sequence. This will speed up the search process. If more than one Overdrive-supporting slave is present on the bus and the Overdrive Skip ROM command is followed by a read command, data collision wi ll occur on the bus as multiple slaves transmit simultaneously (open drain pull-downs will produce a wire-AND result). OVERDRIVE MATCH ROM [69H] The Overdrive Match ROM command, followed by a 64-bit ROM sequence transmitted at Overdrive Speed, allows the bus mast er to address a specific DS2890 on a multi-drop bus and to simultaneously set it in Overdrive Mode. Only the DS2890 that exactly matches the 64-bit ROM se quence will respond to the subsequent potentiometer func tion command. Slaves already in Overdrive mode from a previous Overdrive Skip or a successful Overdrive Match command wi ll remain in Overdr ive mode. All Over- drive-capable slaves will return to regular speed at the next Reset Pulse of minimum 480 µs duration. The Overdrive Match ROM command can be used with a single or multiple devices on the bus.
RESUME COMMAND [A5H] In a typical application the DS2890 may be accessed several times to complete a control adjustment. In a multi-drop environment this means that the 64-bit ROM sequence of a Match ROM command has to be repeated for ev ery access. To maximize the data throughput in a multi-dr op environment the Resume Command function was implemented. As shown in Figur e 21, this function checks the status of the RC flag and, if it is set, directly transfers control to the potentiometer function s, similar to a Skip ROM command. The only way to set the RC flag is through successfu lly executing the Match ROM, Search ROM, Conditional Search ROM, or Overdrive Match ROM command. Once the RC flag is set, the device can repeatedly be accessed through the Resume Command fu nction. Accessing another device on the bus will clear the RC flag, preventing two or more devices from simultaneously responding to the Resume Command function. POTENTIOMETER FUNCTION EXAMPLE At regular speed with an auxiliary supply (V DD within range): turn on the charge pump, set the wiper position to mid-point, increment the wiper twice, and decrement the wiper once. MASTER MODE DATA (L SB FIRST) COMMENTS TX Reset Reset Pulse (480 - 960 μs) RX Presence Presence Pulse TX CCh Issue Skip ROM Command TX 55h Issue Write Cont rol Register Command TX 4Ch Issue Control Register value for WN=0, CPC=1 RX <data byte> Read back Control Register value (4Ch) and verify TX 96h Issue Release Code to update Control Register RX <data bits> If 0’s are read, update was successful; if 1’s are read, the update failed TX Reset Reset Pulse (480 - 960 μs) RX Presence Presence Pulse TX CCh Issue Skip ROM Command TX 0Fh Issue Write Position Command TX 7Fh Write Wipe r Position value RX <data byte> Read back Wiper Position byte and verify TX 96h Issue Release Code to update Wiper Position RX <data bits> If 0’s are read, update was successful; if 1’s are read, the update failed TX Reset Reset Pulse RX Presence Presence Pulse TX CCh Issue Skip ROM Command
timing applies to all waveforms. Figure 16. A Reset Pulse foll owed by a Presence Pulse indicates the DS2890 is re ady to send or receive Mode and the Reset Pulse is no longer than 80 µs the device will remain in Overdrive Mode. hold the data line low at all.
b) Write-zero Time Slot 15µs RESISTOR MASTER (OD: 2µs) DS2890 60µs tLOW0 Sampling Window (OD: 6µs) REGULAR SPEED OVERDRIVE SPEED 60 µs ≤ tLOW0 < tSLOT < 120 µs 1 µs ≤ tREC < ∞ 6 µs ≤ tLOW0 < tSLOT < 16 µs 1 µs ≤ tREC < ∞ VPULLUP VPULLUP MIN VIH MIN VIL MAX tSLOT tREC c) Read-data Time Slot RESISTOR MASTER DS2890 Master Sampling Window REGULAR SPEED OVERDRIVE SPEED 60 µs ≤ tSLOT < 120 µs 1 µs ≤ tLOWR < 15 µs 0 ≤ tRELEASE < 45 µs 1 µs ≤ tREC < ∞ tRDV = 15 µs tSU < 1 µs 6 µs ≤ tSLOT < 16 µs 1 µs ≤ tLOWR < 2 µs 0 ≤ tRELEASE < 4 µs 1 µs ≤ tREC < ∞ tRDV = 2 µs tSU < 1 µs VPULLUP VPULLUP MIN VIH MIN VIL MAX tSLOT tREC tLOWR tSU tRDV tRELEASE *The optimal sampling point for the master is as close as possible to the end time of the t RDV period without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of time for the pull-up resistor to recover the line to a high level. For a Read -zero time slot it ensures that a read will occur before the fastest 1-Wire device(s) release the line (tRELEASE = 0).
FIGURE 18. POTENTIOMETER FUNCTION COMMAND FLOW
FIGURE 19. POTENTIOMETER FUNCTION COMMAND FLOW (CONTINUED)
FIGURE 20. ROM FUNCTION COMMAND FLOW
FIGURE 21. ROM FUNCTION COMMAND FLOW (CONTINUED)
ELECTRICAL CHARACTERISTICS
Voltage on RH, RL, WIPER Relative to Ground -0.5V to +11.0V Voltage on Other Pins Relative to Ground -0 .5V to +6.0V Operating Temperature -40 oC to +85oC Storage Temperature -55 oC to +125oC Soldering Temperature See J-STD-020A specification * This is a stress rating only and func tional operation of the device at these or any other conditions above those indicated in th e operation sections of this specification is not implie d. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS -40°C ≤ TA ≤ +85°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES 1-Wire Pull-Up Voltage V PUP 2.8 6.0 V 1 2.8 6.0 V 1,2 Auxiliary Supply Voltage V DD -0.3 0.8 V 1,3 Notes: 1. Voltages are referenced to ground 2. Range applicable when an auxiliary VDD supply is used 3. Range applicable when an auxiliary VDD supply is not used POTENTIOMETER CHARACTERISTIC 2.8V ≤ VPUP ≤ 6.0V, -40°C ≤ TA ≤ +85°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Resistor Terminal Voltage -0.3 11.0 V 1 End-to-End Total Resistance 100 kΩ End-to-End Resistance Tolerance -25 25 % 2 Wiper Resistance: R WIPER 3 Absolute Linearity ±0.6 LSB 4 Relative Linearity ±0.25 LSB 5 -3 dB cutoff frequency f CUTOFF 100 kHz Temperature Coefficient 800 ppm/ oC
Notes: 1. Voltage is referenced to ground. 2. Valid at 25oC only. 3. Wiper resistance is a function of operating characteristics. See section “POTENTIOMETER WIPER RESISTANCE AND CHARGE PUMP CONSIDERATIONS” for RWIPER characteristics. 4. Absolute linearity is a measure of wiper output voltage versus expected wiper voltage as determined by wiper position. 5. Relative linearity is a measure of the output deviation between successive potentiometer tap points. DC ELECTRICAL CHARACTERISTICS 2.8V ≤ VPUP ≤ 6.0V, -40°C ≤ TA ≤ +85°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES 1-Wire Input High V IH 2.2 V 1 1-Wire Input Low V IL -0.3 0.8 V 1,2 1-Wire Output High V OH V PUP 6.0 V 1,3 1-Wire Output Low @ 4 mA V OL 0.4 V 1 1-Wire Input Leakage Current I L 5 μA 4 VDD Input Current, Charge Pump OFF IDD 4.0 μA 5 VDD Input Current, charge Pump ON IDD 2.0 mA 6 Notes: 1. Voltages are referenced to ground. 2. Under certain low vo ltage conditions V ILMAX may have to be reduced to as much as 0.5V to always guarantee a presence pulse. 3. VPUP is the external 1-Wire pull-up voltage. 4. Input load is to ground. 5. Input current when an auxiliary VDD supply is used and the charge pump is turned OFF. 6. Input current when an auxiliary VDD supply is used and the charge pump is turned ON.
AC ELECTRICAL CHARACTERISTICS - REGULAR 1-WIRE SPEED 2.8V ≤ VPUP ≤ 6.0V, -40°C ≤ TA ≤ +85°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Time Slot t SLOT 60 120 µs Write 1 Low Time t LOW1 1 15 µs Write 0 Low Time t LOW0 60 120 µs Read Low Time t LOWR 1 15 µs Read Data Valid t RDV 15 µs 1 Release Time t RELEASE 0 15 45 µs Read Data Setup t SU 1 µs 2 Recovery Time t REC 1 µs Reset High Time t RSTH 480 µs 3 Reset Low Time t RSTL 480 µs 4 Presence Detect High t PDH 15 60 µs Presence Detect Low t PDL 60 240 µs Notes: 1. The optimal sampling point for the master is as close as possible to the end time of the 15 μs tRDV period without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of time for the pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures that a read will occur before the fastest 1-Wire device(s) release the line (tRELEASE = 0). 2. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is guaranteed to be valid within 1 µs of this falling edge. 3. An additional reset or communication sequence cannot begin until the reset high time (tRSTH) has expired. 4. The reset low time (tRSTL) should be restricted to a maximum of 960 µs, to allow interrupt signaling, otherwise, it could mask or conceal interrupt pulses. AC ELECTRICAL CHARACTERISTICS - OVERDRIVE 1-WIRE SPEED 2.8V ≤ VPUP ≤ 6.0V, -40°C ≤ TA ≤ +85°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Time Slot t SLOT 6 16 µs Write 1 Low Time t LOW1 1 2 µs Write 0 Low Time t LOW0 6 16 µs Read Low Time t LOWR 1 2 µs Read Data Valid t RDV 2 µs 1 Release Time t RELEASE 0 1.5 4 µs Read Data Setup t SU 1 µs 4
AC ELECTRICAL CHARACTERISTICS - OVERDRIVE 1-WIRE SPEED 2.8V ≤ VPUP ≤ 6.0V, -40°C ≤ TA ≤ +85°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Recovery Time t REC 1 µs Reset High Time t RSTH 48 µs Reset Low Time t RSTL 48 80 µs Presence Detect High t PDH 2 6 µs Presence Detect Low t PDL 8 24 µs Notes: 1. The optimal sampling point for the master is as close as possible to the end time of the 2 μs tRDV period without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of time for the pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures that a read will occur before the fastest 1-Wire device(s) release the line (tRELEASE = 0). 2. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is guaranteed to be valid within 1 µs of this falling edge. 3. An additional reset or communication sequence cannot begin until the reset high time (tRSTH) has expired. 4. The reset low time (tRSTL) should be restricted to a maximum of 960 µs, to allow interrupt signaling, otherwise, it could mask or conceal interrupt pulses. CAPACITANCE TA = 25°C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES 1-Wire Pin 800 pF 1 VDD Pin 10 pF Resistor Terminals 10 pF NOTE: 1. Capacitance on the 1-Wire pin could be 800 pF when power is first applied. If a 5 kΩ is used to pull up the 1-Wire line to VPUP, the capacitance will not affect communications after a 5 μs charge time.