DS2756 MAXIM | Alldatasheet
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Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. GENERAL DESCRIPTION The DS2756 high-precision battery fuel gauge is a data-acquisition and information-storage device tailored for cost-sensitive and space-constrained 1- cell Li+/polymer battery-pack applications. The DS2756 provides the key hardware components required to accurately estimate remaining capacity by integrating low-power, precision measurements of temperature, voltage, current, and current accumulation, as well as nonvolatile (NV) data storage, into the small footprint of a 3.0mm x 4.4mm 8-pin TSSOP package. Through its 1-Wire /g210 interface, the DS2756 gives the host system read/write access to status and control registers, instrumentation registers, and general- purpose data storage. Each device has a unique factory-programmed 64-bit net address that allows it to be individually addressed by the host system, supporting multibattery operation. TYPICAL OPERATING CIRCUIT Protector DS2756 DQ PIO VIN VDD SNS IS2 IS1 VSS PACK+ INT PACK- 150 150 1K 150 0.020 0.1µF 0.1µF 5.1V5.1V5.1V DATA
FEATURES
/g167/g32Programmable Suspend Mode /g167/g32Accurate Current Accumulation - 2% ±4/g109V over ±64mV Input Range - 2% ±200/g109A over ±3.2A with 20m/g87 Sense /g167/g32Current Measurement - 9-Bit Snapshot Measurement - 12-Bit Average Updated Every 88ms - 15-Bit Average Updated Every 2.8s /g167/g32Voltage Measurement - 9-Bit Snapshot Measurement - 10-Bit Average Updated Every 4ms /g167/g32Temperature Measurement - 10-Bit with 0.125/g176C Resolution /g167/g32Snapshot Mode Allows Instantaneous Power Measurement /g167/g32Host Alerted When Accumulated Current or Temperature Exceeds Programmable Limits /g167/g3296 Bytes of Lockable EEPROM /g167/g328 Bytes of General-Purpose SRAM /g167/g32Dallas 1-Wire Interface with Unique 64-Bit Address and Standard or Overdrive Timing /g167/g323mm Dimension of 8-Pin TSSOP Package Allows Mounting on Side of Thin Prismatic Li+ and Li+/Polymer Cells
ORDERING INFORMATION
PART TEMP RANGE PIN-PACKAGE DS2756E+ -20°C to +70°C 8 TSSOP DS2756E+T&R -20°C to +70°C DS2756E+ on Tape-and-Reel + Denotes lead-free package. PIN CONFIGURATION VIN DQ SNS IS2 PIO 1 8 V SS 2 VDD 4 IS1 DS2756E DS2756 High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode www.maxim-ic.com 1-Wire is a registered trademark of Dallas Semiconductor.
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 2 of 26 ABSOLUTE MAXIMUM RATINGS Voltage on PIO Pin, Relative to VSS - 0 . 3 V t o + 1 2 V Voltage on All Other Pins, Relative to VSS -0.3V to +6V Continuous Sink Current, DQ, PIO 12mA Operating Temperature Range -40°C to +85°C Storage Temperature Range -55°C to +125°C Soldering Temperature See J-STD-020A Specification This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in t he operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (3.0V /g163 VDD /g163 5.5V, TA = -20/g176C to +70/g176C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V DD (Note 1) 3.0 5.5 V Data Pin DQ (Note 1) -0.3 +5.5 V VIN Pin V IN (Note 1) -0.3 +5.5 V DC ELECTRICAL CHARACTERISTICS (3.0V /g163 VDD /g163 5.5V, TA = -20/g176C to +70/g176C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DQ = VDD, EEC bit = 0, 3.0V < VDD < 4.2V 75 100 /g109A Active Mode Supply Current IACTIVE DQ = VDD, EEC bit = 0 120 Sleep Mode Supply Current ISLEEP DQ = 0V, PIE = 00b 1 3 /g109A Suspend Mode Supply Current ISUSPEND DQ = 0V, PIE ≠ 00b (Note 11) 1.5 4 /g109A Current Measurement Input Range VIS1-IS2 (Note 2) /g17764 mV Current Register Offset Error IOERR (Note 4) ±7.813 /g109V/R Current Gain Error I GERR (Notes 2, 5) /g1771 % reading
24 Hour Accumulated
VIS1-IS2 = 0, OBEN set, (Notes 2, 3, 6) -200 -100 0 µVhr/R Current Sampling Frequency fSAMP 1456 Hz IS1-VSS, IS2-SNS Filter Resistors RKS +25/g176C 10 k/g87 Input Resistance: VIN R IN VIN = VDD 5 M/g87 Voltage Offset Error V OERR (Note 7) /g1775 mV Voltage Gain Error V GERR /g1772 %V reading Temperature Error T ERR (Note 8) /g1773 /g176C Input Logic High: DQ, PIO V IH (Note 1) 1.5 V Input Logic Low: DQ, PIO V IL (Note 1) 0.4 V Output Logic Low: DQ, PIO V OL IOL = 4mA (Note 1) 0.4 V DQ Pulldown Current I PD 1 /g109A DQ Capacitance C DQ 60 pF DQ Low-to-Sleep Time t SLEEP 2.1 s Suspend Period Accuracy t SUS_ERR 0 /g17730 % Minimum Active Mode t ACT_MIN 87 90 93 ms
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 3 of 26 Period Undervoltage Delay t UVD 79 82 85 ms Internal Timebase Accuracy tERR (Note 9) /g1771 /g1772 % ELECTRICAL CHARACTERISTICS—1-WIRE INTERFACE (3.0V /g163 VDD /g163 5.5V, TA = -20/g176C to +70/g176C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Snapshot Trigger 0 t SWL 1 16 /g109s Snapshot Delay t SDLY 80 100 120 /g109s STANDARD TIMING Time Slot t SLOT 60 120 /g109s Recovery Time t REC 1 /g109s Write-0 Low Time t LOW0 60 119 /g109s Write-1 Low Time t LOW1 1 15 /g109s Read Data Valid t RDV 15 /g109s Reset Time High t RSTH 480 /g109s Reset Time Low t RSTL 480 960 /g109s Presence-Detect High t PDH 15 60 /g109s Presence-Detect Low t PDL 60 240 /g109s Interrupt Time Low t IL 480 1920 /g109s OVERDRIVE TIMING Time Slot t SLOT 6 16 /g109s Recovery Time t REC 1 /g109s Write-0 Low Time t LOW0 6 16 /g109s Write-1 Low Time t LOW1 1 2 /g109s Read Data Valid t RDV 2 /g109s Reset Time High t RSTH 48 /g109s Reset Time Low t RSTL 48 80 /g109s Presence-Detect High t PDH 2 6 /g109s Presence-Detect Low t PDL 8 24 /g109s Interrupt Time Low t IL 48 192 /g109s EEPROM RELIABILITY SPECIFICATION (3.0V /g163 VDD /g163 5.5V, TA = -20/g176C to +70/g176C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Copy to EEPROM Time t EEC 2 10 ms EEPROM Copy Endurance N EEC (Note 10) 50,000 cycles Note 1: All voltages are referenced to VSS. Note 2: Specifications relative to VIS1 - VIS2. Note 3: Summation of worst case time base and current measurement sampling errors. Note 4: Continuous offset cancellation corrects offset errors in the current measurement system. Individual values reported by the Current register have a maximum offset of ±0.5 LSb’s (±7.8125/g109V). Individual values reported in the Average Current register have a maximum offset of ±2 LSb’s (±7.8125/g109V). Note 5: Current Gain Error specifies the gain error in the Current register value compared to a reference voltage between IS1 and IS2. The DS2756 does not compensate for sense resistor characteristics, and any error terms arising from the sense resistor should be taken into account when calculating total current measurement error. Note 6: Achieving the 24 Hour Accumulated Current Error assumes positive offset accumulation blanking is enabled (OBEN bit set) and can require a one time 3.5s in-system calibration after mounting to the printed circuit board. Variations in temperature and supply voltage are compensated for by periodic offset corrections performed automatically during Active mode operation. Note 7: Voltage offset measurement is with respect to 4.2V at +25°C. Note 8: Self heating due to output pin loading and sense resistor power dissipation can alter the Temperature reading from ambient conditions. Note 9: Typical value for tERR valid at 3.7V and +25/g176C. tERR applies to all internal timings (ex. fSAMP, tSLEEP, tUVD) except for the 1-Wire Interface timings and tSUS_ERR. Note 10: Four year data retention at +50/g176C. Note 11: Measured during the Suspend Timeout. Does not include active period of suspend cycle.
user can select either the DQ pin or PIO pin as the alarm interrupt signal. measurements can be programmed to achieve an average current as low as 10 /g109A (See Table 3). including switches, vibration motors, speakers, and LEDs. security for unchanging battery data. SRAM provides inexpensive storage for temporary data. Figure 1. Application Example with Microcontroller in Pack
Figure 2. Functional Diagram
3 PIO General-Purpose Programmable I/O Pin or Optional Interrupt Output
5 IS1 Current-Sense Filter Input 1
6 IS2 Current-Sense Filter Input 2
7 SNS Sense Resistor Connection. SNS attaches to pack end of current sense resistor. 8 DQ Serial Interface Data I/O Pin. Bidirection data transmit and receive at 16kbps or 143kbps.
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 6 of 26 POWER MODES The DS2756 has three power modes: Active, Suspend and Sleep. While in Active mode, the DS2756 continuously measures voltage, temperature, current, accumulated current, and monitors for an under voltage condition. In Suspend and Sleep modes, the DS2756 ceases these activities. During Suspend, the DQ input buffer is active and a low power oscillator runs. In Sleep mode, only the DQ input buffer is active. The DS2756 enters Suspend mode when PMOD = 1 AND all of the following conditions are true: /g167/g32the DQ line is low for longer than tSLEEP /g167/g32the Programmable Interval Enable (PIE) bits in the Status Register are set to a non-zero value (PIE =01b, 10b or 11b) /g167/g32Current register value is less than the Charge Suspend Threshold AND greater than the Discharge Suspend Threshold Periodically, when a Suspend Period time out occurs, the DS2756 temporarily cycles from Suspend to Active mode in order to measure current. When the current measurement completes, the result is evaluated against the user programmed Charge and Discharge Suspend Thresholds. If the Current measurement result does not cross either threshold, the DS2756 transitions back to Suspend. If the measurement shows that more current is flowing than the level of either threshold, the DS2756 signals a suspend interrupt by driving the PIO pin low, then remains in Active mode continuing normal Active mode operation. The DS2756 enters Sleep mode when PMOD = 1 AND either of the following conditions are true: /g167/g32the DQ line is low for longer than t SLEEP (minimum 2.1s) AND PIE = 00b /g167/g32the UVEN bit in the Status Register is set to 1 AND the voltage on VIN drops below undervoltage threshold VUV for t UVD (VIN measurement and comparison to V UV, and t UVD timeout occur in normal Active mode and temporary Active mode cycle from Suspend mode) The DS2756 returns to Active mode from Suspend or Sleep mode whenever the DQ line is pulled from a low-to- high state. The factory default for the DS2756 is UVEN = 0, PMOD = 0 and PIE = 00b. The DS2756 defaults to Active mode when power is first applied. CURRENT MEASUREMENT AND ACCUMULATION The DS2756 current measurement system is designed to provide timely data on charge and discharge current at a moderate resolution level while simultaneously accumulating high resolution average data to support accurate coulomb counting. Current is measured with an Analog-to-Digital Converter (ADC) by sampling the voltage drop across a series sense resistor, R SNS, connected between SNS and V SS. Individual current samples are taken every 687/g109s (1456-1 Hz). Multiple samples are averaged to report Current and Average Current values, and accumulated for coulomb counting. Current Measurement The voltage signal developed across the sense resistor (between SNS and V SS) is differentially sampled by the ADC inputs through internal 10k Ω resistors connected between V SSand IS1, and SNS and IS2. Isolating the ADC inputs (IS1 and IS2 pins) from the sense resistor with 10k /g87 facilitates the use of an RC filter by adding a single external capacitor. The RC filter extends the input range beyond ±64mV in pulse load or pulse charge applications. The ADC accurately measures large peak signals as long as the differential signal level at IS1 and IS2 does not exceed ±64mV. The Current register operates in two modes, normal and snapshot. In normal mode, the Current register reports the average of 128 individual current samples every 88ms. The reported value represents the average current during the 88ms measurement period. The Average Current register reports the average of 4096 current samples and is updated every 2.8s. In snapshot mode, the Current register holds the current measured immediately following the snapshot trigger. Current measurements resume immediately after the snapshot value is obtained, however, the SNAP bit must be cleared to re-enable normal mode current reporting in the Current register. The Average Current register continues to be updated while the SNAP bit is set. Current accumulation also continues while SNAP is set. Although a small
Figure 5. Accumulated Current Register Format currents (positive Current register values) between 15.625 /g109V and 62.5 /g109V are not accumulated in the ACR. the bias control is 100/g109A over a ±12.5mA range. memory on power up and a transition from Sleep to Active mode.
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 10 of 26 PROGRAMMABLE I/O The PIO pin can be configured as a general purpose programmable I/O pin, or as an interrupt output. To use the PIO pin in the programmable I/O mode described in this section, the PIO interrupt method must not be enabled. See the Interrupt Signaling section for information on disabling interrupts. As a programmable I/O pin, PIO provides a digital input or an open drain digital output. Writing a 1 to the PIO bit in the Special Feature Register disables the output driver. With the PIO pin Hi-Z, it can be used as an input. The logic level of the PIO pin is reported in the Special Feature Register through the serial interface. To use the PIO pin as an output, write the desired output value to the PIO bit in the Special Feature Register. Writing a 0 to the PIO bit enables the PIO output driver, pulling the PIO pin to V SS. As stated above, writing a 1 to the PIO bit forces the pin to a Hi-Z state. A pullup resistor or current source must be provided to force the pin high. The PIO pin can be biased several volts above VDD allowing inter-operation with a system voltage which is higher than the battery voltage. Consult the Absolute Maximum Ratings table when operating the PIO pin significantly above VDD. The DS2756 turns off the PIO output driver and sets the PIO bit high when in Sleep mode or when DQ is low for more than t SLEEP, regardless of the state of the PMOD bit. INTERRUPT SIGNALING The DS2756 interrupt can be configured as the Suspend interrupt that is signaled on the PIO pin, or as an Alarm Comparator interrupt (based on Current Accumulator and Temperature Alarm Comparator thresholds) that is signaled on either the PIO pin or DQ pin. The Suspend interrupt is used to signal that the current level is greater than the user programmable Charge Suspend Threshold or less than (more negative) than the Discharge Suspend Threshold. The Suspend interrupt is enabled by setting one or both of the PIE bits in the Status Register. The PIE bits select one of three intervals for the Suspend Period, t SUS. If either PIE bit is set, the Alarm Comparator interrupt is disabled. The Suspend interrupt event is signaled by internally clearing the PIO bit in the SFR in order to force the PIO output from high to low. The PIO output remains low in Active mode until the PIO bit in the SFR is written to a 1 by the host to disable the PIO output. Note that the PIO output is disabled in Suspend mode, allowing the PIO pin to be pulled high and ensuring the DS2756 can always signal a Suspend interrupt with a high to low transition. The Temperature and ACR Alarm Comparator interrupt is enabled by setting the Interrupt Enable (IE) bit in the Special Feature Register with PIE cleared. When IE is set and both PIE bits are cleared, an interrupt will be signaled if the Alarm Comparator thresholds are crossed. A 1-Wire RESET always clears the IE bit. The host must re-enable interrupts by setting IE in the last transaction on the bus. Note that when either PIE bit is set, the state of IE has no effect. The interrupt signal pin for the Alarm Comparator interrupt is selected by setting or clearing the Interrupt Output Select (IOS) bit in the Status Register. When IOS is set, the DQ pin performs Alarm Comparator interrupt signaling, when IOS is cleared, the PIO pin performs Alarm Comparator interrupt signaling. Note that when either PIE bit is set, the state of IOS has no effect. DQ signals an Alarm Comparator interrupt condition by driving the 1-Wire bus low for t IL. The DS2756 and all other 1-Wire devices present on the bus interpret this signal as a 1-Wire RESET. A Presence Pulse should be expected from all 1-Wire devices, including the DS2756 following the alarm interrupt signal. The host system can sense the alarm interrupt signal on the falling or rising edge of either the RESET or Presence Pulse. PIO signals an Alarm Comparator interrupt by driving low. PIO remains low until the host clears the condition by writing a 1 to the PIO bit (bit 6 in the Special Feature Register). A pullup resistor or current source must be provided to force the pin high. The host must sense the alarm interrupt on the falling edge of PIO.
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 12 of 26 ALARM COMPARATORS AND INTERRUPT THRESHOLDS Alarm interrupt threshold values can be programmed by the user in the designated SRAM memory registers in the formats and locations found in Figure 11. Since these thresholds are located in SRAM memory, they must be reprogrammed if a loss of power to the DS2756 occurs. The DS2756 generates an alarm interrupt to indicate that one of the following events has occurred: /g167/g32Accumulated Current /g179 Current Accumulator Interrupt High Threshold /g167/g32Accumulated Current /g163 Current Accumulator Interrupt Low Threshold /g167/g32Temperature /g179 Temperature Interrupt High Threshold /g167/g32Temperature /g163 Temperature Interrupt Low Threshold The host may then poll the DS2756 to determine which threshold has been met or exceeded.
Figure 11. Alarm Interrupt Threshold Register Formats
Figure 12. Alarm And Suspend Mode Operating Diagram Threshold violations do not generate alarm interrupts until the Interrupt Enable (IE) bit is set. PIO Interrupts are cleared by resetting the PIO bit in the Special Feature Register .
Measurement of the current and voltage can be synchronized to a system event with the Snapshot mode. voltage sample. The Snapshot results are reported in the Current and Voltage registers for retrieval by the host. process, it should be used sparingly. Figure 13. Snapshot Synchronization Timing
Wire access to the bit values. Several bits are set internally but require the host system to write them to a 0 value. RAM regardless of whether the block is locked or not. Figure 14. EEPROM Access via Shadow RAM
Table 2. Memory Map
00 Reserved
01 Status Register R
07 EEPROM Register R/W
08 Special Feature Register R/W
10 Accumulated Current Register MSB R/W
11 Accumulated Current Register LSB R/W
18 Temperature Register MSB R
19 Temperature Register LSB R
*Each EEPROM block is read/write until locked by the LOCK command, after which it is read-only. paragraphs. Note that all bits are Read Only. Figure 15. STATUS REGISTER FORMAT DS2756 from entering Suspend mode and allows the DS2756 to enter Sleep mode.
Table 3. SUMMARY OF SUSPEND MODES The desired default value should be set in bit 6 and bit 7 of address 31h. The factory default is 00b. PMOD—Power Mode Enable. A value of 1 in this bit enables the DS2756 to enter Sleep mode or Suspend mode. operation is allowed. The desired default value must be set in bit 5 of address 31h. The factory default is 0. address 31h. The factory default is 0. must be set in bit 3 of address 31h. The factory default is 0. set in bit 2 of address 31h. The factory default is 0. must be set in bit 1 of address 31h. The factory default is 0. a recall of settings from EEPROM block 0. The factory default in bit 1 of address 31h is 0 (Standard 1-Wire timing). Figure 16. EEPROM Register Format
Lock command. After the Lock command is executed, the LOCK bit is reset to 0. The factory default is 0. is locked (read-only), while a 0 indicates block 1 is unlocked (read/write). is locked (read-only), while a 0 indicates block 1 is unlocked (read/write). is locked (read-only), while a 0 indicates block 0 is unlocked (read/write). Figure 17. Special Feature Register Format after each subsequent occurrence of a POR. This bit is read/write to 0. PIO— PIO Pin Sense and Control. See the Programmable I/O section for details on this read/write bit. Snapshot results persist in the Current and Voltage registers until the SNAP bit is written to a 0 by the host system. This bit is read/write to 0.
pulse, effectively terminating the transaction. Figure 20. Typical 1-Wire Bus Interface Circuitry suspend thresholds, the DS2756 will enter Suspend if configured to do so (PMOD = 1 and PIE ≠ 00). The sections that follow describe each of these steps in detail. more details, see the I/O Signaling section. that command in square brackets. Figure 21 presents a transaction flowchart of the net address commands. Read Net Address [33h or 39h]. This command allows the bus master to read the DS2756’s 1-Wire net address.
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 22 of 26 the function command and wait for a reset pulse. This command can be used with one or more slave devices on the bus. Skip Net Address [CCh]. This command saves time when there is only one DS2756 on the bus by allowing the bus master to issue a function command without specifying the address of the slave. If more than one slave device is present on the bus, a subsequent function command can cause a data collision when all slaves transmit data at the same time. Search Net Address [F0h]. This command allows the bus master to use a process of elimination to identify the 1- Wire net addresses of all slave devices on the bus. The search process involves the repetition of a simple three- step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this simple three-step routine on each bit location of the net address. After one complete pass through all 64 bits, the bus master knows the address of one device. The remaining devices can then be identified on additional iterations of the process. See Chapter 5 of the Book of DS19xx i Button Standards for a comprehensive discussion of a net address search, including an actual example. This publication can be found on the Maxim/Dallas website at www.maxim-ic.com. FUNCTION COMMANDS After successfully completing one of the net address commands, the bus master can access the features of the DS2756 with any of the function commands described in the following paragraphs. The name of each function is followed by the 8-bit opcode for that command in square brackets. Read Data [69h, XX]. This command reads data from the DS2756 starting at memory address XX. The LSb of the data in address XX is available to be read immediately after the MSb of the address has been entered. Because the address is automatically incremented after the MSb of each byte is received, the LSb of the data at address XX + 1 is available to be read immediately after the MSb of the data at address XX. If the bus master continues to read beyond address FFh, the DS2756 outputs logic 1 until a reset pulse occurs. Addresses labeled “reserved” in the memory map contain undefined data. The Read Data command can be terminated by the bus master with a reset pulse at any bit boundary. Write Data [6Ch, XX]. This command writes data to the DS2756 starting at memory address XX. The LSb of the data to be stored at address XX can be written immediately after the MSb of the address has been entered. Because the address is automatically incremented after the MSb of each byte is written, the LSb to be stored at address XX + 1 can be written immediately after the MSb to be stored at address XX. If the bus master continues to write beyond address FFh, the DS2756 ignores the data. Writes to read-only addresses, reserved addresses and locked EEPROM blocks are ignored. Incomplete bytes are not written. Writes to unlocked EEPROM blocks are to shadow RAM rather than EEPROM. See the Memory section for more details. Copy Data [48h, XX]. This command copies the contents of shadow RAM to EEPROM for the 32-byte EEPROM block containing address XX. Copy Data commands that address locked blocks are ignored. While the Copy Data command is executing, the EEC bit in the EEPROM Register is set to 1 and writes to EEPROM addresses are ignored. Reads and writes to non-EEPROM addresses can still occur while the copy is in progress. The Copy Data command execution time, t EEC, is 2ms typical and starts after the last address bit is transmitted. Recall Data [B8h, XX]. This command recalls the contents of the 32-byte EEPROM block containing address XX to shadow RAM. Lock [6Ah, XX]. This command locks (write-protects) the 32-byte block of EEPROM memory containing memory address XX. The LOCK bit in the EEPROM Register must be set to l before the Lock command is executed. If the LOCK bit is 0, the Lock command has no effect. The Lock command is permanent; a locked block can never be written again. Sync [D2h, XX]. This command allows the bus to be used to trigger current and voltage Snapshot readings. Following the issue of the Sync command, the bus returns to the idle state awaiting the measurement trigger. When the bus transitions high to low and then low to high on the first data bit issued after the command byte, the Snapshot measurements are performed. Only one bit of the data byte is required to trigger the Snapshot measurements. One Snapshot command must be issued for each Snapshot trigger event.
Table 4. FUNCTION COMMANDS
Figure 21. Net Address Command Flow Chart
1 BYTE
6 BYTES
PDH and then transmits the Presence Pulse for tPDL. Figure 22. 1-Wire Initialization Sequence 1/g109s minimum recovery time, tREC, between cycles. must be pulled high within 15 /g109s in Standard mode or 2 /g109s in Overdrive mode after the start of the write-time slot. the end of the write-time slot. the DS2756 accepts the bit value to be a 0. See Figure 23 for more information. A read-time slot is initiated when the bus master pulls the 1-Wire bus line from a logic-high level to a logic-low level. DS2756. All read-time slots must be tSLOT in duration with a 1/g109s minimum recovery time, tREC, between cycles.
DS2756: High-Accuracy Battery Fuel Gauge with Programmable Suspend Mode 26 of 26 Figure 23. 1-Wire Write- And Read-Time Slots
PACKAGE INFORMATION
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) LINE TYPE LEGEND: BUS MASTER ACTIVE LOW DS2756 ACTIVE LOW RESISTOR PULLUP BOTH BUS MASTER AND DS2756 ACTIVE LOW tSLOT VPULLUP GND READ 0 SLOT READ 1 SLOT tSLOT tREC >1/g109s tRDV tRDV VPULLUP GND tSLOT Standard tLOW1 tSLOT WRITE 0 SLOT WRITE 1 SLOT tLOW0 tREC >1/g109s DS2756 Sample Window MIN TYP MAX 15/g109s 15/g109s 30/g109s DS2755 Sample Window MIN TYP MAX 15/g109s15/g109s 30/g109s 2/g109s Overdrive Mode 1/g109s 3/g109s 1/g109s2/g109s 3/g109s