DS2740 MAXIM | Alldatasheet
Document overview
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Technical content
High-Precision Coulomb Counter
FEATURES
15-Bit Bidirectional Current Measurement (DS2740U) 1.56μV LSB and ±51.2mV Dynamic Range 78μA LSB and ±2.56A Dynamic Range with External 20mΩ Sense Resistor (RSNS) 156μA LSB and ±5.12A Dynamic Range with External 10mΩ Sense Resistor (RSNS) 13-Bit Bidirectional Current Measurement (DS2740BU) 6.25μV LSB and ±51.2mV Dynamic Range 312μA LSB and ±2.56A Dynamic Range with External 20mΩ Sense Resistor (RSNS) 625μA LSB and ±5.12A Dynamic Range with External 10mΩ Sense Resistor (RSNS) Analog Input Filter (IS1, IS2) Extends Dynamic Range for Pulse-Load
Applications
Current Accumulation Register Resolution 6.25μVhr (Both DS2740U and DS2740BU) 0.3125mAhr with External 20mΩ RSNS 0.6250mAhr with External 10mΩ RSNS Dallas 1-Wire® Interface Unique 64-Bit Device Address Standard and Overdrive Timings (OVD) Low Power Consumption: Active Current: 65μA max Sleep Current: 1μA max www.maxim-ic.com PIN CONFIGURATION PIO VDD DQ VSS IS1 IS2 O PIN DESCRIPTION OVD - 1-Wire Bus Speed Select PIO - Programmable I/O Pin SNS - Sense Resistor Input IS2 - Current-Sense Input IS1 - Current-Sense Input VSS - Device Ground, Current-Sense Resistor Return DQ - Data Input/Output VDD - Power-Supply Input (2.7V to 5.5V) μMAX (DS2740U, DS2740BU) SNS VD 7 2 See Table 1 for Ordering Information. See Table 2 for Detailed Pin Descriptions. 1-Wire is a registered trademark of Dallas Semiconductor.
Table 1. ORDERING INFORMATION Note: A “+” will also be marked on the package next to the pin 1 indicator.
DESCRIPTION
The DS2740 provides high-precision current-flow measurement data to support battery-capacity monitoring in cost-sensitive applications. Current is measured bidirectionally over a dynamic range of 15 bits (DS2740U) or 13 bits (DS2740BU) , with the net flow accumulated in a separate 16-bit register. Through its 1-Wire interface, the DS2740 allows the hos t system read/write access to status and current measurement registers. Each device has a unique factor y-programmed 64-bit net address that allows it to be individually addressed by the host system, supporting multibattery slot operation. The interface can be operated with standard or overdrive timing. Although the DS2740 is primarily intended for location on the host system, it is also suited for mounting in the battery pack. The DS2740 and FuelPack™ al gorithms, along with host measurements of temperature and voltage, form a complete and accurate solution for estimating remaining capacity. FuelPack is a trademark of Dallas Semiconductor. 2 of 16
Figure 1. BLOCK DIAGRAM
Table 2. DETAILED PIN DESCRIPTIONS registers. Open-drain output sufficient for LED or vibrator activation. allow filtering of the current waveform by an external capacitor. filtering of the current waveform through an external capacitor. the negative terminal of the battery cell. Data I/O Pin. Operates bidirectionally with open-drain output driver. Figure 2. APPLICATION EXAMPLE
correction is much less than 1/1024. the ACR. Figure 4 describes the ACR address, format, and resolution. Figure 4. CURRENT ACCUMULATOR FORMAT
command to prevent updates during the read and ensu re synchronization between the two register bytes. Table 3. MEMORY MAP
00 Reserved —
01 Status Register R/W
08 Special Feature Register R/W
10 Accumulated Current Register MSB R/W
11 Accumulated Current Register LSB R/W
Figure 5. STATUS REGISTER FORMAT 2s. A value of 0 disables DQ related transitions to Sleep mode. The power-up default of SMOD = 0. command to 33h, while a 1 sets the opcode to 39h. The power-up default of RNAOP = 0.
register contains the CRC value. Figure 8. 1-Wire CRC GENERATION BLOCK DIAGRAM separate output and input pins can be connected together. the bus begin to interpret the low period as a reset pulse, effectively terminating the transaction. listed in the Electrical Characteristics: 1-Wire Interface tables.
Figure 9. 1-Wire BUS INTERFACE CIRCUITRY The sections that follow describe each of these steps in detail. the bus and ready to operate. For more details, see the 1-Wire Signaling section. RNAOP = 0 indicating 33h, and RNAOP = 1 indicating 39h. one or more slave devices on the bus.
when all slaves transmit data at the same time. simultaneously responding to the Resume command function. Table 4. The name of each function is followed by the 8-bit opcode for that command in square brackets. of the data at address XX + 1 is available to be read immediately after the MSb of the data at address XX. If the bus master continues to read beyond address FFh, the DS2740 starts over at address 00h. be terminated by the bus master with a reset pulse at any bit boundary. the bus master continues to write beyond address FFh , the DS2740 starts over writing at address 00h. Memory section for more details. iButton is a registered trademark of Dallas Semiconductor.
Figure 10. NET ADDRESS COMMAND FLOW CHART
1 BYTE
6 BYTES
recovery time, tREC, between cycles. See Figure 12 for more information. Figure 12. 1-Wire WRITE- AND READ-TIME SLOTS
ABSOLUTE MAXIMUM RATINGS* Voltage on VDD, DQ, IS1, IS2, PIO, Relative to VSS -0.3V to +6V Voltage on SNS, Relative to VSS - 0 . 3 V t o + 6 V Operating Temperature Range -40°C to +85°C Storage Temperature Range -55°C to +125°C Soldering Temperature See IPC/JEDECJ-STD-020A * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (2.7V ≤ VDD ≤ 5.5V; TA = 0°C to +70°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage VDD (Note 1) 2.7 5.5 V Data Pin DQ (Note 1) -0.3 +5.5 V DC ELECTRICAL CHARACTERISTICS (2.7V ≤ VDD ≤ 4.2V; TA = 0°C to +70°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 50 65 Active Current IACTIVE VDD = 5.5V 85 μA VDD = 2.0V, DQ = PIO = VSS 0.6 1.0 Sleep-Mode Current ISLEEP VDD = 4.2V, DQ = PIO = VSS 0.9 1.25 μA Undervoltage Sleep Threshold VUV 2.3 2.5 2.7 V DS2740U 1.5625 Current Resolution ILSB DS2740BU 6.25 μV/RSNS Current Full-Scale Magnitude IFS 51.2 mV/RSNS DS2740U (Note 2) -3 +1 +5 Current Measurement Offset (Auto Calibrated) IOERR DS2740BU (Note 2) -2 0 +2 LSb Current Gain Error IGERR -1 +1 % of reading Accumulated Current Resolution qCA 6.25 μVh Current Sample Clock Frequency fSAMP 18.6 kHz VDD = 3.5V at +25°C -1 +1 Timebase Accuracy tERR -4 +4 % Input Logic High: OVD VIH (Note 1) VDD - 0.2V V Input Logic High: DQ, PIO VIH (Note 1) 1.5 V Input Logic Low: OVD VIL (Note 1) VSS + 0.2 V
Input Logic Low: DQ, PIO VIL (Note 1) 0.6 V Output Logic Low: DQ, PIO VOL IOL = 4mA (Note 1) 0.4 V DQ, PIO Input Pulldown Current IPD VDD = 4.2V, VDQ = 0.4V 0.5 μA OVD Input Leakage ILOVD PIO bit = 1 -1 1 μA DQ Capacitance CDQ 50 pF DQ Low to Sleep Time tSLEEP (Note 3) 2.0 2.4 s ELECTRICAL CHARACTERISTICS: 1-Wire INTERFACE—STANDARD SPEED (2.7V ≤ VDD ≤ 5.5V; TA = -20°C to +70°C.) PARAMETER SYMBOL MIN TYP MAX UNITS Time Slot tSLOT 60 120 μs Recovery Time tREC 1 μs Write 0 Low Time tLOW0 60 120 μs Write 1 Low Time tLOW1 1 15 μs Read Data Valid tRDV 15 μs Reset Time High tRSTH 480 μs Reset Time Low tRSTL 480 960 μs Presence Detect High tPDH 15 60 μs Presence Detect Low tPDL 60 240 μs ELECTRICAL CHARACTERISTICS: 1-Wire INTERFACE—OVERDRIVE SPEED (2.7V ≤ VDD ≤ 5.5V; TA = -20°C to +70°C.) PARAMETER SYMBOL MIN TYP MAX UNITS Time Slot tSLOT 6 16 μs Recovery Time tREC 1 μs Write 0 Low Time tLOW0 6 16 μs Write 1 Low Time tLOW1 1 2 μs Read Data Valid tRDV 2 μs Reset Time High tRSTH 48 μs Reset Time Low tRSTL 48 80 μs Presence Detect High tPDH 2 6 μs Presence Detect Low tPDL 8 24 μs Note 1: All voltages are referenced to VSS. Note 2: Offset performance requires proper circuit layout design free of surface contaminants. Note 3: The DS2740 enters the Sleep mode 2.0s to 2.4s after DQ goes low.