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The DS2711 and DS2712 are ideal for in -system or stand-alone charging of 1 or 2 AA or AAA NiMH “loose” cells. Temperature, voltage, and charge time are monitored to provide proper fast -charging control algorithms f or nickel metal hydride (NiMH) batteries. Battery tests are included to detect defective or inappropriate cells such as alkaline primary batteries. The DS2711/DS2712 support series and parallel topologies, with independent monitoring and control of each cell. Charging of NiCd chemistry cells is also supported.
APPLICATIONS
Desktop/Stand-Alone Chargers (AAA/AA) Digital Still Cameras Music Players Games Toys
FEATURES
Charge 1 or 2 NiMH Cells Detect and Avoid Charging Alkaline Cells Precharge Deeply Depleted Cells Fast Charge NiMH with -∆V Termination Sensitivity of 2mV (typ) Monitor Voltage, Temperature, and Time for Safety and Secondary Termination Regulate Charge Current: Linear Control (DS2711) Switch-Mode Control (DS2712) Drive pMOS or pnp-Type Pass Element or Switch, or an Optocoupler Compatible with Popular Optocouplers and Integrated Primary-Side PWM Controllers Small 16-Pin SO or TSSOP Packages PIN CONFIGURATION VP216 VP115 CC1 1 CC2 2 LED1 3 VSS 4 LED2 5 CSOUT 6 VN1 7 VN0 8 THM214 THM113 VDD12 TMR11 CTST10 DMSEL9 PIN DESCRIPTION PIN NAME FUNCTION
1 CC1 Cell 1 Charge-Control Output
2 CC2 Cell 2 Charge-Control Output
3 LED1 Cell 1 Status
4 VSS Ground Reference and Chip-
5 LED2 Cell 2 Status, Mode-Select Input
6 CSOUT Current-Sense Output
7 VN1 Current-Sense + Input
8 VN0 Current-Sense - Input
9 DMSEL Display-Mode Select
10 CTST Cell Test Threshold Set
11 TMR Charge Timer Set
12 VDD Chip-Supply Input (4.0V to 5.5V)
13 THM1 Cell 1 Thermistor Input
14 THM2 Cell 2 Thermistor Input
15 VP1 Cell 1 Positive-Terminal Sense
16 VP2 Cell 2 Positive-Terminal Sense
SO (150 mils) TSSOP (4.4mm) 19-5826; Rev 4/11
DS2711/DS2712: Loose-Cell NiMH Chargers 2 of 15 ABSOLUTE MAXIMUM RATINGS Soldering Temperature (reflow) This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (4.0V ≤ VDD ≤ 5.5V, TA = -20°C to +70°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage VDD (Note 1) 4.0 5.5 V Input Voltage Range LED2, DMSEL -0.3 +5.5 V DC ELECTRICAL CHARACTERISTICS (4.0V ≤ VDD ≤ 5.5V, TA = -20°C to +70°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current, VDD IDD Operating mode 250 500 µA UVLO Threshold VUVLO VDD rising (Note 1) 3.5 3.9 V UVLO Hysteresis VUHYS VDD falling from above VUVLO 40 mV Output-Voltage Low, CC1, CC2, LED1, LED2 VOL1 VDD = 5.0V, IOL = 20mA (Note 1) 1.0 V Output-Voltage Low, CSOUT VOL2 VDD = 5.0V, IOL = 20mA (Note 1) 0.75 1.25 V Leakage Current, CC1, CC2, LED1, LED2, CSOUT ILKG VDD = 5.0V, Output inactive -1 +1 µA Threshold Voltage, -∆V Termination V-∆V After tTHO 1.0 2.0 3.0 mV Mode Test Current, DMSEL, LED2 IMTST (Notes 2, 3) 5 15 µA Input Logic-High, DMSEL, LED2 VIH (Note 1) VDD - 0.2 V Input Logic-Low, DMSEL, LED2 VIL (Note 1) 0.2 V Input Leakage Current, DMSEL IIL1 After power-up mode select, DMSEL = VDD or VSS -1 +1 µA Threshold Voltage, Cell Test VCTST RCTST = 80kΩ 85 100 115 mV Threshold Voltage, Cell Voltage Low VBAT-LOW CC1 = CC2 = high-Z (Note 4) 0.9 1.0 1.1 V Threshold Voltage, Cell Voltage Max1 VBAT-MAX1 CC1 = CC2 = high-Z (Note 4) 1.55 1.65 1.75 V Threshold Voltage, Cell Voltage Max2 VBAT-MAX2 CC1, CC2 active (Note 4) 1.64 1.75 1.86 V Threshold Voltage Delta VBAT-MAXΔ VBAT-MAX2 - VBAT-MAX1 (Note 5) 90 100 110 mV
DS2711/DS2712: Loose-Cell NiMH Chargers 3 of 15 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Threshold Voltage, Thermistor - Min VTHM-MIN (Notes 1, 4, 6) VDD x 0.73 V Threshold Voltage, Thermistor - Max VTHM-MAX (Notes 1, 4, 6) 0.30 VDD x 0.33 0.36 V Threshold Voltage, Thermistor - Stop VTHM-STOP (Notes 1, 4, 6) VDD x 0.29 V Threshold Current, TMR Pin Suspend ITMR-SUS 0.1 0.5 µA Presence Test Current, VP1, VP2 IPTST Parallel: VDD ≥ 4.0V, Series: VDD ≥ 4.5V 10 15 µA Reverse Leakage Current, VP1, VP2 ILKGR VDD = 0V, VP1 = 1.5V, VP2 = 3.0V 2 µA Current-Sense Reference Voltage VIREF (Note 1, 4, 7) 125 mV -6% +6% % Gain, Current-Sense Error Amp GM DS2711 (Note 8) 0.9 1.5 Ω-1 Gain, Current-Sense Comparator GM DS2712 (Note 8) 10 Ω-1 Propagation Time, Current-Sense Comparator tPDLY DS2712, 2mV over/underdrive 0.25 µs Hysteresis, Current- Sense Comparator VHYS-COMP DS2712 22 24 26 mV ELECTRICAL CHARACTERISTICS: TIMING (4.0V ≤ VDD ≤ 5.5V, TA = -20°C to +70°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Internal Timebase Period tBASE 0.96 s Internal Timebase Accuracy -10 +10 % Duty Factor, Series Fast Charge CC1 0.969 Duty Factor, Series Precharge/Top-Off CC1 0.250 Duty Factor, Parallel Fast Charge CC1, CC2 0.484 Duty Factor, Parallel Precharge/Top-Off CC1, CC2 0.125 Duty Factor, Maintenance Charge CC1, CC2 0.0156 Cell Test Interval tCTST 31 Seconds Precharge Timeout tPCHG VCELL < VBAT-MIN 34 Minutes Fast-Charge Termination Hold-Off Period tTHO 4 Minutes Fast-Charge Flat Voltage Timeout tFLAT VCELL not increasing 16 Minutes Charge Timer Period tCTMR RTMR = 100kΩ 2.5 Hours
Note 1: Voltages relative to VSS. Note 2: IMTST current is applied as a source current and as a sink current within 5ms after power-up. proper operation. If the load capacitance is greater than 50pF, a resistor voltage-divider should be used to maintain DMSEL at VDD/2. Note 4: Specification applicable during charge cycle with TA = 0°C to +70°C. Note 5: VBAT-MAX1 and VBAT-MAX1 are generated from the same reference. Their ranges never overlap. Note 6: VTHM-MIN, VTHM-MAX, and VTHM-STOP are fixed ratios of VDD. Their ranges never overlap. Note 7: Tested with ICSOUT = -1mA. Note 8: Gain tested with 1mV step with ICSOUT = -1mA. Figure 1. Block Diagram
Figure 2. State Diagram
charge phases act as secondary or safety termination methods to provide additional protection from overcharge. chargers. The single -cell-series mode charges one cell while the two- cell-series mode charges two series cells. effective charge current is 0.969 x ICHG = 969mA. Figure 3. Series Configuration with External Current Regulation
to maintenance occur independently for each cell. resistance split between two separate resistors so each cell type (AA or AAA) is charged at a different rate. design must also prevent electrical contact with reverse polarity insertion. Figure 4. Parallel Configuration with External Current Regulation
be required to prevent overshoot with the batteries removed. Figure 5. Parallel Configuration with Switch-Mode Current Regulation (DS2712 Only)
precharge timer, hold-off timers, and timings for CC1/CC2 operation and cell testing are derived from this timebase. grounded side of the sense resistor using a separate, insulated conductor. Figure 6. Current-Sense Amplifier Response across the sense resistor is maintained at VIREF in a closed-loop circuit.
and the charge timer stops. The state machine and all timers are reset to their presence test conditions. recommended 10kΩ thermistors are shown in Table 2. voltage on THMx reaches VTHM-STOP, fast charging stops and the maintenance phase begins. Table 1. THM1, THM2 Thresholds Figure 7. Cell Voltage Sense Points
DS2711/DS2712: Loose-Cell NiMH Chargers 11 of 15 Cell Voltage Monitoring In the 2-cell series mode, the voltage difference between VP2 and VP1 is used to determine the Vcell2 voltage in the two-cell series stack. The voltage difference between VP1 and VN1 is used to determine the Vcell1 voltage. In the 1- cell series mode, the difference between VP1 and VN1 is used as the cell voltage. VP2 can be left disconnected in the 1 -cell series mode. In parallel mode, the difference between VP2 and VN1 is used for the Vcell2 voltage, and the difference between VP1 and VN1 is used for Vcell1 voltage. Individual cell voltages are monitored for minimum and maximum values, using the VBAT-MIN, VBAT-MAX1 and VBAT-MAX2 threshold limits. Upon inserting a cell or power -up with cells inserted, cell voltages must be less than the V BAT-MAX1 threshold before charging begins. The VBAT-MIN threshold determines whether a precharge cycle should precede the fast charge cycle, and when to transition from precharge to fast charge. Once fast charging commences, cell voltages are compared to the V BAT-MAX2 threshold once per second. The comparison occurs while the charge control pin (CC1 or CC2) controlling cur rent to the cell is active (low). When the charge control pin is active so charge is applied to the cell, the cell voltage is referred to as the V ON voltage. When the charge- control pin is inactive, the cell voltage is referred to as the VOFF voltage. If VBAT-MAX2 is exceeded in fast charge, charging is halted and a fault condition is displayed. While fast charge is in progress, cell voltage measurements are stored and compared to future measurements for charge termination and cell test purposes. Two types of tests are performed to detect primary alkaline and lithium cells or defective NiMH or NiCd secondary cells. Cells are tested individually in the series and parallel configurations, so that a single improper or defective cell can be detected quickly. In the series configuration, a single defective cell will terminate charge for both cells, whereas the parallel mode continues charging the good cell and stops charging the defective cell. VCTST is set by the resistance from the CTST pin to ground. The nom inal sensitivity of 100mV is set by connecting an 80kΩ resistor between CTST and VSS. The detection threshold can be set from 32mV to 400mV. The following formula approximates the setting for the detection threshold. VCTST = 8000/R (value in V) -ΔV and Flat Voltage Termination During fast charge, -∆V detection is performed by comparing successive voltage measurements for a drop of 2mV in the cell voltage. A hold- off period for - ∆V detection begins at the start of fast charging and prevents false termination in the first few minutes of the charge cycle. Once the hold- off period expires, cell voltage measurements are acquired every 32 clock cycles (during the CCx off time). When a newly acquired voltage measurement is greater than any previous one, the new value is retained as the maximum value. When the cell voltage no longer increases, the maximum value is retained and compared against subsequent values. If the cell voltage drops by the -∆V threshold, V-∆V, (2mV typ), fast charging is terminated. If the cell voltage remains flat such that the maximum value persists for a period of 16 minutes (t FLAT), fast charge terminates and top -off charging begins. Top-Off and Maintenance In top-off mode, the charger scales the cell current to 25% of the fast charge current. The charge timer is reset and restarted with a timeout period of one -half the fast -charge duration. When the charge timer expires in top -off, the charger enters maintenance and delivers 1/64 of the charge source current to the cells. Maintenance charge continuous until power is removed, the cell(s) are removed or the DS2711/DS2712 is cycled into and out of suspend mode by disconnecting the TMR pin. Selecting the Charge Mode The charge mode configuration is selected by testin g the LED2 pin during startup. An internal current source tests the state of the LED2 pin by pulling up and pulling down on the pin to determine if it is high, low, or open. The recommended pullup or pulldown resistor value (if used) is 100kΩ. In the parallel charging circuit diagrams on page 7, no resistor is shown. The current path through the LED and 270Ω resistor is sufficient to pull the LED2 pin high at power -up to select the parallel mode. See to the mode te st current (I MTST) specification in the D C Electrical Characteristics table to select other pullup values.
Table 2. Charge Mode Selection faulty cell would be stopped, while the proper cell is charged to full. disconnected in the 1-cell series mode. cell capacities using a 500mA and a 1000mA current source are shown in Table 3.
Table 3. Parallel Configuration, Each Cell 500mA and a 1000mA current source are shown in Table 4. Table 4. Series Configuration, Each Cell Table 5. Display Patterns by Display Mode and Charge Activity
DS2711/DS2712: Loose-Cell NiMH Chargers 14 of 15
ORDERING INFORMATION
PART TEMP RANGE PIN-PACKAGE TOP MARK DS2711Z -40°C to +85°C 16 SO DS2711 DS2711Z+ -40°C to +85°C 16 SO DS2711 DS2711Z/T&R -40°C to +85°C 16 SO DS2711 DS2711Z+T&R -40°C to +85°C 16 SO DS2711 DS2711E+ -40°C to +85°C 16 TSSOP DS2711 DS2711E+T&R -40°C to +85°C 16 TSSOP DS2711 DS2712Z -40°C to +85°C 16 SO DS2712 DS2712Z+ -40°C to +85°C 16 SO DS2712 DS2712Z/T&R -40°C to +85°C 16 SO DS2712 DS2712Z+T&R -40°C to +85°C 16 SO DS2712 DS2712E+ -40°C to +85°C 16 TSSOP DS2712 DS2712E+T&R -40°C to +85°C 16 TSSOP DS2712 +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel.
PACKAGE INFORMATION
For the latest pack age outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
16 SO S16+1 21-0041 90-0097
16 TSSOP U16+1 21-0066 90-0117
DS2711/DS2712: Loose-Cell NiMH Chargers 15 of 15 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408- 737 -7600 © 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
REVISION HISTORY
120808 Changed Figure 2 to include “T <0” as a condition to move from Pre-Charge to
Updated the lead and soldering temperature information in the Absolute Maximum Ratings section; updated Figure 1; updated the Internal Oscillator and Clock Generation section; added the Package Information table 3, 5, 10, 14