DS26C31MQML TI | Alldatasheet
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www.ti.com SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 DS26C31MQMLCMOS QuadTRI-STATEDifferentialLineDriver Check forSamples: DS26C31MQML 1FEATURES DESCRIPTION The DS26C31 is a quad differentialline driver 2• TTL InputCompatible designedfordigitaldata transmissionover balanced• Outputs WillNot Load LineWhen VCC = 0V lines.The DS26C31 meets allthe requirementsof
- Meets theRequirements ofEIA Standard RS- EIA standardRS-422 whileretainingthe low power 422 characteristicsofCMOS. The DS26C31 iscompatible withEIA standardRS-422;however,one exceptionin• Operationfrom Single5V Supply test methodology is taken. This enables the• TRI-STATE Outputs forConnection toSystem constructionof serialand terminalinterfaceswhileBuses maintainingminimalpower consumption.
- Low QuiescentCurrent The DS26C31 acceptsTTL orCMOS inputlevelsand translatesthese to RS-422 outputlevels.This part uses specialoutputcircuitrythatenablesthe drivers to power down withoutloadingdown the bus. This devicehas enableand disablecircuitrycommon toall fourdrivers.The DS26C31 ispincompatibleto the AM26LS31 and theDS26LS31. All inputsare protectedagainstdamage due to electrostaticdischargeby diodestoVCC and ground. Connection Diagram Figure1. CDIP, CLGA Packages- Top View See Package Numbers NFE0016A, NAD0016A Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 www.ti.com Figure2. 20-Lead LCCC Package- Top View See Package Number NAJ0020A Logic Diagram TruthTable (1) ENABLE ENABLE Input Non-Inverting Inverting Output Output L H X Z Z Allother L L H combinationsof H H L enableinputs (1) L = Low logicstate X = Irrelevant H = Highlogicstate Z = TRI-STATE (highimpedance)
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www.ti.com SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1)(2) SupplyVoltage(VCC ) −0.5Vto7.0V DC InputVoltage(VI) −1.5VtoVCC +0.5V DC OutputVoltage(VO ) −0.5Vto7V Clamp DiodeCurrent(IIK,IOK ) ±20 mA DC OutputCurrent,perpin(IO ) ±150 mA DC VCC orGnd Current,perpin(ICC ) ±150 mA StorageTemperatureRange (TStg) −65°C ≤ TA ≤ +150°C Lead Temperature(TL) Soldering,4 sec. 260°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notverifyspecificperformancelimits.Forverifiedspecificationsand testconditions,see the ElectricalCharacteristics.The verifiedspecificationsapplyonlyforthetestconditionslisted.Some performancecharacteristicsmay degradewhen thedeviceisnotoperatedunderthelistedtestconditions. (2) Unlessotherwisespecified,allvoltagesarereferencedtoground.Allcurrentsintodevicepinsarepositive,allcurrentsoutofdevice pinsarenegative. OperatingConditions Min Max Units SupplyVoltage(VCC ) 4.50 5.50 V DC InputorOutputVoltage (VI,VO ) 0 VCC V OperatingTemperatureRange (TA) −55 +125 °C QualityConformance Inspection Table1.Mil-Std-883,Method 5005 -Group A Subgroup Description Temp °C
1 Statictestsat +25
2 Statictestsat +125
3 Statictestsat -55
4 Dynamic testsat +25
5 Dynamic testsat +125
6 Dynamic testsat -55
7 Functionaltestsat +25
9 Switchingtestsat +25
10 Switchingtestsat +125
11 Switchingtestsat -55
12 Settlingtimeat +25
13 Settlingtimeat +125
14 Settlingtimeat -55
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SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 www.ti.com DS26C31M ElectricalCharacteristicsDC Parameters Sub-Parameter TestConditions Notes Min Max Unit groups VIH Logical"1"InputVoltage 2.0 V 1,2,3 VIL Logical"0"InputVoltage 0.8 V 1,2,3 VOH Logical"1"OutputVoltage VI= VIH orVIL, 2.5 V 1,2,3 VCC = 4.5V,IO = -20mA VOL Logical"0"OutputVoltage VI= VIH orVIL, 0.5 V 1,2,3 IO = 20mA, VCC = 4.5V VT DifferentialOutputVoltage R L = 100Ω,VCC = 4.5V (1) 2.0 V 1,2,3 |VT|− |VT | DifferenceinDifferentialOutput R L = 100Ω,VCC = 4.5V (1) 0.4 V 1,2,3 VOS Common Mode OutputVoltage R L = 100Ω,VCC = 5.5V (1) 3.0 V 1,2,3 |VOS −VOS | DiffinCommon Mode Output R L = 100Ω,VCC = 5.5V (1) 0.4 V 1,2,3 II InputCurrent VI= VCC ,Gnd, VIH,orVIL, ±1.0 µA 1,2,3 VCC = 5.5V ICC QuiescentPower SupplyCurrent IO = 0µA,VI= VCC orGnd, (2) 500 µA 1,2,3 VCC = 5.5V IO = 0µA,VI= 2.4Vor0.5V, (2) 2.1 mA 1,2,3 VCC = 5.5V IOZ TRI-STATE OutputLeakage VO = VCC orGnd, Enable= VIL, ±5.0 µA 1,2,3 Current VCC = 5.5V,Enable= VIH ISC OutputShortCircuitCurrent VI= VCC orGnd, VCC = 5.5V (1),(3) -30 -150 mA 1,2,3 IOff OutputLeakage Current"Power VCC = 0V,VO = 6V 100 µA 1,2,3 Off" VCC = 0V,VO = 0V -100 µA 1,2,3 (1) See EIA SpecificationRS-422 forexacttestconditions. (2) Measured perinput.AllotherinputsatVCC orGND. (3) Thisisthecurrentsourcedwhen a highoutputisshortedtoground.Onlyone outputata timeshouldbe shorted. DS26C31M ElectricalCharacteristicsAC Parameters -PropagationDelay Time (seeFigure26) The followingconditionsapply,unlessotherwisespecified.VCC = 5V,tR ≤ 6ns,tF ≤ 6ns Sub-Parameter TestConditions Notes Min Max Unit groups tPLH InputtoOutputProp Delay Figure27 14 ns 9,10,11 tPHL InputtoOutputProp Dalay Figure27 14 ns 9,10,11 Skew (1) 3.0 ns 9,10,11 tTLH OutputRiseTime Figure29 14 ns 9,10,11 tTHL OutputFallTime Figure29 14 ns 9,10,11 tPZH OutputEnableTime Figure28 22 ns 9,10,11 tPZL OutputEnableTime Figure28 28 ns 9,10,11 tPHZ OutputDisableTime Figure28 (2) 12 ns 9,10,11 tPLZ OutputDisableTime Figure28 (2) 14 ns 9,10,11 (1) Skew isdefinedas thedifferenceinpropagationdelaysbetween complimentaryoutputsatthe50% point. (2) OutputdisabletimeisthedelayfromENABLE orENABLE beingswitchedtotheoutputtransistorsturningoff.
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www.ti.com SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 TypicalPerformance Characteristics DifferentialPropagationDelay DifferentialPropagationDelay vs Temperature vs Power Supply Voltage Figure3. Figure4. DifferentialSkew vs DifferentialSkew vs Power Temperature Supply Voltage Figure5. Figure6. DifferentialTransitionTime DifferentialTransitionTime vs Temperature vs Power Supply Voltage Figure7. Figure8. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS26C31MQML
SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics(continued) Complementary Skew vs Complementary Skew vs Temperature Power Supply Voltage Figure9. Figure10. DifferentialOutput Voltage DifferentialOutput Voltage vs Output Current vs Output Current Figure11. Figure12. Output High Voltagevs Output High Voltagevs Output High Current Output High Current Figure13. Figure14.
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www.ti.com SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 TypicalPerformance Characteristics(continued) Output Low Voltagevs Output Low Voltagevs Output Low Current Output Low Current Figure15. Figure16. Supply Current Output Low Voltagevs vs Temperature Output Low Current Figure17. Figure18. Output Low Voltagevs Supply Current Output Low Current vs Temperature Figure19. Figure20. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS26C31MQML
SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics(continued) Supply Currentvs No Load Supply Current Power Supply Voltage vs Data Rate Figure21. Figure22. Loaded Supply Current Output ShortCircuitCurrent vs Data Rate vs Temperature Figure23. Figure24. Output ShortCircuitCurrent vs Power Supply Voltage Figure25.
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www.ti.com SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS Note:C1 = C2 = C3 = 40 pF (IncludingProbe and JigCapacitance),R1 = R2 = 50Ω,R3 = 500Ω. Figure26. AC TestCircuit Figure27. PropagationDelays Figure28. Enable and DisableTimes Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS26C31MQML
SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013 www.ti.com Inputpulse;f= 1 MHz, 50%; tr ≤ 6 ns,tf≤ 6 ns Figure29. DifferentialRise and FallTimes TYPICAL APPLICATIONS *RT isoptionalalthoughhighlyrecommended toreducereflection. Figure30. Two-Wire Balanced System, RS-422
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www.ti.com SNOSAS2A –OCTOBER 2010–REVISED APRIL 2013
REVISION HISTORY
Table2.RevisionHistory Released Revision Section Changes 10/26/2010 A New Release,Corporateformat 1 MDS datasheetsconvertedintoone Corp.data sheetformat.MNDS26C31M-X Rev 0B0 willbe archived. Changes from Original(April2013)toRevisionA Page Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS26C31MQML
www.ti.com 29-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS26C31ME/883 Active Production LCCC (NAJ) | 20 50 | TUBE Yes Call TI Level-1-NA-UNLIM -55 to 125 DS26C31ME/ 883 Q 5962-91639 01M2A ACO 01M2A >T DS26C31ME/883.A Active Production LCCC (NAJ) | 20 50 | TUBE Yes Call TI Level-1-NA-UNLIM -55 to 125 DS26C31ME/ 883 Q 5962-91639 01M2A ACO 01M2A >T DS26C31MJ/883 Active Production CDIP (NFE) | 16 25 | TUBE No Call TI Level-1-NA-UNLIM -55 to 125 DS26C31MJ/883 5962-9163901MEA Q DS26C31MJ/883.A Active Production CDIP (NFE) | 16 25 | TUBE No Call TI Level-1-NA-UNLIM -55 to 125 DS26C31MJ/883 5962-9163901MEA Q DS26C31MW/883 Active Production CFP (NAD) | 16 19 | TUBE No Call TI Level-1-NA-UNLIM -55 to 125 DS26C31MW /883 Q 5962-91639 01MFA ACO 01MFA >T DS26C31MW/883.A Active Production CFP (NAD) | 16 19 | TUBE No Call TI Level-1-NA-UNLIM -55 to 125 DS26C31MW /883 Q 5962-91639 01MFA ACO 01MFA >T (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1
www.ti.com 29-May-2025 (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) DS26C31ME/883 NAJ LCCC 20 50 470 11 3810 0 DS26C31ME/883.A NAJ LCCC 20 50 470 11 3810 0 DS26C31MJ/883 NFE CDIP 16 25 506.98 15.24 13440 NA DS26C31MJ/883 NFE CDIP 16 25 506.98 15.24 13440 NA DS26C31MJ/883.A NFE CDIP 16 25 506.98 15.24 13440 NA DS26C31MJ/883.A NFE CDIP 16 25 506.98 15.24 13440 NA DS26C31MW/883 NAD CFP 16 19 502 23 9398 9.78 DS26C31MW/883.A NAD CFP 16 19 502 23 9398 9.78 Pack Materials-Page 1
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