DS26C31T TI | Alldatasheet

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Sample & Buy T echnical Documents Tools & Software Support & Community DS26C31M,DS26C31T SNLS375C –JUNE 1998–REVISED JANUARY 2015 DS26C31xCMOSQuadTri-StateDifferentialLineDriver

1 Features 3 Description

The DS26C31 device is a quad differential line driver 1• TTL Input Compatible designed for digital data transmission over balanced• Typical Propagation Delays: 6 ns lines. The DS26C31T meets all the requirements of

  • Typical Output Skew: 0.5 ns EIA standard RS-422 while retaining the low power characteristics of CMOS. The DS26C31M is• Outputs Will Not Load Line When VCC = 0 V compatible with EIA standard RS-422; however, one• DS26C31T Meets the Requirements of EIA exception in test methodology is taken(2). ThisStandard RS-422 enables the construction of serial and terminal
  • Operation From Single 5-V Supply interfaces while maintaining minimal power consumption.• Tri-State Outputs for Connection to System Buses
  • Low Quiescent Current The DS26C31 accepts TTL or CMOS input levels and translates these to RS-422 output levels. This part• Available in Surface Mount uses special output circuitry that enables the drivers• Mil-Std-883C Compliant to power down without loading down the bus. This device has enable and disable circuitry common to all2 Applications four drivers. The DS26C31 is pin compatible to the Differential Line Driver for RS-422 Applications AM26LS31 and the DS26LS31. All inputs are protected against damage due to electrostatic discharge by diodes to VCC and ground. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SNLS3759577 9.90 mm × 3.91 mm DS26C31M PDIP (16) 19.304 mm × 6.35 mm SNLS3759577 9.90 mm × 3.91 mm DS26C31T PDIP (16) 19.304 mm × 6.35 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. (2) The DS26C31M (−55°C to 125°C) is tested with VOUT between 6 V and 0 V while RS-422A condition is 6 V and −0.25 V.

4 Device Logic Diagram

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

DS26C31M,DS26C31T SNLS375C –JUNE 1998–REVISED JANUARY 2015 www.ti.com Table of Contents

5 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (April 2013) to Revision C Page

  • Added Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Changes from Revision A (April 2013) to Revision B Page

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Product Folder Links: DS26C31M DS26C31T

DS26C31M,DS26C31T www.ti.com SNLS375C –JUNE 1998–REVISED JANUARY 2015

6 Pin Configuration and Functions

NAME NO.(1) DIFFERENTIAL SIGNALING I/O CHANNEL A 3, 2 O Channel A inverting and non-inverting differential driver outputsOUTPUTS (–, +) CHANNEL B 5, 6 O Channel B inverting and non-inverting differential driver outputsOUTPUTS (–, +) CHANNEL C 11, 10 O Channel C inverting and non-inverting differential driver outputsOUTPUTS (–, +) CHANNEL D 13, 14 O Channel D inverting and non-inverting differential driver outputsOUTPUTS (–, +) INPUT A 1 I TTL/CMOS compatible input for channel A INPUT B 7 I TTL/CMOS compatible input for channel B INPUT C 9 I TTL/CMOS compatible input for channel C INPUT D 15 I TTL/CMOS compatible input for channel D CONTROL PINS ENABLE 4 I Logic-high ENABLE Control ENABLE 12 I Logic-low ENABLE Control POWER GND 8 — GND Pin VCC 16 — Supply pin, provide 5 V supply (1) Pin numbers correspond to PDIP and SOIC packages. Copyright © 1998–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: DS26C31M DS26C31T

DS26C31M,DS26C31T SNLS375C –JUNE 1998–REVISED JANUARY 2015 www.ti.com

7 Specifications

7.1 Absolute Maximum Ratings(1)(2)(3)

Supply Voltage (VCC) −0.5 7 V DC Input Voltage (VIN) −1.5 VCC +1.5 V DC Output Voltage (VOUT) −0.5 7 V Clamp Diode Current (IIK, IOK) –20 20 mA DC Output Current, per pin (IOUT) –150 150 mA DC VCC or GND Current, per pin (ICC) Max Power Dissipation (PD) at 25°C(4) Ceramic “NFE”package 2419 mW Plastic “NFG”package 1736 mW SOIC “D”package 1226 mW Ceramic “NAD”package 1182 mW Ceramic “NAJ”package 2134 mW Lead Temperature (TL) (Soldering, 4 s) 260 °C Storage Temperature, Tstg −65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Unless otherwise specified, all voltages are referenced to ground. All currents into device pins are positive, all currents out of device pins are negative. (3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (4) Ratings apply to ambient temperature at 25°C. Above this temperature derate NFG package at 13.89 mW/°C, NFE package 16.13 mW/°C, D package 9.80 mW/°C, NAJ package 12.20 mW/°C, and NAD package 6.75 mW/°C.

7.2 Recommended Operating Conditions

Supply Voltage (VCC) 4.50 5.50 V DC Input or Output Voltage (VIN, VOUT) 0 VCC V Operating Temperature Range (TA) DS26C31T −40 85 °C DS26C31M −55 125 °C Input Rise or Fall Times (tr, tf) 500 ns

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Product Folder Links: DS26C31M DS26C31T

DS26C31M,DS26C31T www.ti.com SNLS375C –JUNE 1998–REVISED JANUARY 2015

7.3 DC Electrical Characteristics

VCC = 5 V ± 10% (unless otherwise specified)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIH High Level Input Voltage 2.0 V VIL Low Level Input Voltage 0.8 V VOH High Level Output Voltage VIN = VIH or VIL, 2.5 3.4 V IOUT = −20 mA VOL Low Level Output Voltage VIN = VIH or VIL, 0.3 0.5 V IOUT = 20 mA VT Differential Output Voltage RL = 100 Ω 2.0 3.1 V See(2) |VT| − |VT | Difference In Differential Output RL = 100 Ω 0.4 V See(2) VOS Common Mode Output Voltage RL = 100 Ω 1.8 3.0 V See(2) |VOS − VOS | Difference In Common Mode RL = 100 Ω 0.4 V Output See(2) IIN Input Current VIN = VCC, GND, VIH, or VIL ±1.0 μA ICC Quiescent Supply Current(3) DS26C31T VIN = VCC or GND 200 500 μA IOUT = 0 μA VIN = 2.4 V or 0.5 V(3) 0.8 2.0 mA DS26C31M VIN = VCC or GND 200 500 μA IOUT = 0 μA VIN = 2.4 V or 0.5 V(3) 0.8 2.1 mA IOZ TRI-STATE Output Leakage VOUT = VCC or GND Current ENABLE = VIL ±0.5 ±5.0 μA ENABLE = VIH ISC Output Short Circuit Current VIN = VCC or GND(2)(4) −30 −150 mA IOFF Output Leakage Current Power DS26C31T VOUT = 6 V 100 μA Off(2) VCC = 0 V VOUT = −0.25 V −100 μA DS26C31M VOUT = 6 V 100 μA VCC = 0 V VOUT = 0 V(5) −100 μA (1) Unless otherwise specified, min/max limits apply across the recommended operating temperature range. All typicals are given for VCC = 5 V and TA = 25°C. (2) See EIA Specification RS-422 for exact test conditions. (3) Measured per input. All other inputs at VCC or GND. (4) This is the current sourced when a high output is shorted to ground. Only one output at a time should be shorted. (5) The DS26C31M (−55°C to +125°C) is tested with VOUT between +6 V and 0 V while RS-422A condition is +6 V and −0.25 V. Copyright © 1998–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DS26C31M DS26C31T

DS26C31M,DS26C31T SNLS375C –JUNE 1998–REVISED JANUARY 2015 www.ti.com

7.4 Switching Characteristics

VCC = 5 V ±10%, tr ≤ 6 ns, tf ≤ 6 ns (Figure 22, Figure 23, Figure 24, Figure 25)(1) DS26C31T DS26C31M PARAMETER TEST CONDITIONS MIN TYP UNIT MAX MAX tPLH, tPHL Propagation Delays Input to Output S1 Open 2 6 11 14 ns Skew (2) S1 Open 0.5 2.0 3.0 ns tTLH, tTHL Differential Output Rise And Fall S1 Open 6 10 14 ns Times tPZH Output Enable Time S1 Closed 11 19 22 ns tPZL Output Enable Time S1 Closed 13 21 28 ns tPHZ Output Disable Time(3) S1 Closed 5 9 12 ns tPLZ Output Disable Time(3) S1 Closed 7 11 14 ns CPD Power Dissipation Capacitance(4) 50 pF CIN Input Capacitance 6 pF (1) Unless otherwise specified, min/max limits apply across the recommended operating temperature range. All typicals are given for VCC = 5 V and TA = 25°C. (2) Skew is defined as the difference in propagation delays between complementary outputs at the 50% point. (3) Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. The actual disable times are less than indicated due to the delay added by the RC time constant of the load. (4) CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC.

7.5 Comparison Table of Switching Characteristics into “LS-Type” Load

VCC = 5 V, TA = 25°C, tr ≤ 6 ns, tf ≤ 6 ns (Figure 23, Figure 25, Figure 26, Figure 27) (1) DS26C31T DS26LS31CTESTPARAMETER UNITCONDITIONS TYP MAX TYP MAX tPLH, tPHL Propagation Delays Input to Output CL = 30 pF S1 Closed 6 8 10 15 ns S2 Closed Skew See(2) CL = 30 pF S1 Closed 0.5 1.0 2.0 6.0 ns S2 Closed tTHL, tTLH Differential Output Rise and Fall CL = 30 pF Times S1 Closed 4 6 ns S2 Closed tPLZ Output Disable Time(3) CL = 10 pF S1 Closed 6 9 15 35 ns S2 Open tPHZ Output Disable Time(3) CL = 10 pF S1 Open 4 7 15 25 ns S2 Closed tPZL Output Enable Time CL = 30 pF S1 Closed 14 20 20 30 ns S2 Open tPZH Output Enable Time CL = 30 pF S1 Open 11 17 20 30 ns S2 Closed (1) This table is provided for comparison purposes only. The values in this table for the DS26C31 reflect the performance of the device but are not tested or verified. (2) Skew is defined as the difference in propagation delays between complementary outputs at the 50% point. (3) Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. The actual disable times are less than indicated due to the delay added by the RC time constant of the load.

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Product Folder Links: DS26C31M DS26C31T

7.6 Typical Characteristics

Figure 1. Differential Propagation Delay vs Temperature Figure 2. Differential Propagation Delay vs Power Supply Figure 3. Differential Skew vs Temperature Figure 4. Differential Skew vs Power Supply Voltage Figure 5. Differential Transition Time vs Temperature Figure 6. Differential Transition Time vs Power Supply

Figure 7. Complementary Skew vs Temperature Figure 8. Complementary Skew vs Power Supply Voltage Figure 9. Differential Output Voltage vs Output Current Figure 10. Differential Output Voltage vs Output Current Figure 11. Output High Voltage vs Output High Current Figure 12. Output High Voltage vs Output High Current

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Figure 19. Supply Current vs Power Supply Voltage Figure 20. Output Short Circuit Current vs Temperature Figure 21. Output Short Circuit Current vs Power Supply Voltage

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8 Parameter Measurement Information

Note: C1 = C2 = C3 = 40 pF (Including Probe and Jig Capacitance), R1 = R2 = 50Ω, R3 = 500Ω. Figure 22. AC Test Circuit Figure 23. Propagation Delays Figure 24. Enable and Disable Times Figure 25. Differential Rise and Fall Times

Figure 26. Load AC Test Circuit for “LS-Type” Load Figure 27. Enable and Disable Times for “LS-Type” Load

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9 Detailed Description

9.1 Overview

supports a temperature range of -40°C to 85°C.

9.2 Functional Block Diagram

9.3 Feature Description

9.4 Device Functional Modes

Table 1. Function Table(1)

validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.2 Typical Application

Figure 28 depicts a typical implementation of the DS26C31x device in a RS-422 application. *RT is optional although highly recommended to reduce reflection. Figure 28. Two-Wire Balanced System, RS-422

10.2.1 Design Requirements

  • Apply TTL or LVCMOS signal to driver input lines INPUT A-D.
  • Transmit complementary outputs at OUTPUT A-D.
  • Use controlled-impedance transmission lines such as printed circuit board traces, twisted-pair wires or parallel wire cable.
  • Place a terminating resistor at the far end of the differential pair.

10.2.2 Detailed Design Procedure

  • Connect VCC and GND pins to the power and ground planes of the PCB with a 0.1-µF bypass capacitor.
  • Use TTL/LVCMOS logic levels at INPUT A-D.
  • Use controlled-impedance transmission media for the differential output signals.
  • Place an optional terminating resistor at the far-end of the differential pair to avoid reflection.

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10.2.3 Application Curves

Figure 29. No Load Supply Current vs Data Rate Figure 30. Loaded Supply Current vs Data Rate

11 Power Supply Recommendations

that the capacitor is as close as possible to the device.

12 Layout

12.1 Layout Guidelines

routed with uniform trace width and spacing to minimize impedance mismatching.

12.2 Layout Example

Figure 31. DS26C31 Example Layout

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13 Device and Documentation Support

13.1 Related Links

resources, tools and software, and quick access to sample or buy. Table 2. Related Links

13.2 Trademarks

All trademarks are the property of their respective owners.

13.3 Electrostatic Discharge Caution

during storage or handling to prevent electrostatic damage to the MOS gates.

13.4 Glossary

This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS26C31TM/NOPB Active Production SOIC (D) | 16 48 | TUBE Yes SN Level-1-260C-UNLIM -40 to 85 DS26C31TM DS26C31TM/NOPB.A Active Production SOIC (D) | 16 48 | TUBE Yes SN Level-1-260C-UNLIM -40 to 85 DS26C31TM DS26C31TM/NOPB.B Active Production SOIC (D) | 16 48 | TUBE Yes SN Level-1-260C-UNLIM -40 to 85 DS26C31TM DS26C31TMX/NOPB Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 85 DS26C31TM DS26C31TMX/NOPB.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 85 DS26C31TM DS26C31TMX/NOPB.B Active Production SOIC (D) | 16 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 85 DS26C31TM (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 23-May-2025 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS26C31TMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) DS26C31TM/NOPB D SOIC 16 48 495 8 4064 3.05 DS26C31TM/NOPB.A D SOIC 16 48 495 8 4064 3.05 DS26C31TM/NOPB.B D SOIC 16 48 495 8 4064 3.05 Pack Materials-Page 3

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