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DS25BR110TSD/NOPB

Texas Instruments

3.125 Gbps LVDS Buffer with Receive Equalization

Manufacturer: Texas Instruments

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www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013 DS25BR1103.125GbpsLVDSBufferwithReceiveEqualization Check forSamples: DS25BR110 1FEATURES DESCRIPTION The DS25BR110 is a singlechannel 3.125 Gbps 2• DC -3.125Gbps Low Jitter,High Noise LVDS buffer optimized for high-speed signalImmunity,Low Power Operation transmissionover lossyFR-4 printedcircuitboard• Four LevelsofReceive EqualizationReduce backplanes and balanced metalliccables.A fully ISIJitter differentialsignalpath ensures exceptionalsignal integrityand noiseimmunity.• On-Chip 100Ω Inputand Output Termination MinimizesInsertionand Return Losses, The DS25BR110 featuresfour levelsof receiveReduces Component Count,and Minimizes equalization(EQ), making itidealfor use as a Board Space receiverdevice.Other LVDS deviceswithsimilarIO characteristicsincludethe followingproducts.The• 7 kV ESD on LVDS I/OPins ProtectsAdjoining DS25BR120 featuresfourlevelsofpre-emphasisforComponents use as an optimized driverdevice, while the• Small 3 mm x 3 mm 8-WSON Space Saving DS25BR100 features both pre-emphasis andPackage equalizationforuse as an optimizedrepeaterdevice. The DS25BR150 isa buffer/repeaterwiththelowest APPLICATIONS power consumption and does not featuretransmit pre-emphasisnorreceiveequalization.• Clock and Data Buffering

MetallicCable Equalization Wide inputcommon mode range allowsthereceiver to accept signalswith LVDS, CML and LVPECL• FR-4 Equalization levels;the outputlevelsare LVDS. A very small package footprintrequiresminimal space on the boardwhiletheflow-throughpinoutallowseasy board layout.The differentialinputs and outputs are internallyterminatedwitha 100Ω resistorto lower device input and output return losses, reduce component count,and furtherminimizeboardspace. TypicalApplication Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2007–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNLS255E –MARCH 2007–REVISED APRIL 2013 www.ti.com Block Diagram Pin Diagram Pin Descriptions Pin Type Description Name Number EQ0 1 Input Equalizerselectpin. IN+ 2 Input Non-invertingLVDS inputpin. IN- 3 Input InvertingLVDS inputpin. EQ1 4 Input Equalizerselectpin. NC 5 NA "NO CONNECT" pin. OUT- 6 Output InvertingLVDS outputpin. OUT+ 7 Output Non-invertingLVDS Outputpin. VCC 8 Power Power supplypin. GND DAP Power Ground pad (DAP -dieattachpad) ControlPins (EQ0 and EQ1) TruthTables EQ1 EQ0 EqualizationLevel 0 0 Off 0 1 Low (Approx.4 dB at1.56GHz) 1 0 Medium (Approx.8 dB at1.56GHz) 1 1 High(Approx.16 dB at1.56GHz) These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.

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www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013 AbsoluteMaximum Ratings(1)(2) SupplyVoltage(VCC ) −0.3Vto+4V LVCMOS InputVoltage(EQ0,EQ1) −0.3Vto(VCC + 0.3V) LVDS InputVoltage(IN+,IN−) −0.3Vto+4V DifferentialInputVoltage|VID| 1.0V LVDS OutputVoltage(OUT+, OUT −) −0.3Vto(VCC + 0.3V) LVDS DifferentialOutputVoltage((OUT+)-(OUT −)) 0V to1.0V LVDS OutputShortCircuitCurrentDuration 5 ms JunctionTemperature +150°C StorageTemperatureRange −65°C to+150°C Lead TemperatureRange Soldering(4sec.) +260°C Maximum Package Power Dissipationat NGQ0008A Package 2.08W 25°C DerateNGQ0008A Package 16.7mW/ °C above +25°C Package ThermalResistance θJA +60.0°C/W θJC +12.3°C/W HBM (3) ≥7 kV ESD Susceptibility MM (4) ≥250V CDM (5) ≥1250V (1) “AbsoluteMaximum Ratings”indicatelimitsbeyond whichdamage tothedevicemay occur,includinginoperabilityand degradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximum Ratingsor otherconditionsbeyond thoseindicatedintheRecommended OperatingConditionsisnotimplied.The Recommended Operating Conditionsindicateconditionsatwhichthedeviceisfunctionaland thedeviceshouldnotbe operatedbeyond such conditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. (3) Human Body Model,applicablestd.JESD22-A114C (4) Machine Model,applicablestd.JESD22-A115-A (5) FieldInducedCharge DeviceModel,applicablestd.JESD22-C101-C Recommended OperatingConditions Min Typ Max Units SupplyVoltage(VCC ) 3.0 3.3 3.6 V ReceiverDifferentialInputVoltage(VID) 1.0 V OperatingFreeAirTemperature(TA) −40 +25 +85 °C Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS25BR110

SNLS255E –MARCH 2007–REVISED APRIL 2013 www.ti.com DC ElectricalCharacteristics Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3) Parameter TestConditions Min Typ Max Units LVCMOS INPUT DC SPECIFICATIONS (EQ0,EQ1) VIH HighLevelInputVoltage 2.0 VCC V VIL Low LevelInputVoltage GND 0.8 V IIH HighLevelInputCurrent VIN = 3.6V 0 ±10 μA VCC = 3.6V IIL Low LevelInputCurrent VIN = GND 0 ±10 μA VCC = 3.6V VCL InputClamp Voltage ICL = −18 mA, VCC = 0V -0.9 −1.5 V LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) VOD DifferentialOutputVoltage 250 350 450 mV R L = 100ΩΔVOD Change inMagnitudeofVOD forComplimentary -35 35 mVOutputStates VOS OffsetVoltage 1.05 1.2 1.375 V R L = 100ΩΔVOS Change inMagnitudeofVOS forComplimentary -35 35 mVOutputStates IOS OutputShortCircuitCurrent(4) OUT toGND -35 -55 mA OUT toVCC 7 55 mA C OUT OutputCapacitance Any LVDS OutputPintoGND 1.2 pF R OUT OutputTerminationResistor Between OUT+ and OUT- 100 Ω LVDS INPUT DC SPECIFICATIONS (IN+,IN-) VID InputDifferentialVoltage 0 1 V VTH DifferentialInputHighThreshold VCM = +0.05V orVCC -0.05V 0 +100 mV VTL DifferentialInputLow Threshold −100 0 mV VCMR Common Mode VoltageRange VID = 100 mV 0.05 VCC - V 0.05 VIN = 3.6Vor0V ±1 ±10 μAIIN InputCurrent VCC = 3.6Vor0V C IN InputCapacitance Any LVDS InputPintoGND 1.7 pF R IN InputTerminationResistor Between IN+ and IN- 100 Ω SUPPLY CURRENT ICC SupplyCurrent EQ0 = 0,EQ1 = 0 35 43 mA (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/ornotes.Typicalspecificationsareestimationsonlyand arenotensured (2) Currentintodevicepinsisdefinedas positive.Currentoutofdevicepinsisdefinedas negative.Allvoltagesarereferencedtoground exceptVOD and ΔVOD . (3) Typicalvaluesrepresentmost likelyparametricnorms forVCC = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotensured (4) Outputshortcircuitcurrent(IOS )isspecifiedas magnitudeonly,minus signindicatesdirectiononly.

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www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013 AC ElectricalCharacteristics(1) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(2)(3) Parameter TestConditions Min Typ Max Units LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) tPHLD DifferentialPropagationDelayHightoLow 350 465 ps R L = 100Ω tPLHD DifferentialPropagationDelayLow toHigh 350 465 ps tSKD1 PulseSkew |tPLHD − tPHLD |(4) 45 100 ps tSKD2 ParttoPartSkew (5) 45 150 ps tLHT RiseTime 80 150 ps R L = 100Ω tHLT FallTime 80 150 ps JITTER PERFORMANCE WITH EQ = OFF tRJ1A VID = 350 mV 2.5Gbps 0.5 1 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2A No TestChannels(6) Clock(RZ) 3.125Gbps 0.5 1 ps EQ0 = 0,EQ1 = 0 tDJ1A VID = 350 mV 2.5Gbps 11 40 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2A No TestChannels(7) K28.5(NRZ) 3.125Gbps 11 47 ps EQ0 = 0,EQ1 = 0 tTJ1A VID = 350 mV 2.5Gbps 0.05 0.16 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2A No TestChannels(8) PRBS-23 (NRZ) 3.125Gbps 0.08 0.20 UIP-P EQ0 = 0,EQ1 = 0 JITTER PERFORMANCE WITH EQ = LOW (Figure5 and Figure6) tRJ1B VID = 350 mV 2.5Gbps 0.5 1 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2B TestChannelD (6) Clock(RZ) 3.125Gbps 0.5 1 ps EQ0 = 1,EQ1 = 0 tDJ1B VID = 350 mV 2.5Gbps 1 16 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2B TestChannelD (7) K28.5(NRZ) 3.125Gbps 11 31 ps EQ0 = 1,EQ1 = 0 tTJ1B VID = 350 mV 2.5Gbps 0.03 0.09 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2B TestChannelD (8) PRBS-23 (NRZ) 3.125Gbps 0.06 0.14 UIP-P EQ0 = 1,EQ1 = 0 JITTER PERFORMANCE WITH EQ = MEDIUM (Figure5 and Figure6) tRJ1C VID = 350 mV 2.5Gbps 0.5 1 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2C TestChannelE (6) Clock(RZ) 3.125Gbps 0.5 1 ps EQ0 = 0,EQ1 = 1 tDJ1C VID = 350 mV 2.5Gbps 10 29 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2C TestChannelE (7) K28.5(NRZ) 3.125Gbps 27 43 ps EQ0 = 0,EQ1 = 1 (1) Specificationisensuredby characterizationand isnottestedinproduction. (2) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/ornotes.Typicalspecificationsareestimationsonlyand arenotensured (3) Typicalvaluesrepresentmost likelyparametricnorms forVCC = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotensured (4) tSKD1 ,|tPLHD − tPHLD |,isthemagnitudedifferenceindifferentialpropagationdelaytimebetween thepositivegoingedge and thenegative goingedge ofthesame channel. (5) tSKD2 ,ParttoPartSkew, isdefinedas thedifferencebetween theminimum and maximum specifieddifferentialpropagationdelays.This specificationappliestodevicesatthesame VCC and within5°C ofeach otherwithintheoperatingtemperaturerange. (6) Measured on a clockedge witha histogramand an accumulationof1500 histogramhits.Inputstimulusjitterissubtractedgeometrically. (7) Testedwitha combinationofthe1100000101 (K28.5+character)and 0011111010 (K28.5-character)patterns.Inputstimulusjitteris subtractedalgebraically. (8) Measured on an eye diagramwitha histogramand an accumulationof3500 histogramhits.Inputstimulusjitterissubtracted. Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS25BR110

SNLS255E –MARCH 2007–REVISED APRIL 2013 www.ti.com AC ElectricalCharacteristics(1)(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(2)(3) Parameter TestConditions Min Typ Max Units tTJ1C VID = 350 mV 2.5Gbps 0.07 0.12 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2C TestChannelE (8) PRBS-23 (NRZ) 3.125Gbps 0.12 0.17 UIP-P EQ0 = 0,EQ1 = 1 JITTER PERFORMANCE WITH EQ = HIGH (Figure5 and Figure6) tRJ1D VID = 350 mV 2.5Gbps 1.6 2.1 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2D TestChannelF(6) Clock(RZ) 3.125Gbps 1.7 2.3 ps EQ0 = 1,EQ1 = 1 tDJ1D VID = 350 mV 2.5Gbps 30 45 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2D TestChannelF(7) K28.5(NRZ) 3.125Gbps 43 59 ps EQ0 = 1,EQ1 = 1 tTJ1D VID = 350 mV 2.5Gbps 0.14 0.27 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2D TestChannelF(8) PRBS-23 (NRZ) 3.125Gbps 0.19 0.28 UIP-P EQ0 = 1,EQ1 = 1

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50: Microstrip L=4" L=4" L=4" L=4" TEST CHANNEL CHARACTERIZATION BOARD DS25BR110 PATTERN GENERATOR OSCILLOSCOPE 50: Microstrip 50: Microstrip 50: Microstrip R L OUT+ OUT- IN+ IN- Signal Generator R D R D R L VOL OUT+ OUT- IN+ IN- Power Supply Power Supply VOH DS25BR110 www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013 DC TEST CIRCUITS Figure1. DifferentialDriverDC TestCircuit AC TestCircuitsand Timing Diagrams Figure2. DifferentialDriverAC TestCircuit Figure3. PropagationDelay Timing Diagram Figure4. LVDS Output TransitionTimes EqualizationTestCircuits Figure5. EqualizationPerformance TestCircuit Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS25BR110

100: Differential T-Line LVDS L=1" L=1" L=1"L=1" L = A, B or C 100: Differential Stripline 50: Microstrip 50: Microstrip 50: Microstrip 50: Microstrip DS25BR110 SNLS255E –MARCH 2007–REVISED APRIL 2013 www.ti.com Figure6. TestChannel Description TestChannel Loss Characteristics The testchannelwas fabricatedwithPolycladPCL-FR-370-Laminate/PCL-FRP-370Prepregmaterials(Dielectric constantof3.7and Loss Tangentof0.02).The edge coupleddifferentialstriplineshave thefollowinggeometries: TraceWidth(W) = 5 mils,Gap (S)= 5 mils,Height(B)= 16 mils. InsertionLoss (dB)LengthTestChannel (inches) 500 MHz 750 MHz 1000 MHz 1250 MHz 1500 MHz 1560 MHz Device Operation INPUT INTERFACING The DS25BR110 acceptsdifferentialsignalsand allowssimpleAC or DC coupling.With a wide common mode range,theDS25BR110 can be DC-coupledwithallcommon differentialdrivers(i.e.,LVPECL, LVDS, CML). The followingthreefiguresillustratetypicalDC-coupled interfaceto common differentialdrivers.Note thatthe DS25BR110 inputsareinternallyterminatedwitha 100Ω resistor. Figure7. TypicalLVDS DriverDC-Coupled InterfacetoDS25BR110 Input

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100: 100: Differential T-Line DS25BR110 OUT+ OUT- 150-250: 100: Differential T-Line LVDS Receiver IN+ IN- 100: LVPECL Driver 150-250: OUT+ OUT- DS25BR110 IN+ IN- 50:50: VCC CML3.3V or CML2.5V 100: Differential T-Line DS25BR110 www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013 Figure8. TypicalCML DriverDC-Coupled InterfacetoDS25BR110 Input Figure9. TypicalLVPECL DriverDC-Coupled InterfacetoDS25BR110 Input OUTPUT INTERFACING The DS25BR110 outputssignalscompliantto the LVDS standard.Itcan be DC-coupled to most common differentialreceivers.The followingfigureillustratestypicalDC-coupledinterfacetocommon differentialreceivers and assumes thatthereceivershave highimpedance inputs.Whilemost differentialreceivershave a common mode inputrange thatcan accommodate LVDS compliantsignals,itisrecommended to check the respective receiver'sdatasheetpriortoimplementingthesuggestedinterfaceimplementation. Figure10. TypicalDS25BR110 Output DC-Coupled Interfacetoan LVDS, CML or LVPECL Receiver Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS25BR110

4.50 3.75 3.00 2.25 1.50 0.75 0 6 12 18 24 30 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.5 UI MAXIMUM DATA RATE (Gbps) CAT5e LENGTH (m) w/ PE and/or EQ w/o PE and EQ 4.50 3.75 3.00 2.25 1.50 0.75 0 3 6 9 12 15 MAXIMUM DATA RATE (Gbps) CAT7 LENGTH (m) w/o EQ w/ EQ VCC = 3.3V TA =25° C NRZ PRBS-7 TJ = 0.5 UI 4.50 3.75 3.00 2.25 1.50 0.75 0 6 12 18 24 30 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.25 UI MAXIMUM DATA RATE (Gbps) CAT5e LENGTH (m) w/ PE and/or EQ w/o PE and EQ 4.50 3.75 3.00 2.25 1.50 0.75 0 3 6 9 12 15 VCC = 3.3V TA =25° C NRZ PRBS-7 TJ = 0.25 UI MAXIMUM DATA RATE (Gbps) CAT7 LENGTH (m) w/o EQ w/ EQ 4.50 3.75 3.00 2.25 1.50 0.75 0 3 6 9 12 15 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.5 UI MAXIMUM DATA RATE (Gbps) CAT5e LENGTH (m) w/o EQ w/ EQ 4.50 3.75 3.00 2.25 1.50 0.75 0 3 6 9 12 15 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.25 UI MAXIMUM DATA RATE (Gbps) CAT5e LENGTH (m) w/o EQ w/ EQ DS25BR110 SNLS255E –MARCH 2007–REVISED APRIL 2013 www.ti.com TypicalPerformance Figure11.Maximum Data Rate as a FunctionofCAT5e Figure12.Maximum Data Rate as a FunctionofCAT5e (Belden1700A) Length (Belden1700A) Length Figure13.Maximum Data Rate as a FunctionofCAT5e Figure14.Maximum Data Rate as a FunctionofCAT7 (Belden1700A) Length (Siemon Tera)Length DS25BR120 Used as a Driver DS25BR110 Used as a Receiver Figure15.Maximum Data Rate as a FunctionofCAT5e Figure16.Maximum Data Rate as a FunctionofCAT7 (Belden1700A) Length (Slemon Tera)Length DS25BR120 Used as a Driver DS25BR110 Used as a Receiver

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VCC = 3.3V TA = 25° C NRZ PRBS-7 EQ = Low TOTAL RESIDUAL JITTER (ps) DATA RATE (Gbps) 20" FR4 Stripline 10" FR4 Stripline 150 125 100 VCC = 3.3V TA = 25° C NRZ PRBS-7 EQ = Off TOTAL RESIDUAL JITTER (ps) DATA RATE (Gbps) DS25BR110 www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013 TypicalPerformance (continued) Figure17.A 2.5Gbps NRZ PRBS-7 After70" Figure18.An Equalized2.5Gbps NRZ PRBS-7 After70" DifferentialFR-4 Stripline DifferentialFR-4 Stripline V:100 mV /DIV,H:75 ps /DIV V:100 mV /DIV,H:75 ps /DIV Figure19.A 3.125Gbps NRZ PRBS-7 After70" Figure20.An Equalized3.125Gbps NRZ PRBS-7 After70" DifferentialFR-4 Stripline DifferentialFR-4 Stripline V:100 mV /DIV,H:50 ps /DIV V:100 mV /DIV,H:50 ps /DIV Figure21.TotalJitteras a FunctionofData Rate Figure22.TotalJitteras a FunctionofData Rate Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS25BR110

VCC = 3.3V TA = 25° C NRZ PRBS-7

3.125 Gbps

TOTAL RESIDUAL JITTER (ps) DIFFERENTIAL INPUT VOLTAGE (V) 30" FR4, EQ = Medium 60" FR4, EQ = High 150 125 100 VCC = 3.3V TA = 25° C NRZ PRBS-7 TOTAL RESIDUAL JITTER (ps) DIFFERENTIAL INPUT VOLTAGE (V) 4" FR4, EQ = Off 15" FR4, EQ = Low 150 125 100 VCC = 3.3V TA = 25° C NRZ PRBS-7

2.5 Gbps

TOTAL RESIDUAL JITTER (ps) DIFFERENTIAL INPUT VOLTAGE (V) 4" FR4, EQ = Off 15" FR4, EQ = Low 150 125 100 VCC = 3.3V TA = 25° C NRZ PRBS-7 TOTAL RESIDUAL JITTER (ps) DIFFERENTIAL INPUT VOLTAGE (V) 30" FR4, EQ = Medium 60" FR4, EQ = High 150 125 100 VCC = 3.3V TA = 25° C NRZ PRBS-7 EQ = Medium TOTAL RESIDUAL JITTER (ps) DATA RATE (Gbps) 30" FR4 Stripline 20" FR4 Stripline 40" FR4 Stripline 150 125 100 VCC = 3.3V TA = 25° C NRZ PRBS-7 EQ = High TOTAL RESIDUAL JITTER (ps) DATA RATE (Gbps) 40" FR4 Stripline 50" FR4 Stripline 70" FR4 Stripline 60" FR4 Stripline DS25BR110 SNLS255E –MARCH 2007–REVISED APRIL 2013 www.ti.com TypicalPerformance (continued) Figure23.TotalJitteras a FunctionofData Rate Figure24.TotalJitteras a FunctionofData Rate Figure25.TotalJitteras a FunctionofInputAmplitude Figure26.TotalJitteras a FunctionofInputAmplitude Figure27.TotalJitteras a FunctionofInputAmplitude Figure28.TotalJitteras a FunctionofInputAmplitude

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www.ti.com SNLS255E –MARCH 2007–REVISED APRIL 2013

REVISION HISTORY

www.ti.com 15-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples DS25BR110TSD/NOPB ACTIVE WSON NGQ 8 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 2R110 DS25BR110TSDX/NOPB ACTIVE WSON NGQ 8 4500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 2R110 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS25BR110TSD/NOPB WSON NGQ 8 1000 213.0 191.0 55.0 DS25BR110TSDX/NOPB WSON NGQ 8 4500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 Pack Materials-Page 2

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