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Technical content

FEATURES

 IEEE-approved factory programmed 64-bit node address chip (EUI-64) with 768 bits user-programmable OTP-EPROM communicates with the economy of one signal plus ground  Meets the node identification requirements of IEEE Standard 1394-1995 (FireWire  Unique, factory-lasered and tested 64-bit registration number assures absolute traceability because no two parts are alike  Built-in multidrop controller ensures compatibility with other 1-Wire products  Device is an “add only” memory where additional data can be programmed into EPROM without disturbing existing data  Reduces control, address, data, power and programming signals to a single pin  Directly connects to a single port pin of a microprocessor and communicates at up to 16.3k bits per second  Presence detector acknowledges when reader first applies voltage  Low cost TO-92 or TSOC surface mount packages  Reads over a wide voltage range of 2.8V to 6.0V from -40°C to +85°C; programs at 11.5V to 12.0V from -40°C to +50°C 3 2 1 PIN ASSIGNMENT

ORDERING INFORMATION

DS2502-E64+ -40°C to +85°C 3 TO-92 DS2502P-E64+ -40°C to +85°C 6 TSOC + Denotes a lead(Pb)-free/RoHS-compliant package. FireWireTM is a trademark of Apple Computer, Inc.

DESCRIPTION

The DS2502-E64 is a variant of the DS2502 1024-bit Ad d-Only Memory. It differs from the standard DS2502 in its custom ROM family code 89h, and the Un iqueWare Identifier 5E7h in place of the upper 12 bits of the standard ROM serializ ation field. Otherwise, the electrical and logical behavior is identical to that of the DS2502. For technical details please refer to the DS2502 data sheet. DS2502-E64 IEEE EUI-64 Node Address Chip www.maxim-ic.com SIDE VIEW TOP VIEW THE DOT MARKS PIN 1 TSOC PACKAGE E 6 4 2 5 0 2 YYWW DATA NCNC NC NC GND YYWW = DATE CODE RR = DIE REVISION CODE CCCCCC = COUNTRY CODE BOTTOM VIEW TO-92 DS2502-E64 YYWWRR CCCCCCGND DATA NC 2 31 19-5072; 12/09

Structure, and the APIs can be found in the 1-Wire Software Development Kits. Figure 1. EUI-64 NODE ADDRESS CHIP DATA STRUCTURE

17 BYTES

1 BYTE

CRC ends the data record. The remaining bytes of the 32-byte memory page remain unprogrammed. DS2502-E64 when multidropped on a 1-Wire bus. byte and bit representations are illustrated in Figure 2. Figure 2. SAMPLE EUI-64 VALUE address. Including the length byte and the inverted CRC, the complete set of data is shown in Figure 3. Figure 3. PHYSICAL ADDRESS AND DATA MAPPING INSIDE THE DEVICE

The four bytes at memory addresses 01h to 04h contain the UniqueWare Project ID 00001128h. The two bytes at addresses 0Dh and 0Eh ar e the inverted 16-bit CRC over the le ngth byte, Project ID and EUI-64 value. The least significant byte of the CRC is stored at address 0Dh. This CRC is generated according to the standardized CRC16 polynomial function X 16 + X 15 + X 2 + 1. For more details on generating CRC values including examples in both hardware and software, see Application Note 27, Understanding and Using Cyclic Redundancy Checks with Maxim iButton Products. The contents of the memory address range 0Fh to 1Fh is FFh. These cells ca nnot be altered since the whole memory page is write-pr otected. The memory range from 20h to 7Fh, however, is user- programmable. It can be write-protected by programming the corresponding write-protect bit in the status memory of the DS2502-E64.

REVISION HISTORY

Changed the Ordering Information to lead free. 1 Included an explanation of “Default Data Structure” above Figure 1. 2 Emphasized that the 16-bit CRC is inverted. 2 Inserted actual CRC value to Figure 3. 2 Reformatted Figures 1 to 3. 2 Removed reference to the Book of iButton Standards. 2 Changed notation of hexadecimal numbers from 16 or H to h. 1, 2, 3