DS2125_V01 MAXIM | Alldatasheet
Document overview
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Technical content
1 of 7 REV: 012306 Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. GENERAL DESCRIPTION The DS2125 Ultra3 LVD/SE SCSI terminator is both a low-voltage differential (LVD) and single-ended (SE) terminator. The multimode operation enables the designer to implement LVD in current products while allowing the end user SE backward compatibility with legacy devices. If the device is connected in an LVD-only bus, the DS2125 uses LVD termination. If any SE devices are connected to the bus, the DS2125 uses SE termination, which is accomplished automatically inside the part by sensing the voltage on the SCSI bus DIFFSENS line. For the LVD termination, the DS2125 integrates two current sources with 15 precision resistor strings. For the SE termination, one regulator and 15 precision 110Ω resistors are used. Two DS2125 terminators are needed for a wide SCSI bus.
APPLICATIONS
SCSI Host Bus Adapter (HBA) Cards Servers SCSI Cables Network Attached Storage (NAS) Storage Area Networks (SANs)
FEATURES
Fully Compliant with Ultra3 SCSI Provides Multimode Low-Voltage Differential/Single-Ended (LVD/SE) Termination for 15 Signal Line Pairs Auto-Selection of LVD or SE Termination 5% Tolerance on SE and LVD Termination Resistance Low 3pF Power-Down Capacitance On-Board Thermal-Shutdown Circuitry SCSI Bus Hot-Plug Compatible Fully Supports Actively Negated SE SCSI Signals PIN CONFIGURATION
ORDERING INFORMATION
PART* PIN-PACKAGE TOP MARK** DS2125 48 LQFP DS2125 DS2125+ 48 LQFP DS2125 DS2125/T&R 48 LQFP/Tape and Reel DS2125 DS2125+T&R 48 LQFP/Tape and Reel DS2125 *All devices rated over the commercial operating temperature range, 0°C to +70°C. **The top mark includes a “+” for lead-free packages. +Denotes lead-free/RoHS-compliant package. DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator www.maxim-ic.com R14N R14P R13N R13P R12N R12P R11N R11P R10N R10P R9N R9P 25 26 27 28 29 30 31 32 33 34 35 36 3 4 5 6 7 89101112 R15P HS_GND HS_GND HS_GND R15N TPWR HS_GND HS_GND HS_GND VREF R1P R1N R2P R2N R3P R3N R4P R4N R5P R5N R6P R6N R7P R7N HS_GND HS_GND HS_GND ISO DIFFSENSE HS_GND HS_GND HS_GND R8P R8N GND DIFF_CAP Dallas Semiconductor DS2125 LQFP (1.4mm) TOP VIEW
DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator 2 of 7 ABSOLUTE MAXIMUM RATINGS Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress rating s only, and functional operation of the device at these or any other conditions beyond those i ndicated in the operational sections of the specifications is not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(TPWR = 3.3V, TA = 0°C to +70°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LVD 2.7 5.5 TPWR Operating Supply Range VTPWR SE 4.0 5.5 V TPWR SUPPLY CURRENT ITPWR_LVD LVD SCSI mode 20 32 mA ITPWR_SE SE SCSI mode 1.6 10 mA TPWR Supply Current (All Lines Open) ITPWR_ISO ISO mode (terminators disabled) 250 750 µA LVD TERMINATION (Applies to each line pair, 1 to 15 in LVD mode) Differential-Mode Termination Resistance RDM 100 110 Ω Common-Mode Termination Resistance RCM R P and RN shorted together 110 165 Ω Differential-Mode Bias V DM All lines open 100 125 mV Common-Mode Bias V CM R P and RN shorted together 1.15 1.25 1.35 V SE TERMINATION (Applies to SE terminators, 1 to 15 in SE mode) Single-Ended Mode Termination Resistance RSE RSE = (VLx - 0.2) / ILx, where VLx = voltage at terminator pin with pin unloaded and ILx = current for each terminator pin with the pin forced to 0.2V (Note 2) 104.5 110 115.5 Ω Signal level at 0.2V, all lines low -21.0 -24 -25.4 Termination Current (Note 2) ISE Signal level at 0.5V -18.0 -22.4 mA SE Voltage Reference V REF (Note 2) 2.7 2.85 3.0 V Pin Leakage With ISO high 400 nA Single-Ended GND Resistance RGND Measured at R P pins, I = 10mA 20 60 Ω TERMINATOR PIN CAPACITANCE Terminator Pin Capacitance CIN With ISO high (Note 1) 3 pF VREF REGULATOR 1.25V Regulator Output Voltage VREF_LVD 1.15 1.25 1.35 V 1.25V Regulator Short- Circuit Source Current ISOURCE V REF = 0V -375 -700 -1000 mA 1.25V Regulator Short- Circuit Sink Current ISINK V REF = 3.3V 170 300 700 mA 1.25V Regulator Line Regulation VREF unloaded; vary TPWR from 2.7V to 5.5V 1.0 2.5 % 2.85V Regulator (N ote 2) 2.7 2.85 3.0 V 2.85V Regulator Short- Circuit Source Current V REF = 0V (Note 2) -375 -700 -1000 mA 2.85V Regulator Short- Circuit Sink Current VREF = 3.3V (Note 2) 170 300 700 mA
DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator 3 of 7 ELECTRICAL CHARACTERISTICS (continued) (TPWR = 3.3V, TA = 0°C to +70°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VREF REGULATOR 2.85V Regulator Line Regulation V REF unloaded; vary TPWR from 4.0V to 5.5V 1.0 2.5 % DIFFSENS OUTPUT DIFFSENS Driver Output Voltage VDSO -5mA ≤ IDFFSENS ≤ 50µA 1.2 1.4 V DIFFSENS Driver Source Current IDSH V DIFFSENS = 0V -15 -5 mA DIFFSENS Driver Sink Current IDSL V DIFFSENS = 3.3V 100 200 µA ILEAK, LOW With ISO high, |V DIFFSENS| = 0.3V -3 +1 DIFFSENS Leakage (Note 3) ILEAK, HIGH With ISO high, |VDIFFSENS - VTPWR| = 0.3V 1 3 µA THERMAL SHUTDOWN Thermal-Shutdown Threshold For increasing temperature (Note 1) 150 °C Thermal-Shutdown Hysteresis (Note 1) 10 °C MODE CHANGE DELAY/FILTER Mode Change Delay t DELAY 0.66 1.25 2.00 ms LOGICAL SIGNALS (ISO) Input Low Voltage V IL -0.3 +0.8 V Input High Voltage V IH 2 TPWR + 0.3 V Input Current I IL V CC = 3.3V -30 -10 µA DIFF_CAP Input Current I L V IL = -0.3V -1 +1 µA DIFF_CAP SE Operating Range VSEOR -0.3 +0.5 V DIFF_CAP LVD Operating Range VLVDOR 0.7 1.9 V DIFF_CAP HVD Operating Range VHVDOR 2.4 VTPWR + 0.3 V Note 1: Guaranteed by design. Note 2: TPWR = 4.0V. Note 3: Room temperature only. PIN DESCRIPTION PIN NAME FUNCTION 1, 2, 11–26, 37–48 RxP, RxN Signal Termination. Connect to SCSI bus signal lines. 3 TPWR Termination Power. Connect to the SCSI TERMPWR line and decouple with a 2.2µF capacitor. 4–9, 28–33 HS_GND Heat-Sink Ground. Internally connect ed to the mounting pad. This should be grounded. 10 V REF Reference Voltage. 2.85V reference in SE mode and 1.25V reference in LVD mode; must be decoupled with a 4.7µF capacitor. 27 GND Ground. Signal ground, 0V. 34 DIFF_CAP DIFFSENSE Capacitor. Connect a 0.1µF capacitor for the DIFFSENSE filter. Input to detect the type of device (differential or single-ended) on the SCSI bus. 35 DIFFSENSE DIFFSENSE. Output to dr ive the SCSI bus DIFFSENS line. 36 ISO Isolation. When pulled high, the DS2125 isolat es its bus pins (RxN, RxP) from the SCSI bus.
Figure 1. Block Diagram
Figure 2. SCSI Bus Configuration DIFFSENS: Refers to the SCSI bus signal. DIFFSENSE: Refers to the DS2125 pin name and internal circuitry capable of driving the DIFFSENS line. DIFF_CAP: Refers to the DS2125 pin name and internal circuitry relating to monitoring the DIFFSENS line. pins are switched to ground. between, which indicates the mode of the bus as SE, HVD, or LVD, respectively.
DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator 6 of 7 The DS2125’s DIFF_CAP pin monitors the DIFFSENS line to determine the device’s proper operating mode. The DIFFSENSE pin can also drive the SCSI DIFFSENS line to determine the SCSI bus-operating mode. The DS2125 switches to the termination mode that is appropriate for the bus based on the value of the DIFFSENS voltage. These modes are LVD mode, SE mode, and HVD isolation mode. LVD MODE A precision laser-trimmed resistor string with two amplifie rs provides LVD termination. This configuration yields 105Ω differential and 150 Ω common-mode impedance. A 112mV fail-safe bias is maintained when no drivers are connected to the SCSI bus. SE MODE When the external driver fo r a given signal line turns off, the active terminator pulls that signal line to 2.85V (quiescent state). The terminating resistors maintain their 110Ω value. HVD ISOLATION MODE The DS2125 identifies that there is an HVD device on the SCSI bus and isolates the termination pins from the bus. When ISO is pulled high, the termination pi ns are isolated from the SCSI bus, and V REF remains active. During thermal shutdown, the termination pins are isolated from the SCSI bus, and V REF becomes high impedance. The DIFFSENSE driver is shut down during either of these two events. An internal pulldown resistor assures that the DS2125 is terminating the bus if the ISO pin is left floating. To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As with all analog circuitry, the TERMPWR and V DD lines should be bypassed locally. A 2.2 µF capacitor and a 0.01 µF high- frequency capacitor are recommended between TPWR and ground, and placed as close as possible to the DS2125. The DS2125 should be placed as close as possible to the SCSI connector to minimize signal and power trace length, thereby resulting in less input capacitance and reflections, which can degrade the bus signals. To maintain the specified regulation, a 4.7 µF capacitor is required between the V REF pin and ground of each DS2125. A high-frequency capacitor (0.1 µF ceramic recommended) can also be placed on the V REF pin in applications that use fast rise/fall-time drivers. Figure 2 shows a typical SCSI bus configuration. REFERENCE DOCUMENTS TITLE T10 PROJECT DOCUMENT T10 COMMITTEE FTP LINK ANSI DOCUMENT NO. SCSI Parallel Interface 2 (SPI-2) Project: 1142-M, 1998 ftp://ftp.t10.org/t10/drafts/spi2/spi2r20b.pdf X3.302:1998 SCSI Parallel Interface 3 (SPI-3) Project: 1302-D, 1999 ftp://ftp.t10.org/t10/drafts/spi3/spi3r14.pdf NCITS.336:2000 SCSI Parallel Interface 4 (SPI-4) Project: 1365-D, 200x ftp://ftp.t10.org/t10/drafts/spi4/spi4r10.pdf INCITS.362:2002 SUPPLIERS SUPPLIER PHONE WEBSITE American National Standards Institute (ANSI) 212-642-4900 www.ansi.org/ Global Engineering Documents 800-854-7179 http://global.ihs.com/ CHIP INFORMATION TRANSISTOR COUNT: 8382 MOS and 87 BiPOLAR PROCESS: BiCMOS SUBSTRATE CONNECTED TO GROUND THERMAL INFORMATION Theta-JA: 65°C/W
DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator 7 of 7 Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2006 Maxim Integrated Products • Printed USA The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor.
PACKAGE INFORMATION
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.)