DS1990A-F3+

DS1990A AD | Alldatasheet

Document overview

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• PDF pages: 10

Technical content

Features

• Can Be Read in Less Than 5ms Common iButton Features
• Unique 64-Bit Registration Number Ensures Error- Free Device Selection and Absolute Traceability Because No Two Parts are Alike
• Built-In Multidrop Controller for 1-Wire Net
• Digital Identification by Momentary Contact
• Data Can Be Accessed While Affixed to Object
• Economically Communicates to Bus Master with a Single Digital Signal at 16.3kbps
• Button Shape is Self-Aligning with Cup-Shaped Probes
• Durable Stainless-Steel Case Engraved with Registration Number Withstands Harsh Environments
• Easily Affixed with Self-Stick Adhesive Backing, Latched by its Flange, or Locked with a Ring Pressed Onto its Rim iButton and 1-Wire are registered trademarks of Maxim Integrated Products, Inc. 19-8145; Rev: 11/21 +Denotes a lead(Pb)-free/RoHS-compliant package. PART TEMP RANGE PIN-PACKAGE DS1990A-F5+ -40°C to +85°C F5 iButton DS1990A-F3+ -40°C to +85°C F3 iButton DS1990AA-F5+ -40°C to +85°C F5 iButton DS1990AA-F3+ -40°C to +85°C F3 iButton PART ACCESSORY DS9096P Self-Stick Adhesive Pad DS9101 Multipurpose Clip DS9093RA Mounting Lock Ring DS9093A Snap-In Fob DS9092 iButton Probe Serial Number iButton DS1990A Design Resources Support © 2021 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Click here to ask an associate for production status of specific part numbers. Pin Configurations Examples of Accessories 16.25mm 5.89mm 0.51mm 3.10mm 0.51mm 17.35mm BRANDING F5 SIZE GNDGND IOIO F3 SIZE 89 01 000000FBC52B 1-Wire® i YYWW ZZZ DS1990A+F5 16 .25mm 5.8 9mm 0.5 1mm 17 .35mm BRANDING F5 SIZE GND IO 3.1 0mm 0.5 1mm F3 SIZE GND IO 89 01 1-Wire® 000000FBC52B

Ordering Information

(Limits are 100% production tested at TA = +25°C and/or TA = +85°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Typical values at +25°C.)

Electrical Characteristics

Note 1: System requirement. Note 2: Full RPUP range is guaranteed by design and simulation and not production tested. Production testing performed at a fixed RPUP value. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an active pullup such as that found in the DS2480B may be required. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS IO PIN: GENERAL DATA 1-Wire Pullup Voltage VPUP DS1990A (Note 1) 2.8 6.0 V DS1990AA (Note 1) 3.0 5.25 V 1-Wire Pullup Resistance RPUP DS1990A (Notes 1 and 2) 0.6 5 kΩ DS1990AA (Notes 1 and 2) 0.3 2.2 kΩ Input Capacitance CIO DS1990A (Notes 3, 4, and 5) 100 800 pF DS1990AA (Notes 4 and 5) 1000 pF Input Load Current IL DS1990A (Note 6) 0.25 µA DS1990AA IO pin at VPUP (Note 6) 0.05 1.75 6.7 µA Input Low Voltage VIL (Notes 1 and 7) 0.3 V Input High Voltage VIH DS1990A (Notes 4 and 8) 2.2 V DS1990AA (Notes 4 and 8) 0.75 x VPUP Output Low Voltage VOL IOL = 4mA 0.4 V Recovery Time tREC DS1990A (Note 1) 1 µs DS1990AA (Note 1) 5 µs Time Slot Duration tSLOT DS1990A (Note 1) 61 µs DS1990AA (Note 1) 65 µs IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE Reset Low Time tRSTL DS1990A (Notes 1 and 9) 480 µs DS1990AA (Note 1) 480 640 µs Reset High Time tRSTH (Notes 1 and 10) 480 µs Presence-Detect High Time tPDH 15 60 µs Presence-Detect Low Time tPDL (Note 11) 60 240 µs Presence-Detect Sample Time tMSP (Note 1) 60 75 µs IO PIN: 1-Wire WRITE Write-Zero Low Time tW0L (Notes 1 and 12) 60 120 µs Write-One Low Time tW1L (Notes 1 and 12) 1 15 µs IO PIN: 1-Wire READ Read Low Time tRL (Notes 1 and 13) 1 15 - d µs Read Sample Time tMSR (Notes 1 and 13) tRL + d 15 µs www.analog.com Analog Devices │ 2 DS1990A Serial Number iButton Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

VPUP 5µs after power has been applied, the parasite capacitance will not affect normal communications. Note 4: Guaranteed by design, simulation only. Not production tested. charged, it does not affect normal communication. Note 6: Input load is to ground. Note 7: The voltage on IO must be less than or equal to V ILMAX whenever the master drives the line low. Note 8: VIH is a function of the internal supply voltage. mask or conceal interrupt pulses if this device is used in parallel with a DS1994. Note 10: An additional reset or communication sequence cannot begin until the reset high time has expired. Note 11: Presence pulse is guaranteed only after a preceding reset pulse (t RSTL). maximum duration for the master to pull the line low is t W1LMAX + tF - ε and tW0LMAX + tF - ε, respectively. threshold of the bus master. The actual maximum duration for the master to pull the line low is t RLMAX + tF. Figure 1. Block Diagram SIZE See the Package Information section.

Figure 4. A multidrop bus consists of a 1-Wire bus with

• Initialization
• ROM Function Command Initialization All transactions on the 1-Wire bus begin with an initializa- tion sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The pres- ence pulse lets the bus master know that the DS1990A is on the bus and is ready to operate. For more details, see the 1-Wire Signaling section.

Figure 4. Hardware Configuration

100 MOSFET

serial number results in a mismatch of the CRC. bit written by the master stop participating in the search. Algorithm for a detailed discussion, including an example. includes a Match ROM and a Skip ROM command. in the application, this should be taken into account. Figure 5. ROM Functions Flowchart

presence pulse, the bus master initiates all these signals. write and read time slots are illustrated in Figure 7. recovery time tREC before it is ready for the next time slot. Figure 6. Initialization Procedure: Reset and Presence Pulses

Figure 7. Read/Write Timing Diagram

A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below V ILMAX until the read low time t RL is expired. During the t RL window, when responding with a 0, the DS1990A starts pulling the data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again. When responding with a 1, the DS1990A does not hold the data line low at all, and the voltage starts rising as soon as tRL is over. The sum of tRL + δ (rise time) on one side and the internal timing generator of the DS1990A on the other side define the master sampling window (t MSRMIN to t MSRMAX) in which the master must perform a read from the data line. For most reliable communication, t RL should be as short as permissible and the master should read close to but no later than t MSRMAX. After reading from the data line, the master must wait until t SLOT is expired. This guaran - tees sufficient recovery time tREC for the DS1990A to get ready for the next time slot. PACKAGE TYPE PACKAGE CODE OUTLINE NO. F3 iButton IB#3NB 21-0252 F5 iButton IB#5NB 21-0266 www.analog.com Analog Devices │ 9 DS1990A Serial Number iButton

Package Information

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

033005 Redid the formatting based on newer template style. Also deleted the 0F Read ROM command and added a note about presence pulse criteria. 1–8 Created newer template-style data sheet. All Updated Ordering Information with lead-free part numbers. 1 Deleted Meets UL 913 (4th Edit); Intrinsically Safe Apparatus: Approved Under Entity Concept for Use in Class I, Division I, Group A, B, C, and D from the Common iButton Features and iButton Can Physical Specification sections. 1, 3 Updated Electrical Characteristics table: Deleted Output High Voltage parameter. Moved 1-Wire Pullup voltage parameter from table header to table body. Changed VILMAX from 0.8V to 0.3V. Added Note 14 to the tW0L specification. Changed tW1LMAX from 15µs – ε to 15µs. Added the epsilon timing to the Write-Zero Time Slot in Figure 7. 8 11/21 Added the DS1990AA part number and related changes 1–6 DS1990A Serial Number iButton

Revision History

www.analog.com Analog Devices │ 10 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.Specifications subject to change without notice. No license is granted by implicationor otherwise under any patent or patent rights of Analog Devices. Trademarks andregistered trademarks are the property of their respective owners.