DS1922E-F5

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Technical content

Features

♦ Automatically Wakes Up, Measures Temperature, and Stores Values in 8KB of Data-Log Memory in 8- or 16-Bit Format ♦ Digital Thermometer Measures Temperature with 8-Bit (0.5°C) or 11-Bit (0.0625°C) Resolution ♦ Temperature Accuracy: ±1.5°C from +110°C to +140°C, ±7°C typical from +15°C to +110°C ♦ Water Resistant or Waterproof if Placed Inside DS9107 i Button Capsule (Exceeds Water Resistant 3 ATM Requirements) ♦ Sampling Rate from 1s Up to 273hr ♦ Programmable High and Low Trip Points for Temperature Alarms ♦ Programmable Recording Start Delay After Elapsed Time or Upon a Temperature Alarm Trip Point ♦ Quick Access to Alarmed Devices Through 1-Wire Conditional Search Function ♦ 576 Bytes of General-Purpose Memory ♦ Two-Level Password Protection of All Memory and Configuration Registers ♦ Communicates to Host with a Single Digital Signal Up to 15.4kbps at Standard Speed or Up to 125kbps in Overdrive Mode Using 1-Wire Protocol ♦ Operating Temperature Range: +15°C to +140°C Common iButton Features ♦ Digital Identification and Information by Momentary Contact ♦ Unique Factory-Lasered 64-Bit Registration Number Ensures Error-Free Device Selection and Absolute Traceability Because No Two Parts Are Alike ♦ Built-In Multidrop Controller for 1-Wire Net ♦ Chip-Based Data Carrier Compactly Stores Information ♦ Data Can Be Accessed While Affixed to Object ♦ Button Shape is Self-Aligning with Cup-Shaped Probes ♦ Durable Stainless-Steel Case Engraved with Registration Number Withstands Harsh Environments ♦ Easily Affixed with Self-Stick Adhesive Backing, Latched by Its Flange, or Locked with a Ring Pressed Onto Its Rim ♦ Presence Detector Acknowledges When Reader First Applies Voltage ♦ Meets UL 913 (4th Edit.); Intrinsically Safe Apparatus: Approved Under Entity Concept for Use in Class I, Division 1, Group A, B, C, and D Locations* DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory

Ordering Information

*Application pending. 19-4646; Rev 2; 6/09 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. # Denotes a RoHS-compliant device that may include lead(Pb) that is exempt under the RoHS requirements. Pin Configuration appears at end of data sheet. PART TEMP RANGE PIN-PACKAGE DS1922E-F5# +15°C to +140°C F5 i Button Examples of Accessories iButton and 1-Wire are registered trademarks of Maxim Integrated Products, Inc. PART ACCESSORY DS9093RA Mounting Lock Ring DS9107 i Button Capsule DS9490B USB to 1-Wire Adapter

High-Temperature Logger iButton with 8KB Data-Log Memory ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VPUP = 3.0V to 5.25V.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operating Temperature T A DS1922E (Note 1) +15 +140 °C I/O PIN GENERAL DATA 1-Wire Pullup Resistance R PUP (Notes 2, 3) 2.2 k Input Capacitance C IO (Note 4) 100 800 pF Input Load Current I L I/O pin at VPUP 6 10 μA High-to-Low Switching Threshold V TL (Notes 5, 6) 0.4 3.2 V Input Low Voltage V IL (Notes 2, 7) 0.3 V Low-to-High Switching Threshold V TH (Notes 5, 8) 0.7 3.4 V Switching Hysteresis V HY (Note 9) 0.09 N/A V Output Low Voltage V OL At 4mA (Note 10) 0.4 V Standard speed, RPUP = 2.2k 5 Overdrive speed, R PUP = 2.2k 2 Recovery Time (Note 2) tREC Overdrive speed, directly prior to reset pulse; R PUP = 2.2k 5 μs Rising-Edge Hold-Off Time t REH (Note 11) 0.6 2.0 μs Standard speed 65 Overdrive speed, VPUP > 4.5V 8 Time Slot Duration (Note 2) t SLOT Overdrive speed (Note 12) 9.5 μs I/O PIN 1-Wire RESET, PRESENCE-DETECT CYCLE Standard speed, VPUP > 4.5V 480 720 Standard speed (Note 12) 690 720 Overdrive speed, VPUP > 4.5V 48 80 Reset Low Time (Note 2) t RSTL Overdrive speed (Note 12) 70 80 μs Standard speed, VPUP > 4.5V 15 60 Standard speed (Note 12) 15 63.5 Presence-Detect High Time t PDH Overdrive speed (Note 12) 2 7 μs *Storage or operation above +50°C significantly reduces battery life with an upper limit of 300hr cumulative at +140°C. The reco m- mended storage temperature for maximum battery lifetime is between +5°C and +35°C.

High-Temperature Logger iButton with 8KB Data-Log Memory ELECTRICAL CHARACTERISTICS (continued) (VPUP = 3.0V to 5.25V.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Standard speed, VPUP > 4.5V 1.5 5 Standard speed 1.5 8Presence-Detect Fall Time (Note 13) tFPD Overdrive speed 0.15 1 μs Standard speed, VPUP > 4.5V 60 240 Standard speed (Note 12) 60 287 Overdrive speed, VPUP > 4.5V (Note 12) 7 24 Presence-Detect Low Time t PDL Overdrive speed (Note 12) 72 8 μs Standard speed, VPUP > 4.5V 65 75 Standard speed 71.5 75Presence-Detect Sample Time (Note 2) tMSP Overdrive speed 8 9 μs I/O PIN 1-Wire WRITE Standard speed 60 120 Overdrive speed, VPUP > 4.5V (Note 12) 6 12Write-Zero Low Time (Notes 2, 14) tW0L Overdrive speed (Note 12) 7.5 12 μs Standard speed 5 15 Write-One Low Time (Notes 2, 14) tW1L Overdrive speed 1 1.95 μs I/O PIN 1-Wire READ Standard speed 5 15 - Read Low Time (Notes 2, 15) tRL Overdrive speed 1 1.95 - μs Standard speed t RL + 15 Read Sample Time (Notes 2, 15) tMSR Overdrive speed t RL + 1.95 μs REAL-TIME CLOCK (RTC) Accuracy See the RTC Accuracy graph Min/ Month Frequency Deviation F 0°C to +125°C -600 +60 ppm TEMPERATURE CONVERTER 8-bit mode 30 75 Conversion Time (Note 16) tCONV 16-bit mode (11 bits) 240 600 ms Thermal Response Time Constant (Note 17) RESP i Button package 130 s +15°C to +110°C (Note 20) ±7 Conversion Error (Notes 18, 19) Temperature Cycles N TCY Cycle = ramp from +25°C to > +125°C and back to +25°C (Note 21) 300 Cycles Operating Lifetime t LIFE Temperature > +125°C (Note 21) 300 Hours

High-Temperature Logger iButton with 8KB Data-Log Memory Note 1: Operation above +125°C is restricted to mission operations only. Communication and 1-Wire pin specifications are not specified for operation above +125°C. Note 2: System requirement. Note 3: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an active pullup such as that in the DS2480B can be required. Note 4: Capacitance on the data pin could be 800pF when VPUP is first applied. If a 2.2kΩ resistor is used to pull up the data line 2.5µs after VPUP has been applied, the parasite capacitance does not affect normal communications. Note 5: VTL and VTH are a function of the internal supply voltage, which is a function of VPUP and the 1-Wire recovery times. The VTH and VTL maximum specifications are valid at VPUPMAX (5.25V). In any case, VTL < VTH < VPUP. Note 6: Voltage below which, during a falling edge on I/O, a logic 0 is detected. Note 7: The voltage on I/O must be less than or equal to VILMAX whenever the master drives the line low. Note 8: Voltage above which, during a rising edge on I/O, a logic 1 is detected. Note 9: After VTH is crossed during a rising edge on I/O, the voltage on I/O must drop by VHY to be detected as logic 0. Note 10: The I-V characteristic is linear for voltages less than 1V. Note 11: The earliest recognition of a negative edge is possible at tREH after VTH has been previously reached. Note 12: Numbers in bold are not in compliance with the published iButton standards. See the Comparison Table. Note 13: Interval during the negative edge on I/O at the beginning of a presence-detect pulse between the time at which the volt- age is 90% of VPUP and the time at which the voltage is 10% of VPUP. Note 14: ε in Figure 13 represents the time required for the pullup circuitry to pull the voltage on I/O up from VIL to VTH. The actual maximum duration for the master to pull the line low is tW1LMAX + tF - ε and tW0LMAX + tF - ε, respectively. Note 15: δ in Figure 13 represents the time required for the pullup circuitry to pull the voltage on I/O up from VIL to the input high threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX + tF. Note 16: To conserve battery power, use 8-bit temperature logging whenever possible. Note 17: This number was derived from a test conducted by Cemagref in Antony, France, in July 2000: Note 18: Includes +0.1°C/-0.2°C calibration chamber measurement uncertainty. Note 19: Warning: Not for use as the sole method of measuring or tracking temperature in products and articles that could affect the health or safety of persons, plants, animals, or other living organisms, including but not limited to foods, beverages, pharmaceuticals, medications, blood and blood products, organs, and flammable and combustible products. User shall assure that redundant (or other primary) methods of testing and determining the handling methods, quality, and fitness of the articles and products should be implemented. Temperature tracking with this product, where the health or safety of the aforementioned persons or things could be adversely affected, is only recommended when supplemental or redun- dant information sources are used. Data-logger products are 100% tested and calibrated at time of manufacture by Maxim to ensure that they meet all data sheet parameters, including temperature accuracy. User shall be responsible for proper use and storage of this product. As with any sensor-based product, user shall also be responsible for occasionally rechecking the temperature accuracy of the product to ensure it is still operating properly. Note 20: Guaranteed by design and not production tested. Note 21: Devices leave the factory after having been run through a few cycles above +125°C. This is required for calibration of the device but should not affect lifetime of the device as specified. However, this process results in a nonzero value in the Device Samples Counter register (0223h–0225h), which provides evidence the device has been factory calibrated.

High-Temperature Logger iButton with 8KB Data-Log Memory COMPARISON TABLE LEGACY VALUES DS1922E VALUES STANDARD SPEED (μs) OVERDRIVE SPEED (μs) STANDARD SPEED (μs) OVERDRIVE SPEED (μs) PARAMETER MIN MAX MIN MAX MIN MAX MIN MAX tSLOT (including t REC) 61 (undefined) 7 (undefined) 65 (undefined) 9.5 (undefined) tRSTL 480 (undefined) 48 80 690 720 70 80 tPDH 15 60 2 6 15 63.5 2 7 tPDL 60 240 8 24 60 287 7 28 tW0L 60 120 6 16 60 120 7.5 12 *Intentional change; longer recovery time requirement due to modified 1-Wire front-end. Note: Numbers in bold are not in compliance with the published iButton standards. iButton CAN PHYSICAL SPECIFICATION SIZE See the Package Information section. WEIGHT Ca. 3.3 grams SAFETY Meets UL 913 (4th Edit.); Intrinsically Safe Apparatus, approval under Entity Concept for use in Class I, Division 1, Group A, B, C, and D Locations*. *Application pending. RTC Accuracy RTC ACCURACY (TYPICAL) TEMPERATURE (°C) DRIFT (MINUTES/MONTH) 12511595 10535 45 55 65 75 8525 -16 -14 -12 -10 -18 15 135

With its extended temperature range, the DS1922E is well suited to monitor processes that require tempera- tures well above the boiling point of water, such as pas- teurization of food items. Note that the initial sealing level of the DS1922E achieves the equivalent of IP56. Aging and use conditions can degrade the integrity of the seal over time, so for applications with significant exposure to liquids, sprays, or other similar environ- ments, it is recommended to place the DS1922E in the DS9107 i Button capsule. The DS9107 provides a water- tight enclosure that has been rated to IP68 (refer to Application Note 4126: Understanding the IP (Ingress Protection) Ratings of i Button Data Loggers and Capsules). Software for setup and data retrieval through the 1-Wire interface is available for free download from the i Button website ( www.ibutton.com). This software also includes drivers for the serial and USB port of a PC and routines to access the general-purpose memory for storing application- or equipment-specific data files. Overview The block diagram in Figure 1 shows the relationships between the major control and memory sections of the DS1922E. The device has five main data components: 64-bit lasered ROM; 256-bit scratchpad; 576-byte gen- eral-purpose SRAM; two 256-bit register pages of time- keeping, control, status, and counter registers, and passwords; and 8192 bytes of data-logging memory. Except for the ROM and the scratchpad, all other mem- ory is arranged in a single linear address space. The data-logging memory, counter registers, and several other registers are read only for the user. Both register pages are write protected while the device is pro- grammed for a mission. The password registers, one for a read password and another one for a read/write pass- word, can only be written, never read. Figure 2 shows the hierarchical structure of the 1-Wire protocol. The bus master must first provide one of the eight ROM function commands: Read ROM, Match ROM, Search ROM, Conditional Search ROM, Skip ROM, Overdrive-Skip ROM, Overdrive-Match ROM, or Resume Command. Upon completion of an Overdrive ROM command byte executed at standard speed, the device enters Overdrive Mode, where all subsequent communication occurs at a higher speed. The protocol required for these ROM function commands is described in Figure 11. After a ROM function command is successfully executed, the memory and control func- tions become accessible and the master can provide any one of the eight available commands. The protocol for these memory and control function commands is described in Figure 9. All data is read and written least significant bit first. Parasite Power The block diagram (Figure 1) shows the parasite-pow- ered circuitry. This circuitry “steals” power whenever the I/O input is high. I/O provides sufficient power as long as the specified timing and voltage requirements are met. The advantages of parasite power are two-fold: 1) By parasiting off this input, battery power is not consumed for 1-Wire ROM function commands, and 2) if the battery is exhausted for any reason, the ROM can still be read normally. The remaining circuitry of the DS1922E is sole- ly operated by battery energy. 64-Bit Lasered ROM Each DS1922E contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last 8 bits are a cyclic redundancy check (CRC) of the first 56 bits (see Figure 3 for details). The 1-Wire CRC is generated using a polynomial generator consisting of a shift regis- ter and XOR gates as shown in Figure 4. The polynomi- al is X 8 + X5 + X4 + 1. Additional information about the 1-Wire CRC is available in Application Note 27: Understanding and Using Cyclic Redundancy Checks with Maxim iButton Products. The shift register bits are initialized to 0. Then, starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, the serial number is entered. After the last bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the 8 bits of CRC returns the shift register to all 0s. High-Temperature Logger iButton with 8KB Data-Log Memory

Figure 1. Block Diagram

Figure 6. DS1922E Register Pages Map

Figure 6. DS1922E Register Pages Map (continued)

Detailed Register Descriptions Timekeeping and Calendar The RTC and calendar information is accessed by reading/writing the appropriate bytes in the register page, address 0200h to 0205h. For readings to be valid, all RTC registers must be read sequentially start- ing at address 0200h. Some of the RTC bits are set to 0. These bits always read 0 regardless of how they are written. The number representation of the RTC registers is binary-coded decimal (BCD) format. The DS1922E’s RTC can run in either 12hr or 24hr mode. Bit 6 of the Hours register (address 0202h) is defined as the 12hr or 24hr mode select bit. When high, the 12hr mode is selected. In the 12hr mode, bit 5 is the AM/PM bit with logic 1 being PM. In the 24hr mode, bit 5 is the 20hr bit (20hr to 23hr). The CENT bit, bit 7 of the Months register, can be written by the user. This bit changes its state when the years counter transitions from 99 to 00. The calendar logic is designed to automatically com- pensate for leap years. For every year value that is either 00 or a multiple of 4, the device adds a 29th of February. This works correctly up to (but not including) the year 2100. Sample Rate The content of the Sample Rate register (addresses 0206h, 0207h) specifies the time elapse (in seconds if EHSS = 1, or minutes if EHSS = 0) between two tem- perature-logging events. The sample rate can be any value from 1 to 16,383, coded as an unsigned 14-bit binary number. If EHSS = 1, the shortest time between logging events is 1s and the longest (sample rate = 3FFFh) is 4.55hr. If EHSS = 0, the shortest is 1min and the longest time is 273.05hr (sample rate = 3FFFh). The EHSS bit is located in the RTC Control register at address 0212h. It is important that the user sets the EHSS bit accordingly while setting the Sample Rate register. Writing a sample rate of 0000h results in a sample rate = 0001h, causing the DS1922E to log the temperature either every minute or every sec- ond depending upon the state of the EHSS bit. High-Temperature Logger iButton with 8KB Data-Log Memory Sample Rate Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0206h Sample Rate Low 0207h 0 0 Sample Rate High RTC Registers ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0200h 0 10 Seconds Single Seconds 0201h 0 10 Minutes Single Minutes 0202h 0 12/24 20 Hour AM/PM 10 Hour Single Hours 0203h 0 0 10 Date Single Date 0204h CENT 0 0 10 Months Single Months 0205h 10 Years Single Years Note: During a mission, there is only read access to these registers. Bit cells marked “0” always read 0 and cannot be written to 1. Note: During a mission, there is only read access to these registers. Bit cells marked “0” always read 0 and cannot be written to 1.

0000h when too cold and FFh or FFE0h when too hot. address 0208h; High Alarm address 0209h). used to determine whether an alarm is generated. Table 1. Temperature Conversion Examples Table 2. Temperature Alarm Threshold Examples

High-Temperature Logger iButton with 8KB Data-Log Memory Temperature Sensor Alarm The DS1922E has two Temperature Alarm Threshold registers (address 0208h, 0209h) to store values that determine whether a critical temperature has been reached. A temperature alarm is generated if the device measures an alarming temperature and the alarm signaling is enabled. The bits ETLA and ETHA that enable the temperature alarm are located in the Temperature Sensor Control register. The temperature alarm flags TLF and THF are found in the Alarm Status register at address 0214h. Bit 1: Enable Temperature High Alarm (ETHA). This bit controls whether, during a mission, the temperature high alarm flag (THF) may be set, if a temperature con- version results in a value equal to or higher than the value in the Temperature High Alarm Threshold register. If ETHA is 1, temperature high alarms are enabled. If ETHA is 0, temperature high alarms are not generated. Bit 0: Enable Temperature Low Alarm (ETLA). This bit controls whether, during a mission, the temperature low alarm flag (TLF) may be set, if a temperature con- version results in a value equal to or lower than the value in the Temperature Low Alarm Threshold register. If ETLA is 1, temperature low alarms are enabled. If ETLA is 0, temperature low alarms are not generated. RTC Control To minimize the power consumption of a DS1922E, the RTC oscillator should be turned off when the device is not in use. The oscillator on/off bit is located in the RTC Control register. This register also includes the EHSS bit, which determines whether the sample rate is speci- fied in seconds or minutes. Bit 1: Enable High-Speed Sample (EHSS). This bit controls the speed of the sample rate counter. When set to logic 0, the sample rate is specified in minutes. When set to logic 1, the sample rate is specified in seconds. Bit 0: Enable Oscillator (EOSC). This bit controls the crystal oscillator of the RTC. When set to logic 1, the oscillator starts. When written to logic 0, the oscillator stops and the device is in a low-power data-retention mode. This bit must be 1 for normal operation. A Forced Conversion or Start Mission command automatically starts the RTC by changing the EOSC bit to logic 1. Temperature Sensor Control Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0210h 0 0 0 0 0 0 ETHA ETLA RTC Control Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0212h 0 0 0 0 0 0 EHSS EOSC Note: During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and cannot be written to 1. Note: During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and cannot be written to 1.

The DS1922E is set up for its operation by writing appropriate data to its special function registers, which are located in the two register pages. The settings in the Mission Control register determine which format (8 or 16 bits) applies and whether old data can be over- written by new data once the data-log memory is full. An additional control bit can be set to tell the DS1922E to wait with logging data until a temperature alarm is encountered. Bit 5: Start Mission Upon Temperature Alarm (SUTA). This bit specifies whether a mission begins immediately (includes delayed start) or if a temperature alarm is required to start the mission. If this bit is 1, the device performs an 8-bit temperature conversion at the selected sample rate and begins with data logging only if an alarming temperature (high alarm or low alarm) was found. The first logged temperature is when the alarm occurred. However, the mission sample counter does not increment. This functionality is guaranteed by design and not production tested. Bit 4: Rollover Control (RO). This bit controls whether, during a mission, the data-log memory is overwritten with new data or whether data logging is stopped once the data-log memory is full. Setting this bit to 1 enables the rollover and data logging continues at the begin- ning, overwriting previously collected data. If this bit is 0, the logging and conversions stop once the data-log memory is full. However, the RTC continues to run and the MIP bit remains set until the Stop Mission command is performed. Bit 2: Temperature Logging Format Selection (TLFS). This bit specifies the format used to store tem- perature readings in the data-log memory. If this bit is 0, the data is stored in 8-bit format. If this bit is 1, the 16-bit format is used (higher resolution). With 16-bit for- mat, the most significant byte is stored at the lower address. Bit 0: Enable Temperature Logging (ETL). To set up the device for a temperature-logging mission, this bit must be set to logic 1. The recorded temperature val- ues start at address 1000h. DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory Mission Control Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0213h 1 1 SUTA RO (X) TLFS 0 ETL Note: During a mission, there is only read access to this register. Bits 6 and 7 have no function. They always read 1 and cannot be written to 0. Bits 1 and 3 control functions that are not available with the DS1922E. Bit 1 must be set to 0. Under this condition the setting of bit 3 becomes a “don’t care.”

The fastest way to determine whether a programmed temperature threshold was exceeded during a mission is through reading the Alarm Status register. In a net- worked environment that contains multiple DS1922E i Buttons, the devices that encountered an alarm can quickly be identified by means of the Conditional Search command (see the 1-Wire ROM Function Commands section). The temperature alarm only occurs if enabled (see the Temperature Sensor Alarm section). The BOR alarm is always enabled. Bit 7: Battery-On Reset Alarm (BOR). If this bit reads 1, the device has performed a power-on reset. This indicates that the device has experienced a shock big enough to interrupt the internal battery power supply. The device may still appear functional, but it has lost its factory calibration. Any data found in the data-log memory should be disregarded. Bit 1: Temperature High Alarm Flag (THF). If this bit reads 1, there was at least one temperature conversion during a mission revealing a temperature equal to or higher than the value in the Temperature High Alarm register. A forced conversion can affect the THF bit. This bit can also be set with the initial alarm in the SUTA = 1 mode. Bit 0: Temperature Low Alarm Flag (TLF). If this bit reads 1, there was at least one temperature conversion during a mission revealing a temperature equal to or lower than the value in the Temperature Low Alarm reg- ister. A forced conversion can affect the TLF bit. This bit can also be set with the initial alarm in the SUTA = 1 mode. General Status The information in the General Status register tells the host computer whether a mission-related command was executed successfully. Individual status bits indi- cate whether the DS1922E is performing a mission, waiting for a temperature alarm to trigger the logging of data or whether the data from the latest mission has been cleared. Bit 4: Waiting for Temperature Alarm (WFTA). If this bit reads 1, the Mission Start Upon Temperature Alarm was selected and the Start Mission command was suc- cessfully executed, but the device has not yet experi- enced the temperature alarm. This bit is cleared after a temperature alarm event, but is not affected by the Clear Memory command. Once set, WFTA remains set if a mission is stopped before a temperature alarm occurs. To clear WFTA manually before starting a new mission, set the high temperature alarm (address 0209h) to +15°C and perform a forced conversion. Bit 3: Memory Cleared (MEMCLR). If this bit reads 1, the Mission Timestamp, mission samples counter, and all the alarm flags of the Alarm Status register have been cleared in preparation of a new mission. Executing the Clear Memory command clears these memory sections. The MEMCLR bit returns to 0 as soon as a new mission is started by using the Start Mission command. The memory must be cleared for a mission to start. Bit 1: Mission in Progress (MIP). If this bit reads 1, the device has been set up for a mission and this mis- sion is still in progress. The MIP bit returns from logic 1 to logic 0 when a mission is ended. See the Start Mission and Stop Mission function commands. High-Temperature Logger iButton with 8KB Data-Log Memory Alarm Status Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0214h BOR 1 1 1 0 0 THF TLF General Status Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0215h 1 1 0 WFTA MEMCLR 0 MIP 0 Note: There is only read access to this register. Bits 4 to 6 have no function. They always read 1. Bits 2 and 3 have no function with the DS1922E. They always read 0. The alarm status bits are cleared simultaneously when the Clear Memory Function is invoked. See memory and control functions for details. Note: There is only read access to this register. Bits 0, 2, 5, 6, and 7 have no function.

High-Temperature Logger iButton with 8KB Data-Log Memory Mission Start Delay Counter Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0216h Delay Low Byte 0217h Delay Center Byte 0218h Delay High Byte Mission Samples Counter Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0220h Low Byte 0221h Center Byte 0222h High Byte Mission Timestamp Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0219h 0 10 Seconds Single Seconds 021Ah 0 10 Minutes Single Minutes 021Bh 0 12/24 20 Hours AM/PM 10 Hours Single Hours 021Ch 0 0 10 Date Single Date 021Dh CENT 0 0 10 Months Single Months 021Eh 10 Years Single Years Mission Start Delay The content of the Mission Start Delay Counter register tells how many minutes must expire from the time a mission was started until the first measurement of the mission takes place (SUTA = 0) or until the device starts testing the temperature for a temperature alarm (SUTA = 1). The Mission Start Delay is stored as an unsigned 24-bit integer number. The maximum delay is 16,777,215min, equivalent to 11,650 days or roughly 31yr. If the start delay is nonzero and the SUTA bit is set to 1, first the delay must expire before the device starts testing for temperature alarms to begin logging data. For a typical mission, the Mission Start Delay is 0. If a mission is too long for a single DS1922E to store all readings at the selected sample rate, one can use sev- eral devices and set the Mission Start Delay for the sec- ond device to start recording as soon as the memory of the first device is full, and so on. The RO bit in the Mission Control register (address 0213h) must be set to 0 to prevent overwriting of collected data once the data-log memory is full. Mission Timestamp The Mission Timestamp register indicates the date and time of the first temperature sample of the mission. There is only read access to the Mission Timestamp register. Mission Progress Indicator Depending on settings in the Mission Control register (address 0213h), the DS1922E logs temperature in 8-bit or 16-bit format. The Mission Samples Counter together with the starting address and the logging format (8 or 16 bits) provide the information to identify valid blocks of data that have been gathered during the current (MIP = 1) or latest mission (MIP = 0). See the Data-Log Memory Usage section for an illustration. The number read from the mission samples counter indicates how often the DS1922E woke up during a mission to measure temperature. The number format is 24-bit unsigned integer. The mission samples counter is reset through the Clear Memory command. Note: During a mission, there is only read access to this register. Note: There is only read access to this register. Note: There is only read access to this register.

The Device Samples Counter register is similar to the Mission Samples Counter register. During a mission this counter increments whenever the DS1922E wakes up to measure and log data and when the device is testing for a temperature alarm in SUTA mode. Between mis- sions the counter increments whenever the Forced Conversion command is executed. This way the Device Samples Counter register functions like a gas gauge for the battery that powers the i Button. The Device Samples Counter register is reset to zero when the iButton is assembled. The counter increments a couple of times during final test. The number format is 24-bit unsigned integer. The maximum number that can be represented in this format is 16,777,215. The code in the Device Configuration register allows the master to distinguish between the DS2422 chip and different versions of the DS1922 i Buttons. The Device Configuration Register table shows the codes assigned to the various devices. Security by Password The DS1922E is designed to use two passwords that control read access and full access. Reading from or writing to the scratchpad as well as the forced conver- sion command does not require a password. The pass- word must be transmitted immediately after the command code of the memory or control function. If password checking is enabled, the password transmit- ted is compared to the passwords stored in the device. The data pattern stored in the Password Control regis- ter determines whether password checking is enabled. To enable password checking, the EPW bits need to form a binary pattern of 10101010 (AAh). The default pattern of EPW is different from AAh. If the EPW pattern is different from AAh, any pattern is accepted as long as it has a length of exactly 64 bits. Once enabled, changing the passwords and disabling password checking requires the knowledge of the current full- access password. High-Temperature Logger iButton with 8KB Data-Log Memory Device Samples Counter Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0223h Low Byte 0224h Center Byte 0225h High Byte Password Control Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0227h EPW Device Configuration Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 PART 0 0 0 0 0 0 0 0 DS2422 0 0 1 0 0 0 0 0 DS1923 0 1 0 0 0 0 0 0 DS1922L 0 1 1 0 0 0 0 0 DS1922T 0226h 1 0 0 0 0 0 0 0 DS1922E Note: There is only read access to this register. Note: There is only read access to this register. Note: During a mission, there is only read access to this register.

Before enabling password checking, passwords for read-only access as well as for full access (read/write/control) must be written to the password registers. Setting up a password or enabling/dis- abling the password checking is done in the same way as writing data to a memory location; only the address is different. Since they are located in the same memory page, both passwords can be rede- fined at the same time. The Read Access Password must be transmitted exact- ly in the sequence RP0, RP1…RP62, RP63. This pass- word only applies to the Read Memory with CRC function. The DS1922E delivers the requested data only if the password transmitted by the master was correct or if password checking is not enabled. The Full Access Password must be transmitted exactly in the sequence FP0, FP1…FP62, FP63. It affects the functions Read Memory with CRC, Copy Scratchpad, Clear Memory, Start Mission, and Stop Mission. The DS1922E executes the command only if the password transmitted by the master was correct or if password checking is not enabled. Due to the special behavior of the write-access logic, the Password Control register and both passwords must be written at the same time. When setting up new passwords, always verify (read back) the scratchpad before sending the Copy Scratchpad command. After a new password is successfully copied from the scratch- pad to its memory location, erase the scratchpad by fill- ing it with new data (Write Scratchpad command). Otherwise, a copy of the passwords remains in the scratchpad for public read access. DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory Read Access Password Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0228h RP7 RP6 RP5 RP4 RP3 RP2 RP1 RP0 0229h RP15 RP14 RP13 RP12 RP11 RP10 RP9 RP8 … … 022Eh RP55 RP54 RP53 RP52 RP51 RP50 RP49 RP48 022Fh RP63 RP62 RP61 RP60 RP59 RP58 RP57 RP56 Full Access Password Register ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 0230h FP7 FP6 FP5 FP4 FP3 FP2 FP1 FP0 0231h FP15 FP14 FP13 FP12 FP11 FP10 FP9 FP8 … … 0236h FP55 FP54 FP53 FP52 FP51 FP50 FP49 FP48 0237h FP63 FP62 FP61 FP60 FP59 FP58 FP57 FP56 Note: There is only write access to this register. Attempting to read the password reports all zeros. The password cannot be changed while a mission is in progress. Note: There is only write access to this register. Attempting to read the password reports all zeros. The password cannot be changed while a mission is in progress.

struct the time and date of each measurement. taken. Earlier measurements cannot be reconstructed. object to be monitored and the duration of the mission. (equivalent to 0168h at EHSS = 1). Security by Password section for more details. Figure 7. Temperature Logging

1), the DS1922E first waits until the start delay is over. ple period later the Mission Timestamp register is set. at any time, e.g., to watch the progress of a mission. of the data that is stored in the password registers. Figure 8. Address Registers

efficiency, the target address for writing should point to the beginning of a page, i.e., the byte offset is 0. Thus, the full 32-byte capacity of the scratchpad is available, resulting also in the ending offset of 1Fh. The ending offset together with the PF flag are a means to support the master checking the data integrity after a Write command. The highest valued bit of the E/S register, called authorization accepted (AA), indicates that a valid Copy command for the scratchpad has been received and executed. Writing data to the scratchpad clears this flag. Writing with Verification To write data to the DS1922E, the scratchpad must be used as intermediate storage. First, the master issues the Write Scratchpad command to specify the desired target address, followed by the data to be written to the scratchpad. In the next step, the master sends the Read Scratchpad command to read the scratchpad and to verify data integrity. As preamble to the scratch- pad data, the DS1922E sends the requested target address TA1 and TA2 and the contents of the E/S Register. If the PF flag is set, data did not arrive cor- rectly in the scratchpad. The master does not need to continue reading; it can start a new trial to write data to the scratchpad. Similarly, a set AA flag indicates that the Write command was not recognized by the device. If everything went correctly, both flags are cleared and the ending offset indicates the address of the last byte written to the scratchpad. Now the master can continue verifying every data bit. After the master has verified the data, it must send the Copy Scratchpad command. This command must be followed exactly by the data of the three address registers TA1, TA2, and E/S, as the master has read them verifying the scratchpad. As soon as the DS1922E has received these bytes, it copies the data to the requested location beginning at the target address. Memory and Control Function Commands Figure 9 shows the protocols necessary for accessing the memory and the special function registers of the DS1922E. An example on how to use these and other functions to set up the DS1922E for a mission is includ- ed in the Mission Example: Prepare and Start a New Mission section. The communication between the mas- ter and the DS1922E takes place either at standard speed (default, OD = 0) or at overdrive speed (OD = 1). If not explicitly set into the Overdrive Mode the DS1922E assumes standard speed. Internal memory access during a mission has priority over external access through the 1-Wire interface. This affects sever- al commands in this section. See the Memory Access Conflicts section for details and solutions. Write Scratchpad Command [0Fh] After issuing the Write Scratchpad command, the mas- ter must first provide the 2-byte target address, fol- lowed by the data to be written to the scratchpad. The data is written to the scratchpad starting at the byte off- set T[4:0]. The master must send as many bytes as are needed to reach the ending offset of 1Fh. If a data byte is incomplete, its content is ignored and the partial byte flag PF is set. When executing the Write Scratchpad command, the CRC generator inside the DS1922E calculates a CRC of the entire data stream, starting at the command code and ending at the last data byte sent by the master (Figure 15). This CRC is generated using the CRC-16 polynomial by first clearing the CRC generator and then shifting in the command code (0Fh) of the Write Scratchpad command, the target addresses TA1 and TA2 as supplied by the master, and all the data bytes. If the ending offset is 11111b, the master can send 16 read time slots and receive the inverted CRC-16 gener- ated by the DS1922E. Note that both register pages are write protected dur- ing a mission. Although the Write Scratchpad com- mand works normally at any time, the subsequent copy scratchpad to a register page fails during a mission. High-Temperature Logger iButton with 8KB Data-Log Memory

Figure 8. The master can continue reading data until DS1922E until a reset pulse is issued. successful. The AA bit remaining at 0 indicates this. 2-byte address that indicates a starting byte location. continuing until the end of a 32-byte page is reached. data time slots and receives the inverted 16-bit CRC. memory page followed again by the CRC for that page.

High-Temperature Logger iButton with 8KB Data-Log Memory MASTER Tx MEMORY OR CONTROL FUNCTION COMMAND MASTER Tx TA1 [T7:T0] MASTER Tx DATA BYTE TO SCRATCHPAD OFFSET DS1922E INCREMENTS SCRATCHPAD OFFSET DS1922E SETS SCRATCHPAD OFFSET = [T4:T0] AND CLEARS (PF, AA) 0Fh WRITE SCRATCHPAD? N Y Y N Y N N Y N MASTER Tx RESET? SCRATCHPAD OFFSET = 11111b? MASTER Tx RESET? MASTER Tx RESET? MASTER Tx TA2 [T15:T8] DS1922E SETS [E4:E0] = SCRATCHPAD OFFSET N FROM ROM FUNCTIONS FLOWCHART (FIGURE 11) TO ROM FUNCTIONS FLOWCHART (FIGURE 11) Y Y TO FIGURE 9b FROM FIGURE 9b MASTER Rx CRC-16 OF COMMAND, ADDRESS DATA MASTER Rx "1"s PARTIAL BYTE WRITTEN? PF = 1 AA = 1 MASTER Rx TA1 [T7:T0] DS1922E SETS SCRATCHPAD OFFSET = [T4:T0] DS1922E INCREMENTS SCRATCHPAD OFFSET MASTER Rx ENDING OFFSET WITH DATA STATUS (E/S) AAh READ SCRATCHPAD? N Y Y N Y N Y N MASTER Tx RESET? SCRATCHPAD OFFSET = 11111b? MASTER Tx RESET? MASTER Rx TA2 [T15:T8] MASTER Rx DATA BYTE FROM SCRATCHPAD OFFSET MASTER Rx CRC-16 OF COMMAND, ADDRESS DATA, E/S BYTE, AND DATA STARTING AT THE TARGET ADDRESS MASTER Rx "1"s 99h COPY SCRATCHPAD [WITH PW] N Y Y N N MASTER Tx RESET? MASTER Tx RESET? COPYING FINISHED MASTER Tx E/S BYTE MASTER Tx TA1 [T7:T0], TA2 [T15:T8] AUTHORIZATION CODE MASTER Tx

64 BITS [PASSWORD]

N Y AUTHORIZATION CODE MATCH? N Y N Y Y N MASTER Tx RESET? Y PASSWORD ACCEPTED? DS1922E Tx "0" DS1922E Tx "1" MASTER Rx "1"s MASTER Rx "1"s Figure 9a. Memory/Control Function Flowchart

High-Temperature Logger iButton with 8KB Data-Log Memory FROM FIGURE 9a TO FIGURE 9a TO FIGURE 9c FROM FIGURE 9c 69h READ MEMORY [WITH PW] AND CRC N N Y Y N N END OF MEMORY? MASTER Tx RESET? CRC OK? MASTER Tx TA1 [T7:T0], TA2 [T15:T8] DS1922E SETS MEMORY ADDRESS = [T15:T0] MASTER Rx DATA BYTE FROM MEMORY ADDRESS Y N N N END OF PAGE? DECISION MADE BY MASTER DECISION MADE BY DS1922E Y N Y Y MASTER Tx RESET? Y PASSWORD ACCEPTED? MASTER Tx RESET MASTER Rx "1"s MASTER Rx CRC-16 OF COMMAND, ADDRESS, DATA (1ST PASS); CRC-16 OF DATA (SUBSEQUENT PASSES) DS1922E INCREMENTS ADDRESS COUNTER N Y MASTER Tx FFh DUMMY BYTE MASTER Tx MEMCLR = 1 YMISSION IN PROGRESS? N N Y MASTER Tx RESET? Y PASSWORD ACCEPTED? DS1922E CLEARS MISSION TIMESTAMP, MISSION SAMPLES COUNTER, ALARM FLAGS 96h CLEAR MEMORY [WITH PW] N N Y MASTER Tx FFh DUMMY BYTE DS1922E COPIES RESULT TO ADDRESS 020C/Dh DS1922E PERFORMS A TEMPERATURE CONVERSION YMISSION IN PROGRESS? N MASTER Tx RESET? Y 55h FORCED CONVERSION? Figure 9b. Memory/Control Function Flowchart (continued)

High-Temperature Logger iButton with 8KB Data-Log Memory MISSION START DELAY PROCESS FROM FIGURE 9b TO FIGURE 9b YSTART DELAY COUNTER = 0? N NSUTA = 1? Y NTEMPERATURE ALARM? Y MIP = 0? N N N Y MASTER Tx FFh DUMMY BYTE MASTER Tx DS1922E WAITS FOR 1 MINUTE DS1922E SETS WFTA = 1 DS1922E SETS WFTA = 0 DS1922E DECREMENTS START DELAY COUNTER DS1922E WAITS ONE SAMPLE PERIOD DS1922E PERFORMS 8-BIT TEMPERATURE CONVERSION DS1922E WAITS ONE SAMPLE PERIOD MISSION IN PROGRESS? N Y MASTER Tx RESET? Y PASSWORD ACCEPTED? N Y Y MEMCLR = 1? Y N DS1922E SETS MIP = 1, MEMCLR = 0 DS1922E COPIES RTC DATA TO MISSION TIMESTAMP REGISTER DS1922E STARTS LOGGING TAKING FIRST SAMPLE DS1922E INITIATES MISSION START DELAY PROCESS CCh START MISSION [WITH PW] N Y MASTER Tx FFh DUMMY BYTE MASTER Tx PROGRESS? Y Y MASTER Tx RESET? Y PASSWORD ACCEPTED? DS1922E SETS MIP = 0, WFTA = 0 33h STOP MISSION [WITH PW] N N N END OF PROCESS Figure 9c. Memory/Control Function Flowchart (continued)

Clear Memory with Password [96h] The Clear Memory with Password command is used to prepare the device for another mission. This command is only executed if no mission is in progress. After the command code the master must transmit the 64-bit full- access password followed by an FFh dummy byte. If passwords are enabled and the transmitted password is different from the stored full-access password or a mission is in progress, the Clear Memory with Password command fails. The device stops communi- cating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device clears the Mission Timestamp register, Mission Samples Counter register, and all alarm flags of the Alarm Status register. After these cells are cleared, the MEMCLR bit of the General Status register reads 1 to indicate the successful execution of the Clear Memory with Password command. Clearing of the data-log memory is not necessary because the mission samples counter indicates how many entries in the data-log memory are valid. Forced Conversion [55h] The Forced Conversion command can be used to mea- sure the temperature without starting a mission. After the command code, the master must send one FFh byte to get the conversion started. The conversion result is found as a 16-bit value in the Latest Temperature Conversion Result register. This com- mand is only executed if no mission is in progress (MIP = 0). It cannot be interrupted and takes maximum 600ms to complete. During this time memory access through the 1-Wire interface is blocked. The device behaves the same way as during a mission when the sampling interferes with a memory/control function command. See the Memory Access Conflicts section for details. Start Mission with Password [CCh] The DS1922E uses a control function command to start a mission. A new mission can only be started if the pre- vious mission has been ended and the memory has been cleared. After the command code, the master must transmit the 64-bit full-access password followed by an FFh dummy byte. If passwords are enabled and the transmitted password is different from the stored full-access password or a mission is in progress, the Start Mission with Password command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device starts a mission. If SUTA = 0, the sampling begins as soon as the mission start delay is over. If SUTA = 1, the first sample is written to the data- log memory at the time the temperature alarm occurred. However, the mission sample counter does not increment. One sample period later, the Mission Timestamp register is set and the regular sampling and logging begins. While the device is waiting for a tem- perature alarm to occur, the WFTA flag in the General Status register reads 1. During a mission there is only read access to the register pages. Stop Mission with Password [33h] The DS1922E uses a control function command to stop a mission. Only a mission that is in progress can be stopped. After the command code, the master must transmit the 64-bit full-access password followed by a FFh dummy byte. If passwords are enabled and the transmitted password is different from the stored full- access password or a mission is not in progress, the Stop Mission with Password command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device clears the MIP bit in the General Status register and restores write access to the register pages. The WFTA bit is not cleared. See the descrip- tion of the General Status register for a method to clear the WFTA bit. DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory

odically a temperature sample is taken and logged. to detect this interference, and how to work around it. and to take measures to work around it. Table 3. Memory Access Conflicts and Solutions CRC-16 at the end of the command flow. the command flow, despite a valid password. the CRC-16 at the end of the memory page. FFh or the MIP bit is 1 while bits 0, 2, and 5 are 0. is 0, Stop Mission was successful.

boosted to 142kbps by activating the Overdrive Mode. speed is 15.4kbps and 125kbps in overdrive speed. and adapters that are based on these driver chips.

• Initialization
• ROM Function Command
• Memory/Control Function Command
• Transaction/Data DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory Rx RPUP IL VPUP BUS MASTER OPEN-DRAIN PORT PIN 100Ω MOSFET Tx Rx Tx DATA DS1922E 1-Wire PORT Rx = RECEIVE Tx = TRANSMIT

Figure 10. Hardware Configuration

All transactions on the 1-Wire bus begin with an initial- ization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS1922E is on the bus and is ready to operate. For more details, see the 1-Wire Signaling section. 1-Wire ROM Function Commands Once the bus master has detected a presence, it can issue one of the eight ROM function commands that the DS1922E supports. All ROM function commands are 8 bits long. A list of these commands follows (see the flowchart in Figure 11). Read ROM [33h] This command allows the bus master to read the DS1922E’s 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single slave on the bus. If more than one slave is pre- sent on the bus, a data collision occurs when all slaves try to transmit at the same time (open drain produces a wired-AND result). The resultant family code and 48-bit serial number results in a mismatch of the CRC. Match ROM [55h] The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific DS1922E on a multidrop bus. Only the DS1922E that exactly matches the 64-bit ROM sequence responds to the following memory function command. All other slaves wait for a reset pulse. This command can be used with a single device or multiple devices on the bus. Search ROM [F0h] When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their registration numbers. By taking advantage of the wired-AND property of the bus, the master can use a process of elimination to identify the registration numbers of all slave devices. For each bit of the regis- tration number, starting with the least significant bit, the bus master issues a triplet of time slots. On the first slot, each slave device participating in the search outputs the true value of its registration number bit. On the sec- ond slot, each slave device participating in the search outputs the complemented value of its registration num- ber bit. On the third slot, the master writes the true value of the bit to be selected. All slave devices that do not match the bit written by the master stop participat- ing in the search. If both of the read bits are zero, the master knows that slave devices exist with both states of the bit. By choosing which state to write, the bus master branches in the ROM code tree. After one com- plete pass, the bus master knows the registration num- ber of a single device. Additional passes identify the registration numbers of the remaining devices. Refer to Application Note 187: 1-Wire Search Algorithm for a detailed discussion, including an example. Conditional Search ROM [ECh] The Conditional Search ROM command operates simi- larly to the Search ROM command except that only those devices that fulfill certain conditions participate in the search. This function provides an efficient means for the bus master to identify devices on a multidrop system that have to signal an important event. After each pass of the conditional search that successfully determined the 64-bit ROM code for a specific device on the multidrop bus, that particular device can be indi- vidually accessed as if a Match ROM had been issued, since all other devices have dropped out of the search process and are waiting for a reset pulse. The DS1922E responds to the Conditional Search ROM command if one of the three alarm flags of the Alarm Status register (address 0214h) reads 1. The tempera- ture alarm only occurs if enabled (see the Temperature Sensor Alarm section). The BOR alarm is always enabled. The first alarm that occurs makes the device respond to the Conditional Search ROM command. High-Temperature Logger iButton with 8KB Data-Log Memory

Skip ROM [CCh] This command can save time in a single-drop bus sys- tem by allowing the bus master to access the memory functions without providing the 64-bit ROM code. For example, if more than one slave is present on the bus and a Read command is issued following the Skip ROM command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired-AND result). Resume [A5h] The DS1922E must be accessed several times before a mission starts. In a multidrop environment this means that the 64-bit ROM code after a Match ROM command must be repeated for every access. To maximize the data throughput in a multidrop environment, the Resume function was implemented. This function checks the sta- tus of the RC bit and, if it is set, directly transfers control to the memory/control functions, similar to a Skip ROM command. The only way to set the RC bit is through successfully executing the Match ROM, Search ROM, or Overdrive-Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the Resume command function. Accessing another device on the bus clears the RC bit, preventing two or more devices from simultaneously responding to the Resume command function. Overdrive-Skip ROM [3Ch] On a single-drop bus this command can save time by allowing the bus master to access the memory/control functions without providing the 64-bit ROM code. Unlike the normal Skip ROM command, the Overdrive- Skip ROM command sets the DS1922E in the Overdrive Mode (OD = 1). All communication following this com- mand must occur at overdrive speed until a reset pulse of minimum 690µs duration resets all devices on the bus to standard speed (OD = 0). When issued on a multidrop bus, this command sets all overdrive-supporting devices into Overdrive Mode. To subsequently address a specific overdrive-supporting device, a reset pulse at overdrive speed must be issued followed by a Match ROM or Search ROM com- mand sequence. This speeds up the time for the search process. If more than one slave supporting overdrive is present on the bus and the Overdrive-Skip ROM command is followed by a Read command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired- AND result). Overdrive-Match ROM [69h] The Overdrive-Match ROM command followed by a 64-bit ROM sequence transmitted at overdrive speed allows the bus master to address a specific DS1922E on a multidrop bus and to simultaneously set it in Overdrive Mode. Only the DS1922E that exactly match- es the 64-bit ROM sequence responds to the subse- quent memory/control function command. Slaves already in Overdrive Mode from a previous Overdrive- Skip ROM or successful Overdrive-Match ROM com- mand remain in Overdrive Mode. All overdrive-capable slaves return to standard speed at the next reset pulse of minimum 690µs duration. The Overdrive-Match ROM command can be used with a single or multiple devices on the bus. DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory

High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Tx PRESENCE PULSE BUS MASTER Tx RESET PULSE BUS MASTER Tx ROM FUNCTION COMMAND DS1922E Tx CRC BYTE DS1922E Tx FAMILY CODE (1 BYTE) DS1922E Tx SERIAL NUMBER (6 BYTES) OD = 0 RC = 0 MASTER Tx BIT 0 RC = 0 RC = 0 RC = 0 Y OD RESET PULSE? YY Y Y Y Y N 33h READ ROM COMMAND? N 55h MATCH ROM COMMAND? BIT 0 MATCH? BIT 0 MATCH? N N N N N N N F0h SEARCH ROM COMMAND? N ECh CONDITIONAL SEARCH COMMAND? N Y RC = 1 MASTER Tx BIT 1 MASTER Tx BIT 63 BIT 1 MATCH? BIT 63 MATCH? Y Y RC = 1 FROM MEMORY FUNCTIONS FLOWCHART (FIGURE 9) TO MEMORY FUNCTIONS FLOWCHART (FIGURE 9) DS1922E Tx BIT 0 DS1922E Tx BIT 0 MASTER Tx BIT 0 BIT 1 MATCH? BIT 63 MATCH? DS1922E Tx BIT 1 DS1922E Tx BIT 1 MASTER Tx BIT 1 DS1922E Tx BIT 63 DS1922E Tx BIT 63 MASTER Tx BIT 63 Y BIT 0 MATCH?N N N Y Y RC = 1 DS1922E Tx BIT 0 DS1922E Tx BIT 0 MASTER Tx BIT 0 CONDITION MET? N Y BIT 1 MATCH? BIT 63 MATCH? DS1922E Tx BIT 1 DS1922E Tx BIT 1 MASTER Tx BIT 1 DS1922E Tx BIT 63 DS1922E Tx BIT 63 MASTER Tx BIT 63 Y FROM FIGURE 11b TO FIGURE 11b TO FIGURE 11b FROM FIGURE 11b Figure 11a. ROM Functions Flowchart

High-Temperature Logger iButton with 8KB Data-Log Memory MASTER Tx BIT 0 RC = 0; OD = 1 RC = 0; OD = 1 OD = 0 (SEE NOTE) NOTE: THE OD FLAG REMAINS AT 1 IF THE DEVICE WAS ALREADY AT OVERDRIVE SPEED BEFORE THE OVERDRIVE-MATCH ROM COMMAND WAS ISSUED. (SEE NOTE) (SEE NOTE) RC = 1? Y N Y A5h RESUME COMMAND? N Y 3Ch OVERDRIVE- SKIP ROM? N RC = 0 Y CCh SKIP ROM COMMAND? Y 69h OVERDRIVE- MATCH ROM? N N OD = 0N OD = 0N MASTER Tx BIT 1 MASTER Tx BIT 63 Y Y RC = 1 Y BIT 0 MATCH? MASTER Tx RESET? BIT 63 MATCH? BIT 1 MATCH? N Y N YMASTER Tx RESET? N TO FIGURE 11a FROM FIGURE 11a FROM FIGURE 11a TO FIGURE 11a Figure 11b. ROM Functions Flowchart (continued)

Mode the fast timing applies to all waveforms. and the capacitance of the 1-Wire network attached. determining a logical level, not triggering any events. RSTL + tF to compensate for the edge. than 80µs, the device remains in Overdrive Mode. must test the logical state of the 1-Wire line at tMSP. write and read time slots are illustrated in Figure 13. valid during a read time slot. Figure 12. Initialization Procedure: Reset and Presence Pulse

High-Temperature Logger iButton with 8KB Data-Log Memory Master-to-Slave For a write-one time slot, the voltage on the data line must have crossed the VTH threshold before the write-one low time tW1LMAX is expired. For a write-zero time slot, the voltage on the data line must stay below the V TH threshold until the write-zero low time tW0LMIN is expired. The voltage on the data line should not exceed V ILMAX during the entire t W0L or t W1L window. After the V TH threshold has been crossed, the DS1922E needs a recovery time t REC before it is ready for the next time slot. Slave-to-Master A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below V TL until the read low time t RL is expired. During the t RL window, when responding with a 0, the DS1922E starts pulling the data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again. When responding with a 1, the DS1922E does not hold the data line low at all, and the voltage starts rising as soon as t RL is over. The sum of tRL + δ (rise time) on one side and the inter- nal timing generator of the DS1922E on the other side define the master sampling window (t MSRMIN to tMSRMAX) in which the master must perform a read from the data line. For most reliable communication, t RL should be as short as permissible and the master should read close to but no later than t MSRMAX. After reading from the data line, the master must wait until t SLOT is expired. This guarantees sufficient recovery time tREC for the DS1922E to get ready for the next time slot. Note that t REC specified herein applies only to a single DS1922E attached to a 1-Wire line. For multiple device configurations, t REC must be extended to accommodate the additional 1-Wire device input capacitance. Alternatively, an interface that performs active pullup during the 1-Wire recovery time such as the DS2482-x00 or DS2480B 1-Wire line drivers can be used. Improved Network Behavior (Switchpoint Hysteresis) In a 1-Wire environment line termination is possible only during transients controlled by the bus master (1-Wire driver). 1-Wire networks, therefore, are susceptible to noise of various origins. Depending on the physical size and topology of the network, reflections from end points and branch points can add up or cancel each other to some extent. Such reflections are visible as glitches or ringing on the 1-Wire communication line. Noise coupled onto the 1-Wire line from external sources can also result in signal glitching. A glitch dur- ing the rising edge of a time slot can cause a slave device to lose synchronization with the master and, as a consequence, result in a Search ROM command coming to a dead end or cause a device-specific func- tion command to abort. For better performance in net- work applications, the DS1922E uses a new 1-Wire front-end, which makes it less sensitive to noise and also reduces the magnitude of noise injected by the slave device itself. The DS1922E’s 1-Wire front-end differs from traditional slave devices in four characteristics: 1) The falling edge of the presence pulse has a con- trolled slew rate. This provides a better match to the line impedance than a digitally switched transistor, converting the high-frequency ringing known from traditional devices into a smoother low-bandwidth transition. The slew-rate control is specified by the parameter t FPD, which has different values for stan- dard and overdrive speed. 2) There is additional lowpass filtering in the circuit that detects the falling edge at the beginning of a time slot. This reduces the sensitivity to high-frequency noise. This additional filtering does not apply at overdrive speed. 3) There is a hysteresis at the low-to-high switching threshold V TH. If a negative glitch crosses V TH but does not go below V TH - V HY, it is not recognized (Figure 14, Case A). The hysteresis is effective at any 1-Wire speed. 4) There is a time window specified by the rising edge hold-off time t REH during which glitches are ignored, even if they extend below V TH - V HY threshold (Figure 14, Case B, t GL < t REH ). Deep voltage droops or glitches that appear late after crossing the V TH threshold and extend beyond the t REH window cannot be filtered out and are taken as the begin- ning of a new time slot (Figure 14, Case C, t GL ≥ tREH). Devices that have the parameters t FPD, VHY, and t REH specified in their electrical characteristics use the improved 1-Wire front-end.

Figure 13. Read/Write Timing Diagrams

ing in the command code, the target addresses TA1 and TA2, and all the data bytes. The DS1922E transmits this CRC only if the data bytes written to the scratchpad include scratchpad ending offset 11111b. The data can start at any location within the scratchpad. With the Read Scratchpad command, the CRC is gen- erated by first clearing the CRC generator and then shifting in the command code, the target addresses TA1 and TA2, the E/S byte, and the scratchpad data starting at the target address. The DS1922E transmits this CRC only if the reading continues through the end of the scratchpad, regardless of the actual ending off- set. For more information on generating CRC values, refer to Application Note 27. High-Temperature Logger iButton with 8KB Data-Log Memory Command-Specific 1-Wire Communication Protocol—Legend SYMBOL DESCRIPTION RST 1-Wire reset pulse generated by master. PD 1-Wire presence pulse generated by slave. Select Command and data to satisfy the ROM function protocol. WS Command "Write Scratchpad." RS Command "Read Scratchpad." CPS Command "Copy Scratchpad with Password." RMC Command "Read Memory with Password and CRC." CM Command "Clear Memory with Password." FC Command "Forced Conversion." SM Command "Start Mission with Password." STP Command "Stop Mission with Password." TA Target Address TA1, TA2. TA–E/S Target Address TA1, TA2 with E/S byte. <Data to EOS> Transfer of as many data bytes as are needed to reach the scratchpad offset 1Fh. <Data to EOP> Transfer of as many data bytes as are needed to reach the end of a memory page. <PW/Dummy> Transfer of 8 bytes that either represent a valid password or acceptable dummy data. <32 Bytes> Transfer of 32 bytes. <Data> Transfer of an undetermined amount of data. FFh Transmission of one FFh byte. CRC-16 Transfer of an inverted CRC-16. FF Loop Indefinite loop where the master reads FF bytes. AA Loop Indefinite loop where the master reads AA bytes.

Write Scratchpad, Reaching the End of the Scratchpad (Cannot Fail) PD WS TASelect CRC-16 FF Loop<Data to EOS> CRC-16 FF Loop CRC-16 RST Read Scratchpad (Cannot Fail) PD RS TA-E/SSelect <Data to EOS> AA LoopRST Copy Scratchpad with Password (Success) PD CPS TA-E/SSelect <PW/Dummy> FF Loop FF Loop Loop RST Copy Scratchpad with Password (Fail TA-E/S or Password) PD CPS TA-E/SSelect <PW/Dummy> FF Loop FF Loop RST Read Memory with Password and CRC (Fail Password or Address) PD RMC FFh Select <PW/Dummy> RST TA TA Read Memory with Password and CRC (Success) PD RMCSelect <PW/Dummy> <Data to EOP> RST CM Clear Memory with Password PD Select <PW/Dummy> CRC-16<32 Bytes> To verify success, read the General Status register at address 0215h. If MEMCLR is 1, the command was executed successfully. DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory Command-Specific 1-Wire Communication Protocol—Color Codes Master-to-Slave Slave-to-Master 1-Wire Communication Examples

Mission Example: Prepare and Start a New Mission Assumption: The previous mission has been ended by using the Stop Mission command. Passwords are not enabled. Starting a mission requires three steps: Step 1: Clear the data of the previous mission. Step 2: Write the setup data to register page 1. Step 3: Start the new mission. Step 1: Clear the data of the previous mission. With only a single device connected to the bus master, the communication of step 1 looks like this: RST Forced Conversion PD FCSelect FF LoopFFh DS1922E To read the result and to verify success, read the addresses 020Ch to 020Fh (results) and the device samples counter at address 0223h to 0225h. If the count has incremented, the command was executed successfully. High-Temperature Logger iButton with 8KB Data-Log Memory FF LoopRST Start Mission with Password PD SMSelect <PW/Dummy> FFh To verify success, read the General Status register at address 0215h. If MIP is 1 and MEMCLR is 0, the command was executed successfully. RST Stop Mission with Password PD STPSelect FF Loop<PW/Dummy> FFh To verify success, read the General Status register at address 0215h. If MIP is 0, the command was executed successfully. 1-Wire Communication Examples (continued) MASTER MODE DATA (LSB FIRST) COMMENTS Tx (Reset) Reset pulse Rx (Presence) Presence pulse Tx CCh Issue “Skip ROM” command Tx 96h Issue “Clear Memory” command Tx <8 FFh bytes> Send dummy password Tx FFh Send dummy byte Tx (Reset) Reset pulse Rx (Presence) Presence pulse

Step 2: Write the setup data to register page 1. During the setup, the device needs to learn the follow- ing information:

• Time and Date
• Sample Rate
• Alarm Thresholds
• Alarm Controls (Response to Conditional Search)
• General Mission Parameters (e.g., Channels to Log and Logging Format, Rollover, Start Mode)
• Mission Start Delay The following data sets up the DS1922E for a mission that logs temperature using 8-bit format. DS1922E High-Temperature Logger iButton with 8KB Data-Log Memory ADDRESS DATA EXAMPLE VALUES FUNCTION 0200h 00h 0201h 30h 0202h 15h 15:30:00 hours Time 0203h 01h 0204h 04h 0205h 08h 1st of April in 2008 Date 0206h 0Ah 0207h 00h Every 10 minutes (EHSS = 0) Sample rate 0208h 08h 0209h F2h 18°C low 135°C high Temperature alarm thresholds 020Ah 00h 020Bh FFh (Don’t care) (Not applicable with DS1922E) 020Ch FFh 020Dh FFh 020Eh FFh 020Fh FFh (Don’t care) Clock through read-only registers 0210h 02h Enable high alarm Temperature alarm control 0211h FCh Disabled (Not applicable with DS1922E) 0212h 01h On (enabled), EHSS = 0 (low sample rate) RTC oscillator control, sample rate selection 0213h C1h Normal start; no rollover; 8-bit temperature log General mission control 0214h FFh 0215h FFh (Don’t care) Clock through read-only registers 0216h 5Ah 0217h 00h 0218h 00h 90 minutes Mission start delay

With only a single device connected to the bus master, the communication of step 2 looks like this: High-Temperature Logger iButton with 8KB Data-Log Memory MASTER MODE DATA (LSB FIRST) COMMENTS Tx (Reset) Reset pulse Rx (Presence) Presence pulse Tx CCh Issue “Skip ROM” command Tx 0Fh Issue “Write Scratchpad” command Tx 00h TA1, beginning offset = 00h Tx 02h TA2, address = 02 00h Tx <25 Data Bytes> Write 25 bytes of data to scratchpad Tx <7 FFh Bytes> Write through the end of the scratchpad Tx (Reset) Reset pulse Rx (Presence) Presence pulse Tx CCh Issue “Skip ROM” command Tx AAh Issue “Read Scratchpad” command Rx 00h Read TA1, beginning offset = 00h Rx 02h Read TA2, address = 02 00h Rx 1Fh Read E/S, ending offset = 1Fh, flags = 0h Rx <32 Data Bytes> Read scratchpad data and verify Tx (Reset) Reset pulse Rx (Presence) Presence pulse Tx CCh Issue “Skip ROM” command Tx 99h Issue “Copy Scratchpad” command Tx 00h TA1 Tx 02h TA2 Tx 1Fh E/S (AUTHORIZATION CODE) Tx <8 FFh Bytes> Send dummy password Tx (Reset) Reset pulse Rx (Presence) Presence pulse MASTER MODE DATA (LSB FIRST) COMMENTS Tx (Reset) Reset pulse Rx (Presence) Presence pulse Tx CCh Issue “Skip ROM” command Tx CCh Issue “Start Mission” command Tx <8 FFh Bytes> Send dummy password Tx FFh Send dummy byte Tx (Reset) Reset pulse Rx (Presence) Presence pulse Step 3: Start the new mission. With only a single device connected to the bus master, the communication of step 3 looks like this: If step 3 was successful, the MIP bit in the General Status register is 1, the MEMCLR bit is 0, and the mis- sion start delay counts down.

High-Temperature Logger iButton with 8KB Data-Log Memory A1 41 000000FBC52B 1-Wire® Thermochron® iBut t o n® . com YYWW ZZZ DS1922E#F50 16.25mm 5.89mm 0.51mm 17.35mm BRANDING F5 SIZE GND IO Pin Configuration PACKAGE TYPE PACKAGE CODE DOCUMENT NO. F5 iButton IB#6CB 21-0266 Software Correction Algorithm for Temperature The correction algorithm described in the DS1922L/ DS1922T data sheet does not apply to the DS1922E. If attempted, the corrected result is generally less accu- rate than the raw temperature data read from the device. Therefore, with the DS1922E the memory pages 18 and 19 are available as additional user memory.

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.

High-Temperature Logger iButton with 8KB Data-Log Memory Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 44 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

Revision History

0 7/08 Initial release. — 1 10/08 Added the Software Correction Algorithm for Temperature section. 43 2 6/09 Changed storage temperature range in Absolute Maximum Ratings and added a recommended storage temperature note for maximum battery lifetime. 2