DS1721S

DS1721U MAXIM | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 17

Technical content

FEATURES

/g167/g32Temperature measurements require no external components with ±1°C accuracy /g167/g32Measures temperatures from -55°C to +125°C; Fahrenheit equivalent is -67°F to +257°F /g167/g32Temperature resolution is configurable from 9 to 12 (default) bits (0.5°C to 0.0625°C resolution) /g167/g32Maximum conversion time (9-bit resolution) of 93.75 ms /g167/g32Thermostatic settings are user-definable /g167/g32Data is read/written via a 2-wire serial interface (open drain I/O lines); 3-bit addressability /g167/g32Wide power supply range (2.7V - 5.5V) /g167/g32Applications include personal computers, cellular telephones, office equipment, or any thermally sensitive system /g167/g328-pin, 150-mil SOIC package and 8-pin µSOP package PIN ASSIGNMENT PIN DESCRIPTION SDA - 2-Wire Serial Data Input/Output SCL - 2-Wire Serial Clock GND - Ground T OUT - Thermostat Output Signal A0 - Chip Address Input A1 - Chip Address Input A2 - Chip Address Input VDD - Power Supply Voltage (+5V)

DESCRIPTION

The DS1721 2-Wire Digital Thermome ter and Thermostat provides 12-b it temperature readings, which indicate the temperature of the device. Thermostatic settings and temperature readings are all communicated to/from the DS1721 over a simple 2-wire serial interf ace. No additional components are required; the device is truly a “temperature-to-digital” converter. The DS1721 has three address bits that allow a user to multidrop up to eight sensors along the 2-wire bus, greatly simplifying the bussing of distributed temperature sensing networks. The thermal alarm output, T OUT, is active when the temperature of the device exceeds a user-defined temperature TH. The output remains active until the temperature is equal to or below the user-defined temperature TL, allowing for any hysteresis necessary. The active state of T OUT is configurable by the user. For applications that require faster conversion times, the user can adjust the readout resolution from 12 to 9 bits, effectively reducing the conversion time from 750ms (MAX) to 93.75 ms (MAX). This is particularly useful in applications where temperature changes large magnitudes very rapidly. any microprocessor-based, thermally sensitive system. DS1721 2-Wire Digital Thermometer and Thermostat www.maxim-ic.com DS1721U 8-Pin µ-SOP VDD SDA SCL TOUT GND 1 8 2 7 3 6 4 5 DS1721S 8-Pin SOIC (150-mil) SDA SCL TOUT GND VDD

ORDERING INFORMATION

DS1721S DS1721 DS1721 in 150 mil 8-pin SO DS1721S+ DS1721 (See Note ) DS1721 in Lead-Free 150 mil 8-pin SO DS1721S/T&R DS1721 DS1721 in 150 mil 8- pin SO, 2500 Piece Tape-and-Reel DS1721S+T&R DS1721 (See Note) DS1721 in Lead-Free 150 mil 8-pin SO, 2500 Piece Tape- and-Reel DS1721U 1721 DS1721 in 8-pin uSOP DS1721U+ 1721 (See Note) DS1721 in Lead-Free 8-pin uSOP DS1721U/T&R 1721 DS1721 in 8-pin uSOP, 3000 Piece Tape-and-Reel DS1721U+T&R 1721 (See Note) DS1721 in Lead-Free 8-pin uSOP, 3000 Piece Tape-and-Reel Note: A ”+” symbol will also be marked on the package near the Pin 1 indicator. DETAILED PIN DESCRIPTION Table 1 PIN SYMBOL DESCRIPTION 1 SDA Data input/output pin. For 2-wire serial communication port. 2 SCL Clock input/output pin. For 2-wire serial communication port. 3 T OUT Thermostat output. Active when temperature exceeds TH; will reset when temperature falls below TL. 4 GND Ground pin. 5 A2 Address input pin. 6 A1 Address input pin. 7 A0 Address input pin. 8 V DD Supply Voltage. 2.7V to 5.5V input power pin. OVERVIEW A block diagram of the DS1721 is shown in Figure 1. The DS1721 consists of five major components: 1. Precision temperature sensor 2. Analog-to-digital converter 3. 2-wire interface electronics 4. Data registers 5. Thermostat comparator The factory-calibrated temperature sensor require s no external components. Upon power-up, the DS1721 is in an idle mode. Upon issuance of a Start C onvert T command [51h], the DS1721 begins temperature conversions with the default re solution of 12 bits (0.0625°C resolu tion). Following an 8-bit command protocol, temperature data can be read over the 2-wire interface. The host can periodically read the value in the temperature register, which contains the last completed conversion. As conversions are performed in the background, reading the temperature register does not affect the conversion in progress. In power-sensitive applications, the user can pu t the DS1721 in a “one-shot” mode, under which the sensor will complete and store one temperature conversion and return to a low-power standby state. In time-sensitive applications, the user can change the conversion resolution from 12 bits to 9, 10, or 11.

Each additional bit of resolution approximately doubl es the conversion time, so 9-bit conversions can be performed in less than a quarter of a second. This is accomplished by issuing a command protocol to the configuration register. It is recommended that the user issue the command protocol to program th e configuration register before any temperature conversion commands are issued after power-up. This is due to the fact that the configuration data is stored in volatile memory and will always power-up in the default state. The configuration register defines the conversion mode, thermo meter resolution/conversion time, and active state of the thermostat comparator output. It also contains 3 status bits denoting the stat e of temperature conversions and thermostat flags. The user can also program over-temperature (TH) a nd under-temperature (TL) setpoints for thermostatic operation. The power-up state of TH is 80°C and that for TL is 75°C. The result of each temperature conversion is compared with these setpoints. The thermostat output (T OUT) becomes active when the measured temperature exceeds the programmed TH, and remains latched in the active state until temperature falls below TL. Thus, any hysteresis can be realized for fan control without external components. Digital data is written to/read from the DS1721 via a 2-wire interface, and all communication is MSb first. Multipoint sensing is possible with the DS1721 by uniquely setting the 3-bit address of up to eight parts on the 2-wire bus. DS1721 FUNCTIONAL BLOCK DIAGRAM Figure 1

conversion routine must be used. Figure 2. The thermostat output updates as soon as a temperature conversion is complete. When the

The active state for the totem-pole output is progra mmable by the user. The power-up default of the DS1721 has TH=80°C, TL=75°C, and the output state active high. Refer to the “OPERATION- Programming” section for instructions in adjusting the thermostat setpoints and TCOM active state. THERMOSTAT OUTPUT OPERATION Figure 2 OPERATION-Programming There are two areas of interest in programming the DS1721: the Configuration/St atus register and the thermostat setpoints. All programming is done via th e 2-wire interface using the protocols discussed in the “Command Set” section. Configuration/Status Register Programming The configuration/status register is accessed via the Access Config (ACh) function command. Writing to or reading from the register is determined by the R/ W bit of the 2-wire control byte (See “2-wire Serial Data Bus” section). Data is read from or written to the configuration register MSb first. The format of the register is illustrated below in Figure 3. The ef fect each bit has on DS1721 functionality is described below along with the power-up state of the bit and its ability to be read or written to. The entire register is volatile and will always power-up in the default state. Therefore, it is recommended that the user issue any configuration programming commands immediately after power is cycled, before any other commands are issued. CONFIGURATION/STATUS REGISTER Figure 3 DONE X X U R1 R0 POL 1SHOT M S b L S b 1SHOT = Temperature Conversion Mode. If 1SHOT is "1", the DS1721 will perform and store one temperature conversion upon reception of the Start Convert T (51h) command. If 1SHOT is "0", the DS1721 will continuously perform temp erature conversions and store th e last completed result in the Thermometer Register. The user has read/write acce ss to the bit and the power-up default state is "0" (continuous mode). POL = TCOM Polarity Bit. If POL is "1", the active state of the TCOM output will be high. A "0" stored in this location sets the thermostat output to an activ e low state. The user has read/write access to the POL bit, and the power-up default state is "1" (active high). U = Undefined. This bit is used internally by the DS1721. It will be a "0" at power-up and will change to a "1" once the Start Convert T [51h] command is issu ed. This is a “Don’t Care” on a write; i.e. The DS1721 will ignore writes to this location.

R0, R1 = Thermometer Resolution Bits. Table 3 below defines the resolution of the digital thermometer, based on the settings of these two bits. There is a direct tradeoff between resolution and conversion time, as depicted in the DC Electrical Characteristics: Digital Thermometer table. The designer has read/write access to R0 and R1, and the default state is R0="1" and R1="1" (12-bit conversions). THERMOMETER RESOLUTION CONFIGURATION Table 3 THERMOMETER RESOLUTION MAX CONVERSION TIME 0 0 9-BIT 93.75ms 0 1 10-BIT 187.5ms 1 0 11-BIT 375ms 1 1 12-BIT 750ms X = Undefined. These bits are used internally by the DS1721. DONE = Temperature Conversion Status Bit. "1" = conversion complete and "0" = conversion in progress. The DONE bit is read-only, and the power- up state is "1". In the continuous conversion mode, DONE = "0". Thermostat Setpoints Programming The thermostat registers (TH and TL) define the setpoints for operation of the TCOM output. The respective register can be accessed over the 2-wire bus via the Access TH (A1h) or Access TL (A2h) commands. Reading from or writing to the respective register is controlled by the state of the R/ W bit in the 2-wire control byte (See “2-Wire Serial Data Bus” section). The format of the TH and TL registers is a 12-bit 2’s complement representation of the temperature in °C. The user can program the number of bits (9, 10, 11, or 12) for each TH and TL that correspond to the thermometer resolution configuration chosen. If the 9-bit mode is chosen, for example, the 3 least significant bits of TH and TL will be ignored by the thermostat comparator. The format for both TH and TL is shown in Figure 4. The power-up default of TH is 80°C and that for TL is 75°C. TEMPERATURE/DATA RELATIONSHIPS Figure 4 S 2 6 2 5 2 4 2 3 2 2 2 1 2 0 MSB MSb (UNIT = °C) LSb 2-1 2 -2 2 -3 2 -4 0 0 0 0 LSB TEMP DIGITAL OUTPUT (Binary) DIGITAL OUTPUT (Hex) +80°C 0101 0000 0000 0000 5000h +75°C 0100 1011 0000 0000 4B00h +10.125°C 0000 1010 0010 0000 0A20h +0.5°C 0000 0000 1000 0000 0080h +0°C 0000 0000 0000 0000 0000h -0.5°C 1111 1111 1000 0000 FF80h -10.125°C 1111 0101 1110 0000 F5E0h -25.0625°C 1110 0110 1111 0000 E6F0h -55°C 1100 1001 0000 0000 C900h

If the user does not wish to take advantage of the thermostat capabilities of the DS1721, the 24 bits can be used for general storage of system data that need not be maintained following a power loss. However, the TOUT pin should be left floating if general data is stored in TH/TL. 2-WIRE SERIAL DATA BUS The DS1721 supports a bi-directional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that controls the message is called a “master.” The devices that are controlled by the master are “slaves.” The bus must be controlled by a master device wh ich generates the serial clock (SCL ), controls the bus access, and generates the START and STOP conditions. The DS1721 operates as a slave on the 2-wire bus. Connections to the bus are made via the open-drain I/O lines SDA and SCL. The following bus protocol has been defined (See Figure 5): /g183/g32Data transfer may be initiated only when the bus is not busy. /g183/g32During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line while the clock line is high will be interpreted as control signals. Accordingly, the following bus conditions have been defined: Bus not busy: Both data and clock lines remain HIGH. Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH, defines a START condition. Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is HIGH, defines the STOP condition. Data valid: The state of the data line represents valid data when, after a STAR T condition, the data line is stable for the duration of the HIGH period of th e clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a START c ondition and terminated with a STOP condition. The number of data bytes transferred between START and STOP conditions is not limited, and is determined by the master device. The information is transferre d byte-wise and each receiver acknowledges with a 9 th bit. Within the bus specifications a regular mode (100 kH z clock rate) and a fast mode (400 kHz clock rate) are defined. The DS1721 works in both modes. Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH to enable the master to generate the STOP condition.

DATA TRANSFER ON 2-WIRE SERIAL BUS Figure 5 Figure 6 details how data transfer is accomplished on the two-wire bus. Depending upon the state of the R/ W bit, two types of data transfer are possible: Data transfer from a master transmitter to a slave receiver. The 1 st byte transmitted by the master is the slave address. Next follows a number of data byte s. The slave returns an acknowledge bit after each received byte. Data transfer from a slave transmitter to a master receiver. The 1 st byte (the slave address) is transmitted by the master. The slave then returns an acknowledge bit. Next follows a number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a ‘not acknowledge’ is returned. The master device generates all of the serial clock pulses and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated STAR T condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus will not be released. The DS1721 may operate in the following two modes: Slave receiver mode: Serial data and clock are received thro ugh SDA and SCL. After each byte is received, an acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial transfer. Address reco gnition is performed by hardware after reception of the slave address and direction bit. Slave transmitter mode: The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is reversed. Serial data is transmitted on SDA by the DS1721 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer.

2-WIRE SERIAL COMMUNICATION WITH DS1721 Figure 6

A control byte is the 1 st byte received following the START condition from the master device. The control byte consists of a 4-bit c ontrol code; for the DS1721, this is set as 1001 binary for read and write operations. The next 3 bits of the control byte are th e device select bits (A2, A1, A0). They are used by the master device to select which of eight devices are to be accessed. The set bits are in effect the 3 least significant bits of the slave address. The last bit of the control byte (R/ W ) defines the operation to be performed. When set to a 1 a read operation is select ed, and when set to a 0 a write operation is selected. Following the START condition, the DS1721 monitors th e SDA bus checking the device type identifier being transmitted. Upon receiving the 1001 code and a ppropriate device select bits, the slave device outputs an acknowledge signal on the SDA line. COMMAND SET Data and control information is read from and writte n to the DS1721 in the format shown in Figure 6. To write to the DS1721, the master will issue the slave address of the DS1721 and the R/ W bit will be set to "0". After receiving an acknowledge, the bus master provides a command protocol. After receiving this protocol, the DS1721 will issue an acknowledge and the master may send data to the DS1721. If the DS1721 is to be read, the master must send the command protocol as before then issue a repeated START condition and the control byte again, this time with the R/ W bit set to "1" to allow reading of the data from the DS1721. The command set for the DS1721 as shown in Table 4 is as follows: Read Temperature [AAh] This command reads the last temperature conversion re sult from the Thermometer Register in the format described in the “OPERATION-Measuring Temperat ure” section. If one’s application can accept thermometer resolution of only 1.0°C, the master only must read the first data byte and follow with a NACK and STOP. For higher resolution, both bytes must be read. Access TH [A1h] If R/ W is "0", this command writes to the TH register . After issuing this command, the next 2 bytes written to the DS1721, in the format described for ther mostat set-points, will se t the high temperature threshold for operation of the TOUT output. If R/ W is "1", the value stored in this register is read back. Access TL [A2h] If R/ W is "0", this command writes to the TL register . After issuing this command, the next 2 bytes written to the DS1721, in the format described for ther mostat set-points, will se t the high temperature threshold for operation of the TOUT output. If R/ W is "1", the value stored in this register is read back. Access Config [ACh] If R/ W is "0", this command writes to the configuration register. After issuing this command, the next data byte value is to be written into the configuration register. If R/ W is "1", the next data byte read is the value stored in the configuration register. Start Convert T [51h] This command begins a temperature conversion. No fu rther data is required. In one-shot mode, the temperature conversion will be performed and stored and then the DS1721 will remain idle. In continuous mode, this command will initiate continuous conversions.

Stop Convert T [22h] This command stops temperature conversion. No furthe r data is required. This command may be used to halt a DS1721 in continuous convers ion mode. After issuing this command, the current temperature measurement will be completed, stored and the DS1721 will remain idle until a Start Convert T is issued to resume conversions. DS1721 COMMAND SET Table 4 INSTRUCTION DESCRIPTION PROTOCOL 2-WIRE BUS DATA AFTER ISSUING PROTOCOL NOTES REGISTER COMMANDS Access Configuration Writes to/Reads from 8-bit configuration/status register ACh 1 data byte 1 Access TH Writes to/Reads from 12-bit TH register A1h 1 or 2 data bytes 1, 3 Access TL Writes to/Reads from 12-bit TL register A2h 1 or 2 data bytes 1, 3 CONVERSION COMMANDS Start Convert T Initiates temperature conversion 51h idle 2 Stop Convert T Terminates continuous conversions 22h idle 2 Read Temperature Reads 12-bit Temperature register AAh Read 1 or 2 data bytes 3 NOTES: 1. Data direction depends upon R/ W bit in the 2-wire control byte. 2. In continuous conversion mode, a Stop Convert T command will halt continuous conversion. To restart, the Start Convert T command must be issu ed. In one-shot mode, a Start Convert T command must be issued for every temperature reading desired. 3. If the user only desires 8-bit thermometer readings, the master need only read 1 data byte and follow with a NACK and STOP. If higher resolution is required, 2 bytes must be read.

SAMPLE COMMAND SEQUENCE Table 5 Example: After power-up, initiates a temperature conversion, bus master reads temperature BUS MASTER MODE DS1721 MODE DATA (MSB FIRST) COMMENTS TX RX START Bus Master initiates a START condition TX RX <address, 0> Bus Master sends DS1721 address; R/ W = 0 RX TX ACK DS1721 generates acknowledge bit TX RX 51h Bus Master sends start convert T protocol RX TX ACK DS1721 generates acknowledge bit TX RX START Bus Master initia tes a repeated START condition TX RX <address, 0> Bus Master sends DS1721 address; R/ W = 0 RX TX ACK DS1721 generates acknowledge bit TX RX AAh Bus Master sends read temperature protocol RX TX ACK DS1721 generates acknowledge bit TX RX START Bus Master initia tes a repeated START condition TX RX <address, 1> Bus Master sends DS1721 address; R/ W =1 RX TX ACK DS1721 generates acknowledge bit RX TX <1 data byte> DS1721 tr ansmits MSB of temperature TX RX ACK Bus Master generates acknowledge bit RX TX <1 data byte> DS1721 transmits LSB of temperature

SAMPLE COMMAND SEQUENCE Table 6 Example: Bus master programs the DS1721 for 11-bit c onversions in the continuous mode with an active low state for the thermostat output. It then programs TH=50°C and TL=45°C and starts temperature conversions. BUS MASTER MODE DS1721 MODE DATA (MSB FIRST) COMMENTS TX RX START Bus Master initiates a START condition TX RX <address, 0> Bus Master sends DS1721 address; R/ W = 0 RX TX ACK DS1721 generates acknowledge bit TX RX ACh Bus Master sends access configuration protocol RX TX ACK DS1721 generates acknowledge bit TX RX 08h Bus Master programs configuration register as described above. This will also clear thermostat flags RX TX ACK DS1721 generates acknowledge bit TX RX START Bus Master Initiates a REPEATED START condition TX RX <address, 0> Bus Master sends DS1721 address; R/ W = 0 RX TX ACK DS1721 generates acknowledge bit TX RX A1h Bus Master sends access TH protocol RX TX ACK DS1721 generates acknowledge bit TX RX 32h Bus Master wr ites MSB of TH (50°C) RX TX ACK DS1721 generates acknowledge bit TX RX 00h Bus Master wr ites LSB of TH (50°C) RX TX ACK DS1721 generates acknowledge bit TX RX START Bus Master initiates a REPEATED START condition TX RX <address, 0> Bus Master sends DS1721 address; R/ W = 0 RX TX ACK DS1721 generates acknowledge bit TX RX A2h Bus Master sends access TL protocol RX TX ACK DS1721 generates acknowledge bit TX RX 2Dh Bus Master wr ites MSB of TL (45°C) RX TX ACK DS1721 generates acknowledge bit TX RX 00h Bus Master wr ites LSB of TL (45°C) RX TX ACK DS1721 generates acknowledge bit TX RX START Bus Master initiates a REPEATED START condition TX RX <address, 0> Bus Master sends DS1721 address; R/ W = 0 RX TX ACK DS1721 generates acknowledge bit TX RX 51h Bus Master sends start convert protocol RX TX ACK DS1721 generates acknowledge bit TX RX STOP Bus Master initiates STOP condition

ABSOLUTE MAXIMUM RATINGS* Voltage on VDD, Relative to Ground -0.3V to +6.0V Voltage on any other pin, Related to Ground -0.3V to +6.0V Operating Temperature -55°C to +125°C Storage Temperature -55°C to +125°C Soldering Temperature 260°C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (-55°C to +125°C; 2.7V /g163 VDD /g163 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES Supply Voltage V DD 2.7 5.5 V 1 DC ELECTRICAL CHARACTERISTICS (-55°C to +125°C; 2.7V /g163 VDD /g163 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES Input Logic High V IH 0.7 VDD VDD +0.3 V 1 Input Logic Low V IL -0.5 0.3 VDD V 1 VOL1 3 mA sink current 0 0.4 V 1 SDA Output Logic Low Voltage VOL2 6 mA sink current 0 0.6 V 1 VOH 1 mA source current 2.4 V 1 TOUT Output Logic Voltage VOL 4 mA sink current 0.4 V 1 Input Current Each I/O Pin 0.4V /g163 VI/O /g163 0.9 VDD -10 +10 µA 2 I/O Capacitance C I/O 10 pF Standby Current I DD1 0.8 µA 3, 4 Temperature Conversions, -55°C to +85°C +85°C to +125°C 1000 1250 µA 3, 4 Communication only 110 µA 3, 4 Active Current I DD EEPROM Write 400 µA 3,4

DC ELECTRICAL CHARACTERISTICS: DIGITAL THERMOMETER (-55°C to +125°C; 2.7V /g163 VDD /g163 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES -10°C to +85°C, 3.0V≤VDD≤5.5V ±1.0 °C -10°C to +85°C, 2.7V≤VDD<3.0V ±1.5 °C DS1721 Thermometer Error TERR Resolution 9 12 bits 9-bit Conversions 93.75 10-bit Conversions 187.5 11-bit Conversions 375 Conversion Time t CONVT 12-bit Conversions 750 ms AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (-55°C to +125°C; V DD=2.7V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES SCL Clock Frequency fSCL Fast Mode Standard Mode 0 400

100 KHz

t BUF Fast Mode Standard Mode 1.3 4.7 µs Hold Time (Repeated) START Condition t HD:STA Fast Mode Standard Mode 0.6 4.0 µs 5 Low Period of SCL Clock tLOW Fast Mode Standard Mode 1.3 4.7 µs High Period of SCL Clock tHIGH Fast Mode Standard Mode 0.6 4.0 µs Setup Time for a Repeated START Condition t SU:STA Fast Mode Standard Mode 0.6 4.7 µs Data Hold Time t HD:DAT Fast Mode Standard Mode 0 0.9 µs 6 Data Set-up Time t SU:DAT Fast Mode Standard Mode 100 250 ns 7 Rise Time of both SDA and SCL Signals t R Fast Mode Standard Mode 20+0.1 CB 300 1000 ns 7 Fall Time of both SDA and SCL Signals t F Fast Mode Standard Mode 20+0.1 CB 300 1000 ns 8 Set-up time for STOP Condition tSU:STO Fast Mode Standard Mode 0.6 4.0 µs

Input Capacitance C I 5 pF NOTES: 1. All voltages are referenced to ground. 2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if V DD is switched off. 3. I DD specified with TOUT pin open. 4. I DD specified with VDD at 5.0V and SDA,SCL = 5.0V, 0°C to 70°C. 5. After this period, the first clock pulse is generated. 6. The maximum t HD:DAT has only to be met if the devi ce does not stretch the LOW period (t LOW) of the SCL signal. 7. A fast mode device can be used in a st andard mode system, but the requirement t SU:DAT >250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line t R MAX+tSU:DAT 1000+250 = 1250 ns before the SCL line is released. 8. C b - total capacitance of one bus line in pF. TIMING DIAGRAMS Figure 7

TYPICAL DS1721 THERMOMETER PERFORMANCE CURVE Figure 8 DS1721