DS1602 MAXIM | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 8
Technical content
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
FEATURES
§ Two 32-bit counters keep track of real-time and elapsed time § Counters keep track of seconds for over 125 years § Battery powered counter counts seconds from the time battery is attached until VBAT is less than 2.5V § VCC powered counter counts seconds while VCC is above VTP and retains the count in the absence of VCC under battery backup power § Clear function resets selected counter to 0 § Read/write serial port affords low pin count § Maximum current drain of less than 1 µA from VBAT pin when serial port is disabled § One byte protocol defines read/write, counter address and software clear function § 8-pin DIP or optional 8-pin SOIC § Operating temperature range of -40°C to +85°C § Reduced performance operation down to VCC = 2.5V § Underwriters Laboratory (UL) recognized PIN ASSIGNMENT Package Dimension Information www.maxim-ic.com/TechSupport/DallasPackInfo.htm PIN DESCRIPTION RST - Reset CLK - Clock DQ - Data Input/Output GND - Ground X1, X2 - Crystal Inputs VBAT - + Battery Input VCC - +5V
DESCRIPTION
The DS1602 is a real -time clock/elapsed time counter designed to count seconds when V CC power is applied and continually count seconds under battery backup power with an additional counter regardless of the condition of VCC. The continuous counter can be used to derive time of day, week, month, and year by using a software algorithm. The V CC powered counter will automatically rec ord the amount of time that VCC power is applied. This function is particularly useful in determining the operational time of equipment in which the DS1602 is used. Alternatively, this counter can also be used under software control to record real-time events. Communication to and from the DS1602 takes place via a 3 -wire serial port. A 1 -byte protocol selects read/ write functions, counter clear functions and oscillator trim. A low cost 32.768kHz crystal attaches directly to the X1 and X2 pins. If battery p owered-only operation is desired, the VBAT pin must be grounded and the VCC pin must be connected to the battery. DS1602 8-Pin DIP (300mil) VCC VBAT RST DQ CLK GND DS1602 8-Pin SOIC (208mil) RST DQ CLK GND VCC VBAT DS1602 Elapsed Time Counter www.maxim -ic.com www.maxim-ic.com
elapsed time counter occur over a 3-wire serial port. The port is activated by driving RST to a high state. bit continuous counter always runs provided that a valid supply is present and the oscillator is enabled. The 32-bit VCC active counter is gated by VCC and the internal 1Hz signal. Table 1. Each data transfer to the protocol register designates what action is to occur. As defined, the
- Bit 0 of the protocol (designated RD) determines whether the 32 clocks to follow will write a counter
should always follow the protocol. RST turns on the serial port logic, which allows access to the protocol register for the protocol data entry.
transfer. A clock cycle is a sequence of a rising edge followed by a falling edge. For write inputs, data must be valid during the rising edge of the clock. Data bits are output on the falling edge of the clock when data is being read. All data transfers terminate if the RST input is transitioned low and the DQ pin goes to a high -impedance state. RST should only be transitioned low while the clock is high to avoid disturbing the last bit of data. All data transfers must consist of 8 bits when transferring protocol only or 8 + 32 bits when reading or writing either counter. Data transfer is illustrated in Figure 3. DATA INPUT Following the 8-bit protocol that inputs write mode, 32 bits of data are written to the selected counter on the rising edge of the next 32 CLK cycles. After 32 bits have been entered any additional CLK cycles will be ignored until RST is transitioned low to end data transfer, and th en high again to begin new data transfer. DATA OUTPUT Following the eight CLK cycles that input read mode protocol, 32 bits of data will be output from the selected counter on the next 32 CLK cycles. The first data bit to be transmitted from the selected 32-bit counter occurs on the falling edge after the last bit of protocol is written. When transmitting data from the selected 32-bit counter, RST must remain at high level as a transition to low level will terminate data transfer. Data is driven out the DQ pin as long as CLK is low. When CLK is high the DQ pin is tristated. CRYSTAL SELECTION A standard 32.768kHz quartz crystal can be directly connected to the DS1602 via pins 1 and 2 (X1, X2). The crystal selected for use should have a s pecified load capacitance (C L) of 6pF. For more information on crystal selection and crystal layout considerations, please consult Application Note 58: Crystal Considerations with Dallas Real-Time Clocks. BATTERY SELECTION The battery selected for use wit h the DS1602 should have an output voltage between 2.5V and 3.5V. A lithium battery of 35mAh or greater will run the elapsed time counter for over 10 years in the absence of power. Small lithium coin cell batteries produce both the proper output voltage an d have the capacity to supply the DS1602 for the useable lifetime of the equipment where they are installed. PIN DESCRIPTIONS Vcc, GND – DC power is provided to the device on these pins. V CC is the +5V input. When 5V is applied within normal limits, the device is fully accessible and data can be written and read. When a 3V battery is connected to the device and VCC is below 1.25 x VBAT, reads and writes are inhibited. As VCC falls below VBAT the continuous counter is switched over to the external power supply (nominal 3.0V DC) at VBAT. CLK (Serial Clock Input) – CLK is used to synchronize data movement on the serial interface. DQ (Data Input/Output) – The DQ pin is the bidirectional data pin for the 3-wire interface. RST (Reset) – The reset signal must be asserted high during a read or a write. X1, X2 – Connections for a standard 32.768kHz quartz crystal. The internal oscillator is designed for operation with a crystal having a specified load capacitance of 6pF. For more information on crystal selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations with
Table 1. VALID PROTOCOLS
Figure 3. DATA TRANSFER Note: tCL, tCH, tR, and tF apply to both read and write data transfer.
Voltage Range on Any Pin Relative to Ground -0.3V to +7.0V Operating Temperature Range -40°C to +85°C Storage Temperature Range -55°C to +125°C Soldering Temperature Range See IPC/JEDEC J-STD-020A This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect reliability. RECOMMENDED DC OPERATING CONDITIONS (-40°C to +85°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Supply Voltage VCC 4.5 5.0 5.5 V 1 Battery Supply Voltage VBAT 2.5 3.0 3.5 V 1 Logic 1 Input VIH 2.0 VCC + 0.3 V 1 Logic 0 Input VIL -0.3 0.8 V 1 DC ELECTRICAL CHARACTERISTICS (-40°C to +85°C; VCC = 5V ±10%) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Leakage ILI -1 +1 µA I/O Leakage ILO -1 +1 µA Logic 1 Output VOH 2.4 V 2 Logic 0 Output VOL 0.4 V 3 Active Supply Current ICC 1 mA 4 Timekeeping Current ICC1 50 µA 5, 12 Timekeeping Current IBAT 400 nA 6, 12 Leakage Current IBATL 100 nA 11 Battery Trip Point VTP 1.216 x VBAT 1.26 x VBAT 1.285 x VBAT V CAPACITANCE (tA = +25°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Capacitance CI 5 pF I/O Capacitance CI/O 10 pF Crystal Capacitance CX 6 pF 10
AC ELECTRICAL CHARACTERISTICS (VCC = +5V ±10%; -40°C to 85°C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Data to CLK Setup tDC 50 ns 7 CLK to Data Hold tCDH 60 ns 7 CLK to Data Delay tCDD 200 ns 7, 8, 9 CLK Low Time tCL 250 ns 7 CLK High Time tCH 250 ns 7 CLK Frequency fCLK DC 2.0 MHz 7 CLK Rise and Fall tF, tR 500 ns RST to CLK Setup tCC 100 ns 7 CLK to RST Hold tCCH 60 ns 7 RST Inactive Time tCWH 1 µs 7 RST Low to I/O High-Z tRDZ 70 ns 7 CLK High to I/O High-Z tCDZ 20 ns 7 NOTES: 1) All voltages are referenced to ground. 2) Logic 1 voltages are specified at a source current of 1mA. 3) Logic 0 voltages are specified at a sink current of 4mA. 4) ICC is specified with the DQ pin open. 5) ICC1 is specified with VCC at 5.0V and RST = GND. 6) IBAT is specified with VCC < VBAT and VBAT within DC recommended operating conditions. 7) Measured at VIH = 2.0V or VIL = 0.8V. 8) Measured at VOH = 2.4V or VOL = 0.4V. 9) Load capacitance = 50pF. 10) Specified as the load capacitance for which the crystal frequency is guaranteed (see crystal manufacturer’s data sheet). 11) Leakage current is the amount of current consu med from the battery when V CC is not present and the oscillator is turned off. 12) Using a crystal on X1 and X2.