DS1217A MAXIM | Alldatasheet
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SEMICONDUCTOR Nonvolatile Read/Write Cartridge FEATURES PIN ASSIGNMENT © User-insertable Name Position Name © Capacity up to 32K x 8 Ground | a1 Bi | NoConnect +5 Volts: © Standard bytewide pinout facilitates connection to wicewn | Be ness i JEDEC 28-pin DIP socket via ribbon cable a3 Bs ress Address 13 A4 B4 | Address 7 © Data retention greater than 10 years address8 | as | | Bs | Address 6 ° Address 9 AG Be | Address 5 Automatic write protection ceulty safeguards naires 1 | ay | | pe | Address 4
9 Ouiput Enable | as Bs | Address 3
© Manual switch unconditionally protects data Address10 | ag | | Bo | Address 2 Cartridge Enable | ato |_| B10| Address 1 © Compact size and shape Datavo7 | art [7] Bit | Address 0 Rugged and durable DataVO6 | ai2 B12] DatavOo Data VO 5 AI3 B13] DatavO1 © Wide operating temperature range of 0°C to 70°C Datavo4 | ara} | B14] Datavo2 Data O03 AIS B15] Ground OFF-ON AI Bi ‘See Mech. Drawings Section
DESCRIPTION
The DS1217A is a nonvolatile RAM designed for porta-___ remote method can be used to retrofit existing systems ble applications requiring a rugged and durable pack- _that have JEDEC 28-pin bytewide memory sites. age. The nonvolatile cartridge is available in densities ranging from 2K x 8 to 32K x Bin 8K byte increments. A The DS1217A cartridge has a lifetime energy source to card edge connector is required for connection to ahost _retain dataandcircultry neededito automatically protect system. A standard 30-pin connector can beusedfordi- memory contents. Reading and writing the memory lo- rect mount to a printed circuit board. Alternatively, re- _cationsis the sameas using conventional static RAM. If mote mounting can be accomplished with a28-conduc- _the user wants to convert from read/write memory to tor ribbon cable terminated with a28-pin DIP plug. The _ read-only memory, a manual switch is provided to un- conditionally protect memory contents 8085 78
READ MODE during power-up, when Voc rises above approximately The DS1217A executes a read cycle whenever WE 3.0 volts, the power switching circuit connects the exter- (write enable) is inactive (high) and CE (cartridge en- _ nal Vgc to the RAM and disconnects the lithium energy able) is active (low). The unique address specified by source. Normal RAM operation can resume after Voc the 15 address inputs (A0-A14) defines which of the exceeds 4.5 volts 32,768 bytes of datais to be accessed. Valid data will be available to the eight data //O pins within tacc (access. The DS1217Acchecks battery status to wam of potential time) after the last address input signals stable, provid- data loss. Each time that Vcc power is restored to the ing that CE and OE (output enable) access times are cartridge, the battery voltage is checked with a precision also satisfied. If OE and CE times are not satisfied , then comparator. If the battery supply is less than 2.0 volts, data access must be measured from the latter occurring the second memory cycle is inhibited, Battery status signal (CE or OE); the limiting parameters eithertgofor can, therefore, be determined by performing a read CE or tog for OE rather than address access. Read cycle after power-up to any location in memory, record- cycles can only occur when Voc is greater than 4.5 _ ing that memory location content. A subsequent write volts. When Vgc is less than 4.5 volts, the memory is __ cycle can then be executed to the same memory loca- inhibited and all accesses are ignored. tion, altering data. If the next read cycle fails to verify the written data, the contents of the memory are question- able. WRITE MODE The DS1217A is in the write mode whenever both the in many applications, data integrity is paramount. For WE and CE signals are in the active (low) state after ad- this reason, the cartridge provides batlery redundancy. dress inputs are stable. Thelast falling edge to occur of The DS1217A features an internal isolation switch that either CE or WE will determine the start of the write provides for the connection of two batteries. During bat- cycle. The write cycle is terminated by the first rising tery backup time, the battery with the highest voltage is edge of either CE or WE, All address inputs mustbe selected for use. If one battery fails, the other will auto- kept validthroughout the write cycle, WEmust return to matically take over. The switch between batteries is the high state for a minimum recovery time (twp) before transparenttothe user. A battery status warning will oc- another cycle can be initiated. The OE control signal cur if both batteries are less than 2.0 volts. should be kept inactive (high) during write cycles to avoid bus contention. However, if the output bus has been enabled (CE and OE active) then WE will disable ~ REMOTE CONNECTION VIA A RIBBON the outputs in topw from its falling edge. Write cycles CABLE can only occur when Voc is greater than 4.5 volts. Existing systems that contain 28-pin bytewide sockets When Vog is less than 4.5 volts, the memory is write can beretrofitted using 28-pin DIP plug. The DIP plug, protected. AMP Part Number 746616-2, can be inserted into the 28-pin site after the memory is removed. Connection to the cartridge is accomplished via a 28-pin ribbon cable DATA RETENTION MODE connected to a 30-contact card edge connector, AMP The Nonvolatile Cartridge provides full functional capa- part Number 499188-4. The 28-pin ribbon cable must bility for Voc greater than 4.5 volts andguarantees write right-justified such that positions A1 and B1 are left protection for Voc less than 4.5 volts. Data Is main- —_gisconnected. For applications where the cartridge is tainedin the absence of Voc without any additional sup- installed or removed with power applied, both ground port circuitry. The DS1217A constantly monitors Veo. —_gontacts (A1 and B15) on the card edge connector Should the supply voltage decay, the RAM Is automati- should be grounded to further enhance data integrity cally write protected below 4.5 volts. As Vccfallsbelow Access time push-out may occur as the distance be- approximately 3.0 volts, the power switching circuitcon- tween the cartridge and driving circuitry is increased. nects a lithium energy source to RAM. To retain data 00598 2/8
CARTRIDGE NUMBERING Table 1 [osievwisonas [awe SSC~*S [osterwasscas [axe SSCS “Unused address inputs must be held low (Vi). 908588 88 | [
ABSOLUTE MAXIMUM RATINGS* Voltage on Any Connection Relative to Ground —-0.3V to +7.0V Operating Temperature 0°C to 70°C Storage Temperature -40°C to +70°C * Thisisastress ratingonly and functional operation of he device at these or any other conditions above those indicated in the operation sections of this specification Is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (0°C to 70°C) PARAMETER symeo.| min | Typ | MAX | UNITS | NOTES DC ELECTRICAL CHARACTERISTICS (0°C to 70°C; Vec=5V + 10%) PARAMETER symeo.| MIN | TYP | MAX. | UNITS | NOTES WO Leakage Current 10 +10 HA CE 2Vin < Voc [seuby Gwen eae [eo [| 80] of mf] CAPACITANCE (ta = 25°C) PARAMETER symeo.| min | TYP | MAX. | UNITS | NOTES freweapince J ew [| = > | 020898 4/8
AC ELECTRICAL CHARACTERISTICS (0°C to 70°C; Vec=5V + 10%) [rarameren | sywoou [wn | TP | wax | uwrs | wore | a Output High Z from ea i cae i eaves fm TT | Address Change [ouparinzton We | tow | | | i | nm» | = | [bas oaTineonWE | ow | 2 | | | » | +] mms mae | [
READ CYCLE (1) lac ace tox is " om SSS ZZ WA WRITE CYCLE 1 (2), (6), (7) twe. cor SSSSSSSSSSS DA iiteoatce AV ATAVAVAVAVA LINN AA Se DaTA IN M Viv Vie WRITE CYCLE 2 (2), (8) ‘w Vin We SSASNSNNNN 777777774 ‘oo lez petoow | Pour SOO 1b: | i Vin Vin Oy {ome Vi vi 180898 07
POWER-DOWN/POWER-UP CONDITION Voc" sav | VO te tr tpp treo LEAKAGE CURRENT DATA RETENTION TIME I, SUPPLIED FROM LITHIUM CELL tor POWER-DOWN/POWER-UP TIMING (0°C to 70°C) (ta = 25°C) WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when the device is in battery backup mode. 030898 7/8
NOTES: 1. WEis high for a read cycle. 2. OE=Viyor Vip. If OE = Vix during the write cycle, the output buffers remain in a high impedance state. 3. twp is specified as the logical AND of CE and WE. twp is measured from the latter of CE or WE going low to the earlier of CE or WE going high 4. tpy. tps are measured from the earlier of CE or WE going high. 5. These parameters are sampled with a 5pF load and are not 100% tested. 6. If the CE low transition occurs simultaneously with or later than the WE low transition in Write Cycle 1, the output buffers remain in a high impedance state during this period 7. Ifthe CE high transition occurs prior to or simultaneously with the WE high transition in Write Cycle 1, the output buffers remain in a high impedance state during this period. 8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remains in a high impedance state during this period. 9. Each DS1217A is marked with a 4-digit date code AABB. AA designates the year of manufacture; BB desig- nates the week of manufacture. The expected tpr is defined as starting at the date of manufacture. 10. Removing and installing the cartridge with power applied may disturb data DC TEST CONDITIONS AC TEST CONDITIONS Outputs Open Output Load: 100pF + 1TTL Gate t Cycle = 250ns Input Pulse Levels: 0 - 3.0V All Voltages Are Referenced to Ground Timing Measurement Reference Levels Input: 1.5 V 030598 8/8
8- TO 28-PIN DIP (300 MIL) Includes: DS1000 pst2i1 ost621 Ds1000m ps1215, os1625 B DS1003 ps1221 Dsi632 DS1003M S122 Ds1640 Hd DS1004M Ds1228 Ds1651 S105 Ds1229 ps1652
1 DS1005M Ds1231 s16528
Dst010 DSi2a2LP DS 1666. DS1012M 0S1234 DS1667 o DS1013 DS1236 Ds1669 DS1013M Dsi237 Ds1802 E Ds1020 0S1238 Ds1830 c WY DS1033M Ds1239 Ost832 TF J 0S1035M DS1259 0s1867 F DS1040M 0S1267 DS1868 a. — Ds1044 Ds1275 DS1869 K | ke +— H —| DS1045 081291 0820090 0S1200 Ds1293 $2010 Ds1206 DS1336 DS2011D 0S1210 DS1620 DS2013D 610 | 660 | 610 | 660 | 610 | 680 | 610 | 660 0.120 | 0.140 0140 | 0.120 | 0.140 3.05 | 3.56 356 | 305 | 3.56 3.04 3.56 279 3.56 3.56 2.29 229 | 279 | 229 | 279 | 229 | 279 313 | 940 | 813 | 940 | 813 | 940 | 819 | 9.40 020 | 030 | 020 | 030 | 020 | 030 | 020 | 030 038 | 053 | 038 | 053 | 0.38 0.38 Continued on following page. apy 185 by Dates Semicon Conoraton 081695 1/35 [AL Rights Reseried For mporart formation tgardig ened eat asey ama ao Mi 2b14130 0014415 109
Co [em 610 | 660 | 609 | 686 | 635 | 68s | 685 | 7.49 3.56 356 | 305 | 3.56 3.56 7.62 | 826 | 749 | 826 | 762 | 8.26 7.62 | 826 0.38 | 1.02 | 038 | 102 | 038 | 1.02 038 | 127 0.140 | 0.120 | 0.140 0.135 356 | 3.04 | 356 3.48 223 | 279 | 223 | 279 | 223 | 279 223 | 279 ee 081695 2/35, MH 2614130 OOLW41b OFS mm