DRV603PWR

DRV603 TI1 | Alldatasheet

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www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 DirectPath™ ,3-VRMSLineDriverWithAdjustableGain Check forSamples: DRV603 1FEATURES DESCRIPTION 234• DirectPath™ The DRV603PW is a 3-VRMS pop-freestereoline driverdesigned to allowthe removal of the output– EliminatesPop/Clicks dc-blockingcapacitorsforreduced component count– EliminatesOutput DC-Blocking Capacitors and cost. The device is ideal for single-supply– ProvidesFlatFrequency Response 20 electronicswhere sizeand cost are criticaldesign Hz–20 kHz parameters.

• Low Noise and THD Designed using TI’s patented DirectPath™ – SNR > 109 dB technology,The DRV603 iscapableofdriving3 Vrms intoa 2.5-kΩ load with 5-V supply voltage.The– TypicalVn < 7 μVms device has differentialinputs and uses external– THD+N < 0.002% gain-settingresistorsto supporta gain range of ±1
• Output VoltageInto2.5-kΩ Load V/V to±10 V/V,and lineoutputsthathave ±8 kV IEC ESD protection.The DRV603 (occasionallyreferred– 2 Vrms With 3.3-VSupply Voltage to as the ‘603) has built-inshutdown controlfor– 3 Vrms With 5-V Supply Voltage pop-freeon/offcontrol.The DRV603 has an external• DifferentialInput and internalundervoltagedetectorthatmutes the output.• ExternalUndervoltageMute Using the DRV603 in audio productscan reduceAPPLICATIONS component count considerably compared to
• PDP /LCD TV traditionalmethods ofgeneratinga 3-Vrms output.The DRV603 does not requirea power supply greater• Blu-rayDisc™ ,DVD Players than 5 V to generateits8.5-Vpp output,nor does it• Home Theaterina Box requirea split-railpower supply. The DRV603• Set-TopBoxes integratesits own charge pump to generate a negativesupplyrailthatprovidesa clean,pop-free groundbiased3-Vrms output. The DRV603 isavailableina 14-pinTSSOP. Ifthe low noiseand trimmed dc-offsetand external undervoltagemute functionare not beneficialinthe application,TI recommends the footprintcompatible DRV602. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2DirectPathisa trademarkofTexas Instruments. 3Blu-rayDiscisa trademarkofBlu-rayDiscAssociation. 4Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2009,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. ORDERING INFORMATION (1) TA PACKAGE TRANSPORT MEDIA, QUANTITY DRV603PW RAIL,90 –40°C to85°C Tape and reel,2000DRV603PWR (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI Web siteatwww.ti.com. ABSOLUTE MAXIMUM RATINGS (1) overoperatingfree-airtemperaturerange VALUE UNIT Supplyvoltage,VDD toGND –0.3to5.5 V VI Inputvoltage VSS – 0.3toVDD + 0.3 V R L Minimum loadimpedance > 600 Ω EN toGND –0.3toVDD +0.3 V TJ Maximum operatingjunctiontemperaturerange –40 to150 °C Tstg Storagetemperaturerange –40 to150 °C ESD Electrostaticdischarge,IEC ESD OUTL, OUTR ±8 kV (1) Stressesbeyond thoselistedunderabsolutemaximum ratingsmay cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunderrecommended operating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability. DISSIPATION RATINGS POWER RATING (1) POWER RATING (1) PACKAGE R θJC (°C/W) R θJA (°C/W) AT TA ≤ 25°C AT TA ≤ 70°C TSSOP-14 (PW) 35 115(2) 870 mW 348 mW (1) Power ratingisdeterminedwitha junctiontemperatureof125°C. Thisisthepointwhere performancestartstodegradeand long-term reliabilitystartstobe reduced.Thermalmanagement ofthefinalPCB shouldstrivetokeep thejunctiontemperatureatorbelow125°C forbestperformanceand reliability. (2) These datawere takenwiththeJEDEC high-Ktestprintedcircuitboard(PCB).FortheJEDEC low-KtestPCB, theR θJA is185°C/W. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT VDD Supplyvoltage DC supplyvoltage 3 3.3 5.5 V VIH High-levelinputvoltage EN 60 % ofVDD VIL Low-levelinputvoltage EN 40 % ofVDD TA Operatingfree-airtemperature 0 70 °C

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ELECTRICAL CHARACTERISTICS

TA = 25°C (unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT |VOS | Outputoffsetvoltage VDD = 3 V to5 V,inputgrounded,unitygain 1 mV PSRR Power-supplyrejectionratio VDD = 3 V to5 V 88 dB VOH High-leveloutputvoltage VDD = 3.3V,R L = 2.5kΩ 3.1 V VOL Low-leveloutputvoltage VDD = 3.3V,R L = 2.5kΩ –3.05 V |IIH| High-levelinputcurrent(EN) VDD = 5 V,VI= VDD 1 µA |IIL| Low-levelinputcurrent(EN) VDD = 5 V,VI= 0 V 1 µA VDD = 3.3V,no load,EN = VDD 11 IDD Supplycurrent VDD = 5 V,no load,EN = VDD 12.5 mA Shutdown mode, VDD = 3 V to5 V 1 OPERATING CHARACTERISTICS VDD = 3.3V ,TA = 25°C, R L = 2.5kΩ,C (PUMP) = C (PVSS) = 1 µF ,C IN = 10 µF,R IN = 10 kΩ,R fb = 20 kΩ (unlessotherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT THD = 1%, VDD = 3.3V,f= 1 kHz 2.05 VO Outputvoltage(outputsinphase) THD = 1%, VDD = 5 V,f= 1 kHz 3.01 Vrms THD = 1%, VDD = 5 V,f= 1 kHz,R L = 100 kΩ 3.1 THD+N Totalharmonicdistortionplusnoise VO = 2 Vrms,f= 1 kHz 0.001% Crosstalk VO = 2 Vrms,f= 1 kHz –100 dB IO Maximum outputcurrent VDD = 3.3V 20 mA R IN Inputresistorrange 1 10 47 kΩ R fb Feedback resistorrange 4.7 20 100 kΩ Slew rate 4.5 V/μs Maximum capacitiveload 220 pF VN Noiseoutputvoltage BW = 20 Hz to22 kHz,A-weighted 6 μVrms VO = 3 Vrms,THD+N = 0.1%,BW = 22 kHz,SNR Signal-to-noiseratio 112 dBA-weighted G BW Unity-gainbandwidth 8 MHz AVO Open-loopvoltagegain 150 dB Vuvp Externalundervoltagedetection 1.25 V ExternalundervoltagedetectionIHys 5 μAhysteresiscurrent fcp Charge pump frequency 225 450 675 kHz Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):DRV603

-INR OUTR SGND 7 8 EN PVSS CN CP PVDD PGND OUTL -INL +IN Charge□Pump UVP External Under Voltage Detector DRV603 SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com PW PACKAGE (TOP VIEW) PIN FUNCTIONS PIN I/O(1) DESCRIPTION NAME NO. +INR 1 I Right-channelOPAMP positiveinput –INR 2 I Right-channelOPAMP negativeinput OUTR 3 O Right-channelOPAMP output SGND 4 P Signalground EN 5 I Enableinput,active-high PVSS 6 P Supplyvoltage CN 7 I/O Charge-pump flyingcapacitornegativeterminal CP 8 I/O Charge-pump flyingcapacitorpositiveterminal PVDD 9 P Positivesupply PGND 10 P Power ground UVP 11 I Undervoltageprotectioninput OUTL 12 O Left-channelOPAMP output –INL 13 I Left-channelOPAMP negativeinput +INL 14 I Left-channelOPAMP positiveinput (1) I= input,O = output,P = power

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Click&Pop Suppression Short□Circuit Protection SGND Bias Circuitry PVSS CN CP PVDD -INR +INR OUTL -INL OUTR +INL EN PGND UVP Line Driver Line Driver DRV603 www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 FUNCTIONAL BLOCK DIAGRAM Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):DRV603

100m 5200m 300m 500m 800m 2 3 4 V -□Output□Voltage□-□VO 0.0001 0.001 0.01 0.1 THD+N□-□Total□Harmonic□Distortion+Noise□-□% 0.0001 0.001 0.01 0.1 THD+N□-□Total□Harmonic□Distortion+Noise□-□% 100m 5200m 500m 800m 2 3 4 V -□Output□Voltage□-□VO 0.0001 0.001 0.01 0.1 THD+N□-□Total□Harmonic□Distortion+Noise□-□% 100m 5200m 500m 800m 2 3 4 V -□Output□Voltage□-□VO 0.0001 0.001 0.01 0.1 THD+N□-□Total□Harmonic□Distortion+Noise□-□% 100m 5200m 500m 800m 2 3 4 V -□Output□Voltage□-□VO DRV603 SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS VDD = 3.3V ,TA = 25°C, R L = 2.5kΩ,C (PUMP) = C (VSS) = 1 µF ,C IN = 10 µF,R IN = 10 kΩ,R fb = 20 kΩ (unlessotherwisenoted) TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE vs vs OUTPUT VOLTAGE OUTPUT VOLTAGE VDD = 3.3V,R L = 100 kΩ,f= 1 kHz VDD = 5 V,R L = 100 kΩ,f= 1 kHz Figure1. Figure2. TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE vs vs OUTPUT VOLTAGE OUTPUT VOLTAGE VDD = 3.3V,R L = 2.5kΩ,f= 1 kHz VDD = 5 V,R L = 600 Ω,f= 1 kHz Figure3. Figure4.

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20 20k50 100 200 500 1k 2k 5k 10k f□-□Frequency□-□Hz 0.0001 0.001 0.01 0.1 THD+N□-□Total□Harmonic□Distortion+Noise□-□% 0.0001 0.001 0.01 0.1 THD+N□-□Total□Harmonic□Distortion+Noise□-□% 20 20k50 100 200 500 1k 2k 5k 10k f□-□Frequency□-□Hz -150 +150 -100 -50 +50 +100 20 200k50 100 500 1k 2k 5k 10k 50k f□-□Frequency□-□Hz Phase□-□deg +10 20 200k50 100 500 1k 2k 5k 10k 50k f□-□Frequency□-□Hz Gain□-□dBV DRV603 www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS (continued) VDD = 3.3V ,TA = 25°C, R L = 2.5kΩ,C (PUMP) = C (VSS) = 1 µF ,C IN = 10 µF,R IN = 10 kΩ,R fb = 20 kΩ (unlessotherwisenoted) TOTAL HARMONIC DISTORTION+NOISE TOTAL HARMONIC DISTORTION+NOISE vs vs FREQUENCY FREQUENCY VDD = 3.3V,R L = 2.5kΩ,VO = 2 Vrms VDD = 5 V,R L = 100 kΩ,VO = 2 Vrms Figure5. Figure6. PHASE GAIN vs vs FREQUENCY FREQUENCY VDD = 5 V,R L = 100 kΩ,VO = 2 Vrms VDD = 5 V,R L = 100 kΩ,VO = 2 Vrms Figure7. Figure8. Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):DRV603

-0 +1 +2 +3 +4 +5 Quiescent□Current□- A V -□Supply□Voltage□-□VDD No□Load, V =□0□VI -140 -120 -100 -80 -60 -40 -20 0 20k5k 10k 15k f□-□Frequency□-□Hz FFT□-□dBr DRV603 SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) VDD = 3.3V ,TA = 25°C, R L = 2.5kΩ,C (PUMP) = C (VSS) = 1 µF ,C IN = 10 µF,R IN = 10 kΩ,R fb = 20 kΩ (unlessotherwisenoted) FFT vs QUIESCENT CURRENT FREQUENCY vs VDD = 5 V,R L = 100 kΩ,VO = 3 Vrms (-60dB) SUPPLY VOLTAGE Figure9. Figure10.

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Mute□Circuit Output Enable Conventional□Solution DRV603 Mute□Circuit Output Enable 5 V DRV603□Solution VDD VSS GND VDD VDD/2 GND DirectPath 9-12□V DRV603 www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009

APPLICATION INFORMATION

Single-supplyline-driveramplifierstypicallyrequiredc-blockingcapacitors.The top drawing in Figure 11 illustratestheconventionalline-driveramplifierconnectiontotheloadand outputsignal. DC blockingcapacitorsareoftenlargeinvalue,and a mute circuitisneeded duringpower up tominimizeclick and pop. The outputcapacitorand mute circuitconsume PCB area and increasecostof assembly,and can reducethefidelityoftheaudiooutputsignal. Figure11. Conventionaland DirectPathLineDriver The DirectPath™ amplifierarchitectureoperatesfroma singlesupplybutmakes use ofan internalchargepump toprovidea negativevoltagerail. Combiningtheuser-providedpositiverailand thenegativerailgeneratedby theIC,thedeviceoperatesinwhat iseffectivelya splitsupplymode. The outputvoltagesarenow centeredatzerovoltswiththecapabilitytoswingtothepositiverailornegativerail. Combining thiswiththebuilt-inclickand pop reductioncircuit,theDirectPath™ amplifierrequiresno outputdc blockingcapacitors. The bottom blockdiagram and waveform of Figure11 illustratethe ground-referencedline-driverarchitecture. ThisisthearchitectureoftheDRV603. Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):DRV603

-IN Differential Input +IN CIN RIN RFB -IN RINCIN RFB Rx Cx Non Inverting RIN RFB CIN +IN DRV603 SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com CHARGE PUMP FLYING CAPACITOR AND PVSS CAPACITOR The chargepump flyingcapacitorservestotransferchargeduringthegenerationofthenegativesupplyvoltage. The PVSS capacitormust be at leastequalto the charge pump capacitorinorderto allowmaximum charge transfer.Low-ESR capacitorsare an idealselection,and a valueof 1 μF istypical.Capacitorvaluesthatare smallerthan 1 μF can be used, but the maximum outputvoltagemay be reduced and the devicemay not operatetospecifications. DECOUPLING CAPACITORS The DRV603 isa DirectPath™ line-driveramplifierthatrequiresadequate power supplydecouplingto ensure thatthe noise and totalharmonic distortion(THD) are low.A good low equivalent-series-resistance(ESR) ceramiccapacitor,typically1 μF, placedas closeas possibleto the deviceVDD leadworks best.Placingthis decouplingcapacitorclose to the DRV603 is importantforthe performanceof the amplifier.For filtering lower-frequencynoisesignals,a 10-μF or greatercapacitorplacednear the audiopower amplifierwould also help,butitisnotrequiredinmost applicationsbecause ofthehighPSRR ofthisdevice. GAIN-SETTING RESISTOR RANGES The gain-settingresistors,R IN and R fb,must be chosen so thatnoise,stability,and inputcapacitorsizeofthe DRV603 arekeptwithinacceptablelimits.Voltagegainisdefinedas R fb dividedby R IN. Selectingvaluesthataretoolow demands a largeinputac-couplingcapacitor,C IN.Selectingvaluesthataretoo high increasesthe noise of the amplifier.Table 1 liststhe recommended resistorvaluesfordifferentgain settings. Table1.Recommended ResistorValues INPUT RESISTOR FEEDBACK RESISTOR DIFFERENTIAL INPUT NONINVERTING INPUTINVERTING INPUT GAINVALUE, R IN VALUE, R fb GAIN GAIN 22 kΩ 22 kΩ 1 V/V –1 V/V 2 V/V 15 kΩ 30 kΩ 1.5V/V –1.5V/V 2.5V/V 33 kΩ 68 kΩ 2.1V/V –2.1V/V 3.1V/V 10 kΩ 100 kΩ 10 V/V –10 V/V 11 V/V Figure12. Differential,Invertingand Non-InvertingGain Configurations

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• -IN Differential□Input Inverting□Input DRV603 R3 C1 C3 R3 C1 +IN -IN DRV603 DRV603 www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 INPUT-BLOCKING CAPACITORS DC input-blockingcapacitorsare requiredtobe added inserieswiththeaudiosignalintotheinputpinsofthe DRV603. These capacitorsblockthedc portionoftheaudiosourceand allowtheDRV603 inputstobe properly biasedtoprovidemaximum performance. These capacitorsform a high-passfilterwiththe inputresistor,R IN. The cutofffrequencyiscalculatedusing Equation1.For thiscalculation,thecapacitanceused istheinput-blockingcapacitorand theresistanceisthe inputresistorchosen fromTable1.Then thefrequencyand/orcapacitancecan be determinedwhen one ofthe two valuesisgiven. (1) USING THE DRV603 AS A SECOND-ORDER FILTER SeveralaudioDACs used todayrequirean externallow-passfiltertoremove out-of-bandnoise.Thisispossible withtheDRV603, as itcan be used likea standardOPAMP. Severalfiltertopologiescan be implemented,both single-endedand differential.InFigure13 ,a multi-feedback(MFB) withdifferentialinputand single-endedinput isshown. An ac-couplingcapacitortoremove dc contentfromthesourceisshown; itservestoblockany dc contentfrom thesourceand lowersthedc-gainto1,helpingreducingtheoutputdc-offsettominimum. The component valuescan be calculatedwiththehelpoftheTIFilterPro™ program availableon theTIwebsite at: http://focus.ti.com/docs/toolsw/folders/print/filterpro.html Figure13. Second-Order ActiveLow-Pass Filter The resistorvaluesshouldhave a low valueforobtaininglow noise,butshouldalsohave a highenough valueto geta smallsizeac-couplingcapacitor.Using5.6kΩ fortheresistors,C1 = 220 pF,and C2 = 470 pF,a DNR of 112 dB can be achievedwitha 10-μF inputac-couplingcapacitor. Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):DRV603

Supply□Ramp Supply Enable Time□for□ac-coupling capacitors□to□charge R11 R12 R13 Cy VSUP_MO UVP pin□11 DRV603 SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com POP-FREE POWER UP Pop-freepower up isensured by keepingthe SD (shutdownpin)low duringpower-supplyramp up and ramp down. The SD pinshouldbe keptlow untiltheinputac-couplingcapacitorsarefullychargedbeforeassertingthe SD pinhightoachievepop-lesspower up.Figure14 illustratesthepreferredsequence. Figure14. Power-Up Sequence EXTERNAL UNDERVOLTAGE DETECTION Externalundervoltagedetectioncan be used to mute/shutdown the DRV603 beforean inputdevice can generatea pop. The shutdown thresholdat the UVP pin is1.25 V. The user selectsa resistordividerto obtainthe shutdown thresholdand hysteresisforthe specific application.The thresholdscan be determinedas follows: VUVP = 1.25V × (R11 + R12) /R12 Hysteresis= 5 μA × R13 × (R11 + R12) /R12 withtheconditionR13 >> R11//R12. For example, to obtain VUVP = 5 V and 1-V hysteresis,R11 = 3 kΩ, R12 = 1 kΩ and R13 = 50 kΩ. CAPACITIVE LOAD The DRV603 has theabilitytodrivea highcapacitiveloadup to220 pF directly.Highercapacitiveloadscan be acceptedby addinga seriesresistorof47 Ω orlarger. LAYOUT RECOMMENDATIONS A proposedlayoutfortheDRV603 can be seen intheDRV603EVM User'sGuide (SLOU248 ),and theGerber filescan be downloaded from http://focus.ti.com/docs/toolsw/folders/print/drv603evm.html. To access this information,open theDRV603 productfolderand lookintheToolsand Softwarefolder. GAIN-SETTING RESISTORS The gain-settingresistors,R IN and R fb,must be placedclosetotheinputpinstominimizecapacitiveloadingon theseinputpinsand to ensure maximum stabilityof the DRV603. For the recommended PCB layout,see the DRV603EVM user'sguide(SLOU248 ).

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5 V□Supply

Linear□Low□Drop RegulatorR11 R12 10/c109F System□Supply +INL -INL OUTL UVP PGND PVDD CP LineDriver LineDriver Short□CircuitProtection Click□and□PopSuppression Bias Circuitry +INR -INR OUTR SGND EN PVSS CN DRV603 DRV603 www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 APPLICATION CIRCUIT R1 = 5.6kΩ,R2 = 5.6kΩ,R3 = 5.6kΩ,C1 = 220 pF,C2 = 470 pF Differential-input,single-endedoutput,second-orderfilter Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):DRV603

SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 www.ti.com

REVISION HISTORY

NOTE: Page numbers ofcurrentversionmay differfrompreviousversions. Changes from RevisionA (February2009)toRevisionB Page

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www.ti.com SLOS617C –JANUARY 2009–REVISED NOVEMBER 2009 Changes from RevisionB (October2009)toRevisionC Page Copyright© 2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):DRV603

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) DRV603PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DRV603PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 18-Nov-2009 Addendum-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV603PWR TSSOP PW 14 2000 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 2

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