DRV5013-Q1_V01 TI1 | Alldatasheet
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B (mT) OUT BOP (South) BRP (North) BOF Bhys Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DRV5013-Q1 SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 DRV5013-Q1AutomotiveDigital-LatchHallEffectSensor
1 Features
1• AEC-Q100 Qualified for Automotive Applications: – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C4B – Grade 1: TA = –40°C to 125°C (Q, See Device Nomenclature) – Grade 0: TA = –40°C to 150°C (E, See Device Nomenclature)
- Digital Bipolar-Latch Hall Sensor
- Superior Temperature Stability – BOP ±10% Over Temperature
- Multiple Sensitivity Options (BOP / BRP) – 1.3 / –1.3 mT (FA, see Device Nomenclature) – 2.7 / –2.7 mT (AD, see Device Nomenclature) – 6 / –6 mT (AG, see Device Nomenclature) – 12 / –12 mT (BC, see Device Nomenclature)
- Supports a Wide Voltage Range – 2.7 to 38 V – No External Regulator Required
- Open-Drain Output (30-mA Sink)
- Fast 35-µs Power-On Time
- Small Package and Footprint – Surface Mount 3-Pin SOT-23 (DBZ) – 2.92 mm × 2.37 mm – Through-Hole 3-Pin TO-92 (LPG) – 4.00 mm × 3.15 mm
- Protection Features – Reverse Supply Protection (up to –22 V) – Supports up to 40-V Load Dump – Output Short-Circuit Protection – Output Current Limitation – OUT Short to Battery Protection
2 Applications
- Power Tools
- Flow Meters
- Valve and Solenoid Status
- Brushless DC Motors
- Proximity Sensing
- Tachometers
3 Description
The DRV5013-Q1 device is a chopper-stabilized Hall Effect Sensor that offers a magnetic sensing solution with superior sensitivity stability over temperature and integrated protection features. The magnetic field is indicated via a digital bipolar latch output. The IC has an open-drain output stage with 30-mA current sink capability. A wide operating voltage range from 2.7 to 38 V with reverse polarity protection up to –22 V makes the device suitable for a wide range of automotive applications. Internal protection functions are provided for reverse supply conditions, load dump, and output short circuit or over current. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) DRV5013-Q1 SOT-23 (3) 2.92 mm × 1.30 mm TO-92 (3) 4.00 mm × 3.15 mm (1) For all available packages, see the package option addendum at the end of the data sheet. Output State Device Packages
SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 www.ti.com Product Folder Links: DRV5013-Q1 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated Table of Contents
11.2 Receiving Notification of Documentation Updates 21
12 Mechanical, Packaging, and Orderable
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (October 2017) to Revision H Page Changes from Revision F (September 2016) to Revision G Page Changes from Revision E (August 2016) to Revision F Page Changes from Revision D (June 2016) to Revision E Page Changes from Revision C (May 2016) to Revision D Page Changes from Revision B (February 2016) to Revision C Page
www.ti.com SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 Product Folder Links: DRV5013-Q1 Submit Documentation FeedbackCopyright © 2014–2018, Texas Instruments Incorporated Changes from Revision A (December 2015) to Revision B Page Changes from Original (December 2014) to Revision A Page
1 VCC
SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 www.ti.com Product Folder Links: DRV5013-Q1 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated
5 Pin Configuration and Functions
For additional configuration information, see Device Markings and Mechanical, Packaging, and Orderable Information. 3-Pin SOT-23 Top View 3-Pin TO-92 Top View Pin Functions PIN TYPE DESCRIPTION NAME DBZ LPG GND 3 2 GND Ground pin OUT 2 3 Output Hall sensor open-drain output. The open drain requires a resistor pullup. VCC 1 1 PWR 2.7 to 38 V power supply. Bypass this pin to the GND pin with a 0.01-µF (minimum) ceramic capacitor rated for VCC.
www.ti.com SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 Product Folder Links: DRV5013-Q1 Submit Documentation FeedbackCopyright © 2014–2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Ensured by design. Only tested to –20 V.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Power supply voltage VCC –22(2) 40 V Voltage ramp rate (VCC), VCC < 5 V Unlimited V/µs Voltage ramp rate (VCC), VCC > 5 V 0 2 Output pin voltage –0.5 40 V Output pin reverse current during reverse supply condition 0 100 mA Magnetic flux density, BMAX Unlimited Operating junction temperature, TJ Q, see Figure 24 –40 150 E, see Figure 24 –40 175 Storage temperature, Tstg –65 150 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.2 ESD Ratings
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2500 V Charged-device model (CDM), per AEC Q100-011 ±500 (1) Power dissipation and thermal limits must be observed
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Power supply voltage 2.7 38 V VO Output pin voltage (OUT) 0 38 V ISINK Output pin current sink (OUT)(1) 0 30 mA TA Operating ambient temperature Q, see Figure 24 –40 125 E, see Figure 24 –40 150 (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.4 Thermal Information
THERMAL METRIC(1) DRV5013-Q1 UNITDBZ (SOT-23) LPG (TO-92)
3 PINS 3 PINS
RθJA Junction-to-ambient thermal resistance 333.2 180 °C/W RθJC(top) Junction-to-case (top) thermal resistance 99.9 98.6 °C/W RθJB Junction-to-board thermal resistance 66.9 154.9 °C/W ψJT Junction-to-top characterization parameter 4.9 40 °C/W ψJB Junction-to-board characterization parameter 65.2 154.9 °C/W
SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 www.ti.com Product Folder Links: DRV5013-Q1 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated (1) TA, MAX is 125°C for Q Grade 1 devices and 150°C for E Grade 0 devices (see Figure 24)
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES (VCC) VCC VCC operating voltage 2.7 38 V ICC Operating supply current VCC = 2.7 to 38 V, TA = 25°C 2.7 mA VCC = 2.7 to 38 V, TA = TA, MAX(1) 3 3.5 ton Power-on time AD, AG, BC versions 35 50 µs FA version 35 70 OPEN DRAIN OUTPUT (OUT) rDS(on) FET on-resistance VCC = 3.3 V, IO = 10 mA, TA = 25°C 22 Ω VCC = 3.3 V, IO = 10 mA, TA = 125°C 36 50 Ilkg(off) Off-state leakage current Output Hi-Z 1 µA PROTECTION CIRCUITS VCCR Reverse supply voltage –22 V IOCP Overcurrent protection level OUT shorted VCC 15 30 45 mA
6.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OPEN DRAIN OUTPUT (OUT) td Output delay time B = BRP – 10 mT to BOP + 10 mT in 1 µs 13 25 µs tr Output rise time (10% to 90%) R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V 200 ns tf Output fall time (90% to 10%) R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V 31 ns
www.ti.com SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 Product Folder Links: DRV5013-Q1 Submit Documentation FeedbackCopyright © 2014–2018, Texas Instruments Incorporated (1) 1 mT = 10 Gauss (2) Bandwidth describes the fastest changing magnetic field that can be detected and translated to the output.
6.7 Magnetic Characteristics
over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT(1) ƒBW Bandwidth(2) 20 30 kHz DRV5013FA: 1.3 / –1.3 mT BOP Operate point; see Figure 12 –0.6 1.3 3.4 mT BRP Release point; see Figure 12 –3.4 –1.3 0.6 mT Bhys Hysteresis; Bhys = (BOP – BRP) 1.2 2.6 mT BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT DRV5013AD: 2.7 / –2.7 mT BOP Operate point; see Figure 12 1 2.7 5 mT BRP Release point; see Figure 12 –5 –2.7 –1 mT Bhys Hysteresis; Bhys = (BOP – BRP) 5.4 mT BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT DRV5013AG: 6 / –6 mT BOP Operate point; see Figure 12 3 6 9 mT BRP Release point; see Figure 12 –9 –6 –3 mT Bhys Hysteresis; Bhys = (BOP – BRP) 12 mT BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT DRV5013BC: 12 / –12 mT BOP Operate point; see Figure 12 6 12 18 mT BRP Release point; see Figure 12 –18 –12 –6 mT Bhys Hysteresis; Bhys = (BOP – BRP) 24 mT BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT
6.8 Typical Characteristics
Figure 1. ICC vs VCC Figure 2. ICC vs Temperature Figure 3. BOP vs VCC Figure 4. BOP vs Temperature Figure 5. BRP vs VCC Figure 6. BRP vs Temperature
2.7 V to 38 V
Copyright © 2017, Texas Instruments Incorporated (Optional) DRV5013-Q1 SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 www.ti.com Product Folder Links: DRV5013-Q1 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated
7 Detailed Description
7.1 Overview
The DRV5013-Q1 device is a chopper-stabilized Hall sensor with a digital latched output for magnetic sensing applications. The DRV5013-Q1 device can be powered with a supply voltage between 2.7 and 38 V, and continuously survives continuous –22-V reverse-battery conditions. The DRV5013-Q1 device does not operate when –22 to 2.4 V is applied to the VCC pin (with respect to the GND pin). In addition, the device can withstand voltages up to 40 V for transient durations. The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic field. A north pole near the marked side of the package is a negative magnetic field. The output state is dependent on the magnetic field perpendicular to the package. A south pole near the marked side of the package causes the output to pull low (operate point, BOP), and a north pole near the marked side of the package causes the output to release (release point, BRP). Hysteresis is included in between the operate point and the release point therefore magnetic-field noise does not accidentally trip the output. An external pullup resistor is required on the OUT pin. The OUT pin can be pulled up to VCC, or to a different voltage supply. This allows for easier interfacing with controller circuits.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Field Direction Definition
A positive magnetic field is defined as a south pole near the marked side of the package as shown in Figure 11. Figure 11. Field Direction Definition
7.3.2 Device Output
low. If the field strength is less than BRP, then the output is released. Figure 12. DRV5013-Q1— BOP > 0
7.3.3 Power-On Time
Figure 13. Case 1: Power On When B > BOP Figure 14. Case 2: Power On When B < BRP
show examples of this behavior. Figure 15. Case 3: Power On When BRP < B < BOP, Followed by B > BOP
Figure 16. Case 4: Power On When BRP < B < BOP, Followed by B < BRP
7.3.4 Output Stage
proper operation, calculate the value of the pullup resistor R1 using Equation 1. is generally better, however faster transitions and bandwidth require a smaller resistor for faster switching. In addition, ensure that the value of R1 > 500 Ω to ensure the output driver can pull the OUT pin close to GND.
1 ¦
2 R1 C2u S u u
www.ti.com SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 Product Folder Links: DRV5013-Q1 Submit Documentation FeedbackCopyright © 2014–2018, Texas Instruments Incorporated Feature Description (continued) Figure 17. Select a value for C2 based on the system bandwidth specifications as shown in Equation 2. (2) Most applications do not require this C2 filtering capacitor.
SLIS162H –DECEMBER 2014–REVISED AUGUST 2018 www.ti.com Product Folder Links: DRV5013-Q1 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated Feature Description (continued)
7.3.5 Protection Circuits
The DRV5013-Q1 device is fully protected against overcurrent and reverse-supply conditions.
7.3.6 Overcurrent Protection (OCP)
An analog current-limit circuit limits the current through the FET. The driver current is clamped to IOCP. During this clamping, the rDS(on) of the output FET is increased from the nominal value.
7.3.7 Load Dump Protection
The DRV5013-Q1 device operates at DC VCC conditions up to 38 V nominally, and can additionally withstand VCC = 40 V. No current-limiting series resistor is required for this protection.
7.3.8 Reverse Supply Protection
The DRV5013-Q1 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V). NOTE In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings specified in the Absolute Maximum Ratings. Table 1. FAULT CONDITION DEVICE DESCRIPTION RECOVERY FET overload (OCP) ISINK ≥ IOCP Operating Output current is clamped to IOCP IO < IOCP Load dump 38 V < VCC < 40 V Operating Device will operate for a transient duration VCC ≤ 38 V Reverse supply –22 V < VCC < 0 V Disabled Device will survive this condition VCC ≥ 2.7 V
7.4 Device Functional Modes
The DRV5013-Q1 device is active only when VCC is between 2.7 and 38 V. When a reverse supply condition exists, the device is inactive. With regard to some industry standards that require analyzing every possible output from a device, an internal clock is unlikely to couple to the output.
8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV5013-Q1 device is used in magnetic-field sensing applications.
8.2 Typical Applications
8.2.1 Standard Circuit
Figure 18. Typical Application Circuit
8.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters. Table 2. Design Parameters
8.2.1.2 Detailed Design Procedure
Table 3. External Components
8.2.1.2.1 Configuration Example
For this design example, use Equation 4 to calculate the allowable range of R1. After finding the allowable range of R1 (Equation 5), select a value between 500 Ω and 32 kΩ for R1. Assuming a system bandwidth of 10 kHz, use Equation 6 to calculate the value of C2. For this design example, use Equation 7 to calculate the value of C2. An R1 value of 10 kΩ and a C2 value less than 820 pF satisfy the requirement for a 10-kHz system bandwidth. A selection of R1 = 10 kΩ and C2 = 680 pF would cause a low-pass filter with a corner frequency of 23.4 kHz.
8.2.1.3 Application Curves
Figure 19. 10-kHz Switching Magnetic Field Figure 20. 10-kHz Switching Magnetic Field Figure 21. Low-Pass Filtering
8.2.2 Alternative Two-Wire Application
the total supplied current can be sensed near the controller. Figure 22. 2-Wire Application Current can be sensed using a shunt resistor or other circuitry.
8.2.2.1 Design Requirements
Table 4 lists the related design parameters. Table 4. Design Parameters
8.2.2.2 Detailed Design Procedure
device (approximately 3 mA). the parallel current is approximately 12 mA, making the total current approximately 15 mA.
9 Power Supply Recommendations
variation to less than 50 mVPP.
10 Layout
10.1 Layout Guidelines
nearby system components contain iron or nickel, they may redirect magnetic flux in unpredictable ways.
10.2 Layout Example
Figure 23. DRV5013-Q1 Layout Example
11 Device and Documentation Support
11.1 Device Support
11.1.1 Device Nomenclature
Figure 24 shows a legend for reading the complete device name for and DRV5013-Q1 device. Figure 24. Device Nomenclature
11.1.2 Device Markings
Figure 25. SOT-23 (DBZ) Package Figure 26. TO-92 (LPG) Package package and 0.987 mm ±50 µm in the LPG package.
11.2 Receiving Notification of Documentation Updates
that has changed (if any). For change details, check the revision history of any revised document.
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11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
www.ti.com 27-Dec-2019 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples DRV5013ADEDBZJQ1 ACTIVE SOT-23 DBZ 3 10000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAD DRV5013ADEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAD DRV5013ADEDBZTQ1 ACTIVE SOT-23 DBZ 3 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAD DRV5013ADELPGMQ1 ACTIVE TO-92 LPG 3 3000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 150 +NJAD DRV5013ADELPGQ1 ACTIVE TO-92 LPG 3 1000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 150 +NJAD DRV5013ADQDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAD DRV5013ADQDBZTQ1 ACTIVE SOT-23 DBZ 3 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAD DRV5013ADQLPGMQ1 ACTIVE TO-92 LPG 3 3000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 +NKAD DRV5013ADQLPGQ1 ACTIVE TO-92 LPG 3 1000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 +NKAD DRV5013AGEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAG DRV5013AGEDBZTQ1 ACTIVE SOT-23 DBZ 3 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAG DRV5013AGELPGMQ1 ACTIVE TO-92 LPG 3 3000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 150 +NJAG DRV5013AGELPGQ1 ACTIVE TO-92 LPG 3 1000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 150 +NJAG DRV5013AGQDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAG DRV5013AGQDBZTQ1 ACTIVE SOT-23 DBZ 3 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAG DRV5013AGQLPGMQ1 ACTIVE TO-92 LPG 3 3000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 +NKAG DRV5013AGQLPGQ1 ACTIVE TO-92 LPG 3 1000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 +NKAG
www.ti.com 27-Dec-2019 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples DRV5013BCEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJBC DRV5013BCEDBZTQ1 ACTIVE SOT-23 DBZ 3 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJBC DRV5013BCELPGMQ1 ACTIVE TO-92 LPG 3 3000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 150 +NJBC DRV5013BCELPGQ1 ACTIVE TO-92 LPG 3 1000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 150 +NJBC DRV5013BCQDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKBC DRV5013BCQDBZTQ1 ACTIVE SOT-23 DBZ 3 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKBC DRV5013BCQLPGMQ1 ACTIVE TO-92 LPG 3 3000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 +NKBC DRV5013BCQLPGQ1 ACTIVE TO-92 LPG 3 1000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -40 to 125 +NKBC DRV5013FAEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 150 +NJFA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
www.ti.com 27-Dec-2019 Addendum-Page 3 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF DRV5013-Q1 :
- Catalog: DRV5013 NOTE: Qualified Version Definitions:
- Catalog - TI's standard catalog product
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 23-Aug-2018 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV5013ADEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 DRV5013ADEDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0 DRV5013ADQDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 DRV5013ADQDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0 DRV5013AGEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 DRV5013AGEDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0 DRV5013AGQDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 DRV5013AGQDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0 DRV5013BCEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 DRV5013BCEDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0 DRV5013BCQDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 DRV5013BCQDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0 DRV5013FAEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0 PACKAGE MATERIALS INFORMATION www.ti.com 23-Aug-2018 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE 4.1 3.9 15.5 15.1 3X 0.48 0.35 2X 1.27 0.05 3.25 3.05 3X 0.51 0.36 3X 0.55 0.40 2X (45 ) 0.86 0.66 1.62 1.42 2.64 2.44 2.68 2.28 5.05 MAX (0.5425) 3X (0.8) 4221343/C 01/2018 TO-92 - 5.05 mm max heightLPG0003A TRANSISTOR OUTLINE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 1 3 1 2 3 SCALE 1.300
www.ti.com EXAMPLE BOARD LAYOUT TYP ALL AROUND
0.05 MAX
TYP(1.07) (1.7) (1.27) (2.54) 2X (1.7) 3X ( 0.75) VIA 4221343/C 01/2018 TO-92 - 5.05 mm max heightLPG0003A TRANSISTOR OUTLINE LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE:20X METAL TYP OPENING SOLDER MASK 1 32 METAL2X SOLDER MASK OPENING
www.ti.com TAPE SPECIFICATIONS 0 1 0 1 12.9 12.5 6.55 6.15 13.0 12.4
2.5 MIN
6.5 5.5 3.8-4.2 TYP 9.5 8.5 19.0 17.5
1 MAX21
0.45 0.35 0.25 0.15 TO-92 - 5.05 mm max heightLPG0003A TRANSISTOR OUTLINE 4221343/C 01/2018
www.ti.com PACKAGE OUTLINE C TYP0.20 0.08 0.25 2.64 2.10
1.12 MAX
TYP0.10 0.01 3X 0.5 0.3 TYP0.6 0.2 1.9 0.95 TYP -80 A 3.04 2.80 B1.4 1.2 (0.95) SOT-23 - 1.12 mm max heightDBZ0003A SMALL OUTLINE TRANSISTOR 4214838/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration TO-236, except minimum foot length.
0.2 C A B
0.1 C SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.07 MAX
0.07 MIN
3X (1.3) 3X (0.6) (2.1) 2X (0.95) (R0.05) TYP 4214838/C 04/2017 SOT-23 - 1.12 mm max heightDBZ0003A SMALL OUTLINE TRANSISTOR NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE SCALE:15X PKG SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS
www.ti.com EXAMPLE STENCIL DESIGN (2.1) 2X(0.95) 3X (1.3) 3X (0.6) (R0.05) TYP SOT-23 - 1.12 mm max heightDBZ0003A SMALL OUTLINE TRANSISTOR 4214838/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:15X SYMM PKG
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